Patents by Inventor Yu-Ching Lee
Yu-Ching Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240146205Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.Type: ApplicationFiled: September 23, 2023Publication date: May 2, 2024Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
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Patent number: 11955441Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.Type: GrantFiled: March 28, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jian-Hong Lin, Kuo-Yen Liu, Hsin-Chun Chang, Tzu-Li Lee, Yu-Ching Lee, Yih-Ching Wang
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Publication number: 20240012340Abstract: An overlay mark includes a first, a second, a third, and a fourth component. The first component is located in a first region of the first overlay mark and includes a plurality of gratings that extend in a first direction. The second component is located in a second region of the first overlay mark and includes a plurality of gratings that extend in the first direction. The third component is located in a third region of the first overlay mark and includes a plurality of gratings that extend in a second direction different from the first direction. The fourth component is located in a fourth region of the first overlay mark and includes a plurality of gratings that extend in the second direction. The first region is aligned with the second region. The third region is aligned with the fourth region.Type: ApplicationFiled: August 7, 2023Publication date: January 11, 2024Inventors: Yu-Ching Lee, Te-Chih Huang, Yu-Piao Fang
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Patent number: 11835864Abstract: An overlay mark includes a first, a second, a third, and a fourth component. The first component is located in a first region of the first overlay mark and includes a plurality of gratings that extend in a first direction. The second component is located in a second region of the first overlay mark and includes a plurality of gratings that extend in the first direction. The third component is located in a third region of the first overlay mark and includes a plurality of gratings that extend in a second direction different from the first direction. The fourth component is located in a fourth region of the first overlay mark and includes a plurality of gratings that extend in the second direction. The first region is aligned with the second region. The third region is aligned with the fourth region.Type: GrantFiled: July 29, 2022Date of Patent: December 5, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Ching Lee, Te-Chih Huang, Yu-Piao Fang
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Patent number: 11837486Abstract: A transportation container is provided with a container body constructed of a top wall, a bottom wall, a rear wall, and two sidewalls forming a front opening for loading or unloading a reticle pod into or out of the container body; a lid for opening and closing the front opening; and a lift plate above the container body configured to connect to a carrier of an overhead hoist transfer (OHT) system.Type: GrantFiled: April 16, 2021Date of Patent: December 5, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Ching Lee, Yu-Piao Fang
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Publication number: 20230375815Abstract: A portable confocal optical scanning microscopic device includes an optical path module, a light source module, a light receiving module and an object stage, wherein the optical path module includes a beam splitter and a focusing lens; the light source module includes a light generator for generating an incident light and can be injected into the beam splitter; the light receiving module includes a spatial filter; the object stage is for setting a test specimen. The optical path module, the light source module, the light receiving module, and the object stage can be disassembled and assembled on the operating board to flexibly configure an adaptive combination capable of performing the optical scanning.Type: ApplicationFiled: June 21, 2022Publication date: November 23, 2023Inventors: YU-CHING LEE, HSIAO-YING WU, SHI-DE CHEN
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Publication number: 20230366857Abstract: Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.Type: ApplicationFiled: July 19, 2023Publication date: November 16, 2023Inventors: Jun-Hao Deng, Kuan-Wen Lin, Sheng-Chi Chin, Yu-Ching Lee
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Patent number: 11768443Abstract: Methods for manufacturing a semiconductor structure are provided. A substrate is provided. A metrology target is formed in a layer over the substrate according to a first layer mask and a second layer mask. The metrology target includes a first pattern formed by a plurality of first photonic crystals corresponding to the first layer mask and a second pattern formed by a plurality of second photonic crystals corresponding to the second layer mask. First light is provided to illuminate the metrology target. Second light is received from the metrology target in response to the first light. The second light is analyzed to detect overlay-shift between the first pattern and the second pattern. The first pattern and the second pattern are arranged to cross in one direction in the metrology target.Type: GrantFiled: June 22, 2022Date of Patent: September 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Ching Lee, Yu-Piao Fang
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Patent number: 11709153Abstract: Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.Type: GrantFiled: November 23, 2020Date of Patent: July 25, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jun-Hao Deng, Kuan-Wen Lin, Sheng-Chi Chin, Yu-Ching Lee
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Patent number: 11578121Abstract: The invention relates to anti-EGF like domain multiple 6 antibody (anti-EGFL6 antibody) and cancer detection (or diagnosis) and treatment using the anti-EGFL6 antibody. The present invention creates anti-EGFL6 antibodies, particularly, a single-chain antibody fragments (scFv) and humanized antibody, which have ability in binding to EGFL6 and in inhibiting angiogenesis and cancer cell growth.Type: GrantFiled: September 28, 2018Date of Patent: February 14, 2023Assignees: Taipei Medical University, Changhua Christian Medical Foundation Changhua Christian Hospital, National Research institute of Chinese Medicine, Ministry of Health and WelfareInventors: Yu-Ching Lee, Shiow-Lin Pan, Wei-Chun Huangfu, Tsui-Chin Huang, Po-Li Wei, Han-Li Huang, Chun-Chun Cheng, Cheng-Chiao Huang, Keng-Chang Tsai, Kun-Tu Yeh, Ting-Yi Sung, Fu-Ling Chang
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Publication number: 20220384358Abstract: An overlay mark includes a first, a second, a third, and a fourth component. The first component is located in a first region of the first overlay mark and includes a plurality of gratings that extend in a first direction. The second component is located in a second region of the first overlay mark and includes a plurality of gratings that extend in the first direction. The third component is located in a third region of the first overlay mark and includes a plurality of gratings that extend in a second direction different from the first direction. The fourth component is located in a fourth region of the first overlay mark and includes a plurality of gratings that extend in the second direction. The first region is aligned with the second region. The third region is aligned with the fourth region.Type: ApplicationFiled: July 29, 2022Publication date: December 1, 2022Inventors: Yu-Ching Lee, Te-Chih Huang, Yu-Piao Fang
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Patent number: 11485776Abstract: The invention provides anti-CaENO1 antibodies and humanized antibodies as effective diagnostic agent or therapeutic treatment against infections caused by Candida spp. (preferably Candida. albicans, Candida tropicalis), fluconazole resistance Candida spp., Streptococcus, or Staphylococcus.Type: GrantFiled: July 23, 2020Date of Patent: November 1, 2022Assignee: TAIPEI MEDICAL UNIVERSITYInventors: Sy-Jye Leu, Yi-Yuan Yang, Yu-Ching Lee, Ching-Hua Su, Ko-Jiunn Liu, Hsiu-Jung Lo, Yun-Liang Yang
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Publication number: 20220317578Abstract: Methods for manufacturing a semiconductor structure are provided. A substrate is provided. A metrology target is formed in a layer over the substrate according to a first layer mask and a second layer mask. The metrology target includes a first pattern formed by a plurality of first photonic crystals corresponding to the first layer mask and a second pattern formed by a plurality of second photonic crystals corresponding to the second layer mask. First light is provided to illuminate the metrology target. Second light is received from the metrology target in response to the first light. The second light is analyzed to detect overlay-shift between the first pattern and the second pattern. The first pattern and the second pattern are arranged to cross in one direction in the metrology target.Type: ApplicationFiled: June 22, 2022Publication date: October 6, 2022Inventors: Yu-Ching LEE, Yu-Piao FANG
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Patent number: 11448975Abstract: An overlay mark includes a first, a second, a third, and a fourth component. The first component is located in a first region of the first overlay mark and includes a plurality of gratings that extend in a first direction. The second component is located in a second region of the first overlay mark and includes a plurality of gratings that extend in the first direction. The third component is located in a third region of the first overlay mark and includes a plurality of gratings that extend in a second direction different from the first direction. The fourth component is located in a fourth region of the first overlay mark and includes a plurality of gratings that extend in the second direction. The first region is aligned with the second region. The third region is aligned with the fourth region.Type: GrantFiled: February 9, 2021Date of Patent: September 20, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Ching Lee, Te-Chih Huang, Yu-Piao Fang
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Publication number: 20220216165Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.Type: ApplicationFiled: March 28, 2022Publication date: July 7, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jian-Hong LIN, Kuo-Yen LIU, Hsin-Chun CHANG, Tzu-Li LEE, Yu-Ching LEE, Yih-Ching WANG
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Patent number: 11378892Abstract: Overlay-shift measurement systems are provided. An overlay-shift measurement system includes an optical device, a first light detection device and a processor. The optical device is configured to provide an input light to a metrology target of a semiconductor structure. The first light detection device is configured to receive a transmitted light from the metrology target when the input light penetrates the metrology target. The processor is configured to determine whether overlay-shift between a plurality of first photonic crystals and a plurality of second photonic crystals in the metrology target is present according to characteristics of the transmitted light.Type: GrantFiled: May 25, 2021Date of Patent: July 5, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Ching Lee, Yu-Piao Fang
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Patent number: 11302654Abstract: A method includes depositing a first dielectric layer over a substrate; forming a first dummy metal layer over the first dielectric layer, wherein the first dummy metal layer has first and second portions laterally separated from each other; depositing a second dielectric layer over the first dummy metal layer; etching an opening having an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first dummy metal layer, and a lower portion in the first dielectric layer, wherein a width of the lower portion of the opening is greater than a width of the middle portion of the opening, and a bottom of the opening is higher than a bottom of the first dielectric layer; and forming a dummy via in the opening and a second dummy metal layer over the dummy via and the second dielectric layer.Type: GrantFiled: September 11, 2020Date of Patent: April 12, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jian-Hong Lin, Kuo-Yen Liu, Hsin-Chun Chang, Tzu-Li Lee, Yu-Ching Lee, Yih-Ching Wang
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Patent number: 11256183Abstract: A detection method for a pellicle membrane of a photomask includes applying a predetermined pressure under which the pellicle membrane undergoes a deformation, measuring and calculating at least one of deformation level, Young's modulus, and flexural rigidity level of the pellicle membrane by detection, and obtaining a detection result about the pellicle membrane according to at least one of the deformation level, Young's modulus, and flexural rigidity level of the pellicle membrane, so as to evaluate the quality of the pellicle membrane.Type: GrantFiled: May 18, 2020Date of Patent: February 22, 2022Assignee: SOUTHERN TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGYInventor: Yu-Ching Lee
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Publication number: 20210278769Abstract: Overlay-shift measurement systems are provided. An overlay-shift measurement system includes an optical device, a first light detection device and a processor. The optical device is configured to provide an input light to a metrology target of a semiconductor structure. The first light detection device is configured to receive a transmitted light from the metrology target when the input light penetrates the metrology target. The processor is configured to determine whether overlay-shift between a plurality of first photonic crystals and a plurality of second photonic crystals in the metrology target is present according to characteristics of the transmitted light.Type: ApplicationFiled: May 25, 2021Publication date: September 9, 2021Inventors: Yu-Ching LEE, Yu-Piao FANG
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Patent number: D1018907Type: GrantFiled: November 15, 2021Date of Patent: March 19, 2024Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.Inventors: Yun-Chien Lee, Yi-Ching Hsu, Pei-Yi Lin, Yu-Hung Su, Sheng-Yuan Huang, Chun-Fu Lin