Abstract: A front light module configured to be disposed on a display panel to illuminate the display panel is provided. The front light module includes a light source and a light guide plate. The light guide plate has a first surface facing away from the display panel, a second surface facing the display panel, and a light incident surface facing the light source. The light incident surface connects the first surface and the second surface. The first surface has multiple sets of optical micro-structures. Each of the sets of the optical micro-structures includes multiple optical micro-structures disposed or distributed asymmetrically.

Abstract: A method of forming an integrated circuit structure includes forming a patterned passivation layer over a metal pad, with a top surface of the metal pad revealed through a first opening in the patterned passivation layer, and applying a polymer layer over the patterned passivation layer. The polymer layer is substantially free from N-Methyl-2-pyrrolidone (NMP), and comprises aliphatic amide as a solvent. The method further includes performing a light-exposure process on the polymer layer, performing a development process on the polymer layer to form a second opening in the polymer layer, wherein the top surface of the metal pad is revealed to the second opening, baking the polymer, and forming a conductive region having a via portion extending into the second opening.

Abstract: A FinFET LDMOS device includes a semiconductor substrate; juxtaposed first well and second well in the semiconductor substrate; semiconductor fins extending on the semiconductor substrate along a first direction, the semiconductor fins including a first fin portion in the first well and a second fin portion in the second well; an extra semiconductor body adjoining the first fin portion and the second fin portion and extending along a second direction; a source region on the first fin portion; a drain region on the second fin portion; a gate covering the semiconductor fin and extending along the second direction, wherein the gate partially overlaps the first fin portion and partially overlaps the second fin portion, and the extra semiconductor body is covered by the gate; and a single-diffusion break structure embedded in the second fin portion and between the gate and drain region.

Abstract: Routing arrangements for 3D memory arrays and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a memory array including a gate dielectric layer contacting a first word line and a second word line; and an oxide semiconductor (OS) layer contacting a source line and a bit line, the gate dielectric layer being disposed between the OS layer and each of the first word line and the second word line; an interconnect structure over the memory array, a distance between the second word line and the interconnect structure being less than a distance between the first word line and the interconnect structure; and an integrated circuit die bonded to the interconnect structure opposite the memory array, the integrated circuit die being bonded to the interconnect structure by dielectric-to-dielectric bonds and metal-to-metal bonds.

Abstract: A method for manufacturing an electronic device is disclosed. The electronic device has a first region and a transparent region. The method includes the steps of providing a flexible substrate, forming an electric circuit layer on the flexible substrate at an elevated temperature, forming an opening in the transparent region after forming the electric circuit layer, wherein the opening penetrates through a portion of the electric circuit layer, and forming a filling layer on the flexible substrate after forming the opening, wherein at least a part of the filling layer is formed in the opening to enhance a transmittance of the transparent region.

Abstract: According to one embodiment, a method, computer system, and computer program product for adjusting an audible area of an avatar's voice is provided. The present invention may include receiving, at a microphone, a source audio; creating a received audio; calculating, by a generative model, a voice propagation distance of a user based on the source audio, the received audio, and a templated text sentence describing a category of a mixed reality environment experienced by the user; drawing a virtual circle within the mixed reality environment centered on a user avatar representing the user and with a radius equal to the voice propagation distance; and transmitting the source audio to one or more participants within the mixed-reality environment represented by one or more participant avatars located within the virtual circle.

Abstract: A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain. The method may include filling the opening with a metal layer that covers the exposed portions of the first source/drain and the second source/drain, and forming a gap in the metal layer to create a first metal contact and a second metal contact. The first metal contact may electrically couple to the first source/drain and the second metal contact may electrically couple to the second source/drain. The gap may separate the first metal contact from the second metal contact by less than nineteen nanometers.

Abstract: A multiple cation-doped perovskite compound includes a perovskite represented by a formula of ABX3. A includes M1, M2, and M3. M1 represents a cation different from M2 and M3; M2 represents a cesium ion and M3 represents a formamidinium ion. B represents a divalent cation different from M1, M2, and M3. X includes at least two different halide ions. In addition, the perovskite compound is free from methylamine ion. A perovskite solar cell including the multiple cation-doped perovskite compound is also provided.

Abstract: Disclosed is use of a Histatin-1 polypeptide in promotion of cartilage regeneration or repair. By preparing a combined reagent containing a Histatin-1 polypeptide, a biological scaffold material and the like, mainly a linear Hst1 is loaded on gelatin methacrylate so as to be used for repairing cartilage damage or promoting cartilage growth; meanwhile, disclosed is use of a Histatin-1 polypeptide in promotion of the expression of one or more of bone differentiation indexes, including a collagen fiber, glycosaminoglycan, type II collagen and aggrecan.

Abstract: A magnetic tunnel junction (MTJ) memory cell comprising a connection via structure, a bottom electrode disposed on the connection via structure, a memory material stack disposed on the bottom electrode, and a conductive contact structure disposed on the memory material stack, in which a bottom surface of the conductive contact structure is in direct contact with a memory material layer of the memory material stack.

Abstract: A display panel includes pixel circuits, first shift register(s), second shift register(s), third shift register(s), and fourth shift register(s). A pixel circuit includes a driving transistor, a bias sub-circuit, a data writing sub-circuit, a compensation sub-circuit, a leakage prevention sub-circuit, a reset sub-circuit, and a light-emission control sub-circuit. The bias sub-circuit is electrically connected to a first shift register, which transmits a first scanning signal to the bias sub-circuit. The data writing and compensation sub-circuits are electrically connected to a second shift register, which transmits a second scanning signal to the data writing and compensation sub-circuits. The leakage prevention sub-circuit is electrically connected to a third shift register, which transmits a third scanning signal to the leakage prevention sub-circuit.

Abstract: The present application relates to the field of data consistency testing, and provides a method and device for testing vehicle data consistency in V2X. The method includes: collecting vehicle V2X test data transmitted based on a V2X-PC5 communication protocol; parsing the V2X test data, and determining whether a format and a data value of parsed data conform to a preset definition, and whether the parsed data is consistent with operating data in testing, to obtain a data structure consistency result; calculating an average error value between dynamic data in the parsed data and data collected by a high-precision inertial navigation device when time stamps are aligned and data sampling frequencies are the same; and according to the data structure consistency result and the average error value, determining whether vehicle data conforms to a preset consistency standard.

Abstract: An array substrate, a display panel and methods of manufacturing the same are provided. The method of manufacturing an array substrate according to an embodiment of the present disclosure includes: forming f pixel electrodes and a conductive structure on a substrate through a patterning process, wherein the pixel electrodes arranged in a first direction are connected through the conductive structure; and forming a signal line on the substrate through a patterning process, wherein the signal line and the pixel electrodes are disposed in the same layer. By means of the array substrate according to the embodiments of the present disclosure, the problem that it is not easy to discover the point defects caused by short circuit between the signal line and pixel electrodes in the related art can be solved.

Abstract: A semiconductor device includes a first electrode layer, a ferroelectric layer, a first alignment layer and a second electrode layer. A material of the first alignment layer includes rare-earth metal oxide. The ferroelectric layer and the first alignment layer are disposed between the first electrode layer and the second electrode layer, and the first alignment layer is disposed between the ferroelectric layer and the first electrode layer.

Abstract: A memory device and a manufacturing method are provided. The memory device includes a substrate, a transistor, and a memory cell. The substrate has a semiconductor device and a dielectric structure disposed on the semiconductor device. The transistor is disposed over the dielectric structure and is electrically coupled with the semiconductor device. The semiconductor device includes a gate, a channel layer, source drain regions, and a stack of a gate dielectric layer and a first ferroelectric layer. The gate and the source and drain regions are disposed over the dielectric structure. The channel layer is located between the source and drain regions. The stack of the gate dielectric layer and the first ferroelectric layer is disposed between the gate and the channel layer. The memory cell is disposed over the transistor and is electrically connected to one of the source and drain regions. The memory cell includes a ferromagnetic layer or a second ferroelectric layer.

Abstract: An atomizer for an electronic cigarette includes an atomization compartment housing, an atomizer assembly and an outer cover covering the atomization compartment housing. The outer cover is provided with a suction nozzle opening and a communication hole. The atomization compartment housing includes an atomization cavity, an opening and a through groove. The atomization cavity is disposed inside the atomization compartment housing, and the atomizer assembly is disposed inside the atomization cavity. The opening is disposed at an end of the atomization compartment housing and communicates with the atomization cavity. The opening and the atomization cavity form a smoke passage that communicates with the suction nozzle opening. The through groove is disposed in an outer wall of the atomization compartment housing. The through groove and the outer cover form an intake passage. Two ends of the intake passage communicate with the suction nozzle opening and the communication hole respectively.

Abstract: Disclosed are apparatus and methods for a silicon photonic (SiPh) structure comprising the integration of an electrical integrated circuit (EIC); a photonic integrated circuit (PIC) disposed on top of the EIC; two or more polymer waveguides (PWGs) disposed on top of the PIC and formed by layers of cladding polymer and core polymer; and an integration fan-out redistribution (InFO RDL) layer disposed on top of the two or more PWGs. The operation of PWGs is based on the refractive indexes of the cladding and core polymers. Inter-layer optical signals coupling is provided by edge-coupling, reflective prisms and grating coupling. A wafer-level system implements a SiPh structure die and provides inter-die signal optical interconnections among the PWGs.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A method of manufacturing an electronic device includes: forming a sacrificial layer on a substrate; forming a semiconductor structure on the sacrificial layer; separating the semiconductor structure from the substrate; detecting defects on the substrate; and classifying the substrate.

Abstract: A wireless charging device is disclosed. At least one floating charging component is arranged in the wireless charging device, the floating charging component comprises a supporting plate, a power transmission coil, and a magnetic element, the top wall of a housing is provided with at least one mounting hole, and the floating charging component is movably arranged in the mounting hole, so that when the device to be charged is placed on a bearing surface of the top wall, the magnetic element is able to attract the device to be charged so that the outer surface of the supporting plate contacts with the device to be charged, so that ensures that the power transmission coil and the device to be charged be aligned with each other and the distance between them is small, thereby ensuring the wireless charging rate.