Patents by Inventor Yu-Han Tsai
Yu-Han Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240402528Abstract: An electronic device is provided. The electronic device includes a first substrate, a second substrate, a first transistor, a second transistor, a passivation layer, a conductive through hole, an electrode, and a shielding layer. The second substrate overlaps the first substrate. The first transistor is disposed on the first substrate. The second transistor is disposed on the second substrate. The passivation layer is disposed between the first substrate and the second substrate. The conductive through hole penetrates the passivation layer. The electrode is disposed between the first substrate and the second substrate and electrically connected to the first transistor through the conductive through hole. The shielding layer is disposed between the first transistor and the second transistor and overlaps the conductive through hole.Type: ApplicationFiled: August 8, 2024Publication date: December 5, 2024Inventors: Yu-Chia HUANG, Yuan-Lin WU, Chandra LIUS, Kuan-Feng LEE, Tsung-Han TSAI
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Publication number: 20240401789Abstract: An electronic device includes a light emitting panel for emitting a first light ray and an optical film disposed on the light emitting panel. The first light ray has at least one corresponding position in a CIE 1931 color space. A modulated color point of the optical film has at least one corresponding position in the CIE 1931 color space. In the CIE 1931 color space, the at least one corresponding position of the first light ray has a first coordinate (x1, y1) corresponding thereto, the at least one corresponding position of the modulated color point has a second coordinate (x2, y2) corresponding thereto, and the first coordinate (x1, y1) and the second coordinate (x2, y2) satisfy certain relationships with respect to an equation of y(x)=?2.48x{circumflex over (?)}2+2.52x?0.22.Type: ApplicationFiled: May 6, 2024Publication date: December 5, 2024Applicant: CARUX TECHNOLOGY PTE. LTD.Inventors: Yu-Chia Huang, Tsung-Han Tsai
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Patent number: 12154852Abstract: An interconnection structure includes a first interconnection level, a second interconnection level, a third interconnection level, and a super via structure. The second interconnection level is disposed on the first interconnection level, and the third interconnection level is disposed on the second interconnection level. The second interconnection level includes a second conductive layer and a block layer disposed in a dielectric layer. A bottom surface of the block layer is lower than a top surface of the second conductive layer in a vertical direction. The block layer is disposed between a first conductive layer of the first interconnection level and a third conductive layer of the third interconnection level in the vertical direction. The super via structure penetrates through the block layer and the second interconnection level in the vertical direction and electrically connects the first conductive layer and the third conductive layer.Type: GrantFiled: February 14, 2022Date of Patent: November 26, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Min-Shiang Hsu, Yu-Han Tsai, Chih-Sheng Chang
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Publication number: 20240387368Abstract: A semiconductor device and method of manufacture are presented in which a first pad and a second pad are formed adjacent to each other. A first set of dummy pads is manufactured between the first pad and the second pad and bonding pads are formed in electrical connection to the first pad and the second pad.Type: ApplicationFiled: July 30, 2024Publication date: November 21, 2024Inventors: Chin-Yi Lin, Jie Chen, Sheng-Han Tsai, Yuan Sheng Chiu, Chou-Jui Hsu, Yu Kuei Yeh, Tsung-Shu Lin
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Patent number: 12146927Abstract: A method for fabricating semiconductor device includes the steps of first forming a magnetic tunneling junction (MTJ) stack on a substrate, in which the MTJ stack includes a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer. Next, a top electrode is formed on the MTJ stack, the top electrode, the free layer, and the barrier layer are removed, a first cap layer is formed on the top electrode, the free layer, and the barrier layer, and the first cap layer and the pinned layer are removed to form a MTJ and a spacer adjacent to the MTJ.Type: GrantFiled: October 4, 2023Date of Patent: November 19, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Chen-Yi Weng, Che-Wei Chang, Si-Han Tsai, Ching-Hua Hsu, Jing-Yin Jhang, Yu-Ping Wang
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Publication number: 20240379433Abstract: The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In some embodiments, a structure includes a first dielectric layer over a substrate, a first conductive feature through the first dielectric layer, the first conductive feature comprising a first metal, a second dielectric layer over the first dielectric layer, and a second conductive feature through the second dielectric layer having a lower convex surface extending into the first conductive feature, wherein the lower convex surface of the second conductive feature has a tip end extending laterally under a bottom boundary of the second dielectric layer.Type: ApplicationFiled: July 24, 2024Publication date: November 14, 2024Inventors: Pin-Wen Chen, Chia-Han Lai, Chih-Wei Chang, Mei-Hui Fu, Ming-Hsing Tsai, Wei-Jung Lin, Yu-Shih Wang, Ya-Yi Cheng, I-Li Chen
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Publication number: 20240371845Abstract: An electronic device includes a substrate structure, an insulating layer, a semiconductor unit and a first electromagnetic signal adjusting unit. The insulating layer is disposed on the substrate structure and has a recess. The semiconductor unit is disposed in the recess. The first electromagnetic signal adjusting unit is disposed on the insulating layer and configured for adjusting an electromagnetic signal, wherein the first electromagnetic signal adjusting unit is overlapped with the semiconductor unit. In a top view of the electronic device, a first distance is between a defined center of the recess and a defined center of the semiconductor unit, a second distance is between a defined center of the first electromagnetic signal adjusting unit and the defined center of the semiconductor unit, and the first distance is greater than 0 and the second distance is less than or equal to the first distance.Type: ApplicationFiled: April 8, 2024Publication date: November 7, 2024Applicant: InnoLux CorporationInventors: Yu-Jhou GONG, Tsung-Han TSAI, Kuan-Feng LEE, Jia-Yuan CHEN
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Publication number: 20240367594Abstract: A vehicle device is provided, which includes a light-emitting unit and a screen separately disposed on a vehicle body. In a first state, the screen is stored in a first portion. In a second state, at least a part of the screen is stretched out of the first portion, and the screen has a vertical length of H, which satisfies: H=[(L?d)*tan(?d)]+[(L?d)*tan(?u)] and H<Hv. L is a first horizontal distance between a viewing point and a first barrier element. d is a second horizontal distance between the screen and the first barrier element in the second state. ?d is a viewing angle below the horizontal plane when observes from the viewing point to the screen, with ?d?70 degrees. ?u is a viewing angle above the horizontal plane when observes from the viewing point to the screen. Hv is a height of the space inside the vehicle.Type: ApplicationFiled: April 2, 2024Publication date: November 7, 2024Inventors: Yu-Chia HUANG, Tsung-Han TSAI, Kuan-Feng LEE, Kun-Feng HUANG, Li-Wei SUNG
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Publication number: 20240361594Abstract: A head-up display system for a vehicle is provided. The vehicle has a windshield, a vehicle front and a vehicle rear. The head-up display system includes a first image generation device and an optical element. The first image generation device is configured to provide a first light. The optical element is configured to adjust a transmission direction of the first light. The vehicle front and the vehicle rear are connected along a first direction. Along a second direction perpendicular to the first direction, a first headlight and a second headlight are configured along the second direction and at the vehicle front. A minimum distance between the first headlight and a driver seat is less than a minimum distance between the second headlight and the driver seat. A distance between the first image generation device and the second headlight is different from a distance between the first image generation device and the first headlight.Type: ApplicationFiled: July 9, 2024Publication date: October 31, 2024Applicant: Innolux CorporationInventors: Yu-Chia Huang, Tsung-Han Tsai, Chin-Lung Ting
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Publication number: 20240355894Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: ApplicationFiled: June 28, 2024Publication date: October 24, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
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Publication number: 20240355684Abstract: A wafer stacking method includes the following steps. A first wafer is provided. A second wafer is bonded to the first wafer to form a first wafer stack structure. A first edge defect inspection is performed on the first wafer stack structure to find a first edge defect and measure a first distance in a radial direction between an edge of the first wafer stack structure and an end of the first edge defect away from the edge of the first wafer stack structure. A first trimming process with a range of a first width is performed from the edge of the first wafer stack structure to remove the first edge defect. Herein, the first width is greater than or equal to the first distance.Type: ApplicationFiled: May 4, 2023Publication date: October 24, 2024Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Chih Feng Sung, Wei Han Huang, Ming-Jui Tsai, Yu Chi Chen, Yung-Hsiang Chang, Chun-Lin Lu, Shih-Ping Lee
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Patent number: 12124121Abstract: An electronic device is provided, including a first layer, a second layer, and an electrode layer. The second layer is disposed opposite to the first layer. The electrode layer is formed on the first layer. The first layer has a first light transmission chromaticity coordinates (x1, y1), the second layer has a second light transmission chromaticity coordinates (x2, y2), and x1?x2?0.002 or y1?y2?20.002.Type: GrantFiled: October 17, 2023Date of Patent: October 22, 2024Assignee: INNOLUX CORPORATIONInventors: Yu-Chia Huang, Yuan-Lin Wu, Kuan-Feng Lee, Tsung-Han Tsai
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Publication number: 20240339397Abstract: An interconnection structure includes a first interconnection level, a second interconnection level, a third interconnection level, and a super via structure. The second interconnection level is disposed on the first interconnection level, and the third interconnection level is disposed on the second interconnection level. The second interconnection level includes a second conductive layer and a block layer disposed in a dielectric layer. A bottom surface of the block layer is lower than a top surface of the second conductive layer in a vertical direction. The block layer is disposed between a first conductive layer of the first interconnection level and a third conductive layer of the third interconnection level in the vertical direction. The super via structure penetrates through the block layer and the second interconnection level in the vertical direction and electrically connects the first conductive layer and the third conductive layer.Type: ApplicationFiled: June 18, 2024Publication date: October 10, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Min-Shiang Hsu, Yu-Han Tsai, Chih-Sheng Chang
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Publication number: 20240324472Abstract: A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region; a first MTJ on the MTJ region; a first metal interconnection on the logic region; and a cap layer extending from a sidewall of the first MTJ to a sidewall of the first metal interconnection. Preferably, the cap layer on the MTJ region and the cap layer on the logic region comprise different thicknesses.Type: ApplicationFiled: May 30, 2024Publication date: September 26, 2024Applicant: United Microelectronics Corp.Inventors: Hui-Lin Wang, Yu-Ping Wang, Chen-Yi Weng, Chin-Yang Hsieh, Si-Han Tsai, Che-Wei Chang, Jing-Yin Jhang
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Patent number: 12094382Abstract: An electronic includes a substrate, a plurality of driving units, a first signal line and a second signal line. The substrate has a first side edge extending in a first extension direction and a second side edge extending in a second extension direction. The first side edge and the second side edge are curved in a normal direction of a projection surface of a top surface of the substrate. A curvature of the first side edge is greater than a curvature of the second side edge, and the curvature of the second side edge is not equal to zero. The driving units are disposed along the first side edge, the first signal line is electrically connected to one of the driving units, and a curvature of the first signal line is different from a curvature of the second signal line.Type: GrantFiled: April 18, 2023Date of Patent: September 17, 2024Assignee: InnoLux CorporationInventors: Yu-Chia Huang, Yuan-Lin Wu, Kuan-Feng Lee, Tsung-Han Tsai
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Patent number: 12096574Abstract: An electronic device includes a first substrate, a second substrate, a first circuit board, and a first layer. The first substrate includes a first bonding area. The second substrate overlapped with the first substrate. The first circuit board bonded to the first bonding area. The first layer disposed on the first circuit board, wherein a surface of the first layer away from the second substrate has a curved surface.Type: GrantFiled: July 18, 2023Date of Patent: September 17, 2024Assignee: Innolux CorporationInventors: Yu-Chia Huang, Tsung-Han Tsai, Kuan-Feng Lee, Jin Yi Tan
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Patent number: 12085798Abstract: An electronic device is provided. The electronic device includes a first substrate, a second substrate, a first transistor and a second transistor. The second substrate is disposed on the first substrate. The first transistor is disposed on the first substrate and includes a first semiconductor layer. The second transistor is disposed on the second substrate and includes a second semiconductor layer. The first semiconductor layer includes a first channel. The second semiconductor layer includes a second channel. The width-to-length ratio of the first channel is different from the width-to-length ratio of the second channel.Type: GrantFiled: October 17, 2023Date of Patent: September 10, 2024Assignee: INNOLUX CORPORATIONInventors: Yu-Chia Huang, Yuan-Lin Wu, Chandra Lius, Kuan-Feng Lee, Tsung-Han Tsai
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Patent number: 12087242Abstract: An electronic device includes a display panel having a display surface. The display surface includes a first region and a second region arranged along a first direction. The display panel outputs a first light in the first region and a second light in the second region. The first light has a first normal brightness in a first orthogonal direction perpendicular to the first direction and a first oblique brightness in a first inclined direction. The first orthogonal direction and the first inclined direction form a first acute included angle. The second light has a second normal brightness in a second orthogonal direction and a second oblique brightness in a second inclined direction. The second orthogonal direction and the second inclined direction form a second acute included angle. The first oblique brightness and the second oblique brightness are different.Type: GrantFiled: October 4, 2023Date of Patent: September 10, 2024Assignee: InnoLux CorporationInventors: Yu-Chia Huang, Yuan-Lin Wu, Kuan-Feng Lee, Tsung-Han Tsai
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Publication number: 20240288960Abstract: The disclosure provides a flexible device. The flexible display device includes a flexible substrate, a planarized layer, a touch electrode, a spacer and a light conversion structure. The planarized layer is disposed on the flexible substrate. The touch electrode is disposed on the flexible substrate. A spacer is disposed on the flexible substrate. A light conversion structure is disposed on the flexible substrate. A thickness of the planarized layer is in a range from 0.5 ?m to 200 ?m. A thickness ratio of the thickness of the planarized layer to a thickness of the flexible substrate is in a range from 0.025 to 20.Type: ApplicationFiled: May 6, 2024Publication date: August 29, 2024Applicant: Innolux CorporationInventors: Yu-Chia Huang, Yuan-Lin Wu, Kuan-Feng Lee, Tsung-Han Tsai
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Patent number: 12066627Abstract: A head-up display system for a vehicle having a windshield is provided. The head-up display system includes a first image generation device and an optical system. The first image generation device is configured to provide a first light. The optical system is configured to reflect the first light. A first distance between the first image generation device and the optical system is greater than a second distance between the optical system and the windshield.Type: GrantFiled: February 23, 2022Date of Patent: August 20, 2024Assignee: Innolux CorporationInventors: Yu-Chia Huang, Tsung-Han Tsai, Chin-Lung Ting