Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a waveguide on a first side of the substrate. The semiconductor device further includes a photodetector (PD) on a second side of the substrate, opposite the first side of the substrate. The semiconductor device further includes an optical through via (OTV) optically connecting the PD with the waveguide, wherein the OTV extends through the substrate from the first side of the substrate to the second side of the substrate.

Abstract: A semiconductor package includes a first integrated circuit and a first waveguide. The first integrated circuit includes an optical coupler. The first waveguide is optically coupled to the optical coupler. In some embodiments, the first waveguide protrudes beyond the optical coupler. In some embodiments, the first waveguide is partially overlapped with the optical coupler.

Abstract: Disclosed are apparatus and methods for a silicon photonic (SiPh) structure comprising the integration of an electrical integrated circuit (EIC); a photonic integrated circuit (PIC) disposed on top of the EIC; two or more polymer waveguides (PWGs) disposed on top of the PIC and formed by layers of cladding polymer and core polymer; and an integration fan-out redistribution (InFO RDL) layer disposed on top of the two or more PWGs. The operation of PWGs is based on the refractive indexes of the cladding and core polymers. Inter-layer optical signals coupling is provided by edge-coupling, reflective prisms and grating coupling. A wafer-level system implements a SiPh structure die and provides inter-die signal optical interconnections among the PWGs.

Abstract: A semiconductor device includes an optical connector element and an optical coupler. The optical connector element includes a base structure, a first polymer via and a cladding layer. The base structure has a first surface and a second surface opposite to the first surface. The first polymer via passes through the base structure from the first surface to the second surface. The cladding layer is surrounding the first polymer via, wherein a refractive index of the cladding layer is different than a refractive index of the first polymer via. The optical coupler is disposed over the optical connector element, wherein the optical coupler receives optical signals from the first polymer via.

Abstract: An optical circuit includes one or more input waveguides, a plurality of output waveguides, and a reflector structure. At least a portion of the reflector structure forms an interface with the one or more input waveguides. The portion of the reflector structure has a smaller refractive index than the one or more input waveguides. An electrical circuit is electrically coupled to the optical circuit. The electrical circuit generates and sends different electrical signals to the reflector structure. In response to the reflector structure receiving the different electrical signals, a carrier concentration level at or near the interface or a temperature at or near the interface changes, such that incident radiation received from the one or more input waveguides is tunably reflected by the reflector structure into a targeted output waveguide of the plurality of output waveguides.

Abstract: A semiconductor package includes a photonic integrated circuit, an electronic integrated circuit and a waveguide. The photonic integrated circuit includes an optical coupler. The electronic integrated circuit is disposed aside the photonic integrated circuit. The waveguide is optically coupled to the optical coupler, wherein the waveguide is disposed at an edge of the photonic integrated circuit and protrudes from the edge of the photonic integrated circuit.

Abstract: A system for adjusting a control pedal distance and orientation relative to a user of a driving-related assembly, the system comprising a moveable pedal plate having a pedal assembly attachment region and at least one distal attachment point located near a distal end region thereof, and at least one proximal pivotable attachment point, each of the distal attachment point and proximal pivotable attachment point having respective distal coupling means and proximal pivotable coupling means. The system further comprises a connecting member having a pivotable coupling means located near respective first and second ends, wherein the pivotable coupling means located near the first end is matable with the proximal pivotable coupling means, and the second end is matable with a connecting member anchor. The system further comprises at least one substantially upright fixation member having a plurality of predetermined coupling points.

Abstract: A semiconductor package includes a first package component comprising: a first semiconductor die; a first encapsulant around the first semiconductor die; and a first redistribution structure electrically connected to the semiconductor die. The semiconductor package further includes a second package component bonded to the first package component, wherein the second package component comprises a second semiconductor die; a heat spreader between the first semiconductor die and the second package component; and a second encapsulant between the first package component and the second package component, wherein the second encapsulant has a lower thermal conductivity than the heat spreader.

Abstract: An optical circuit includes one or more input waveguides, a plurality of output waveguides, and a reflector structure. At least a portion of the reflector structure forms an interface with the one or more input waveguides. The portion of the reflector structure has a smaller refractive index than the one or more input waveguides. An electrical circuit is electrically coupled to the optical circuit. The electrical circuit generates and sends different electrical signals to the reflector structure. In response to the reflector structure receiving the different electrical signals, a carrier concentration level at or near the interface or a temperature at or near the interface changes, such that incident radiation received from the one or more input waveguides is tunably reflected by the reflector structure into a targeted output waveguide of the plurality of output waveguides.

Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.

Abstract: An integrated circuit device includes a semiconductor substrate, an active area in a surface of the semiconductor substrate, a gate electrode, source and drain regions in the active area on opposite sides of the gate electrode to form a transistor, an active conductive pattern connected to a first plurality of electrical contacts for applying electrical signals to the transistor, and a dummy conductive pattern connected to a first plurality of thermal contacts for removing heat from the first active area, where the thermal contacts are electrically isolated from receiving the electrical signals applied to the electrical contacts.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: An air mover assembly may include an air mover comprising a body and a cable extending from the body and one or more air mover holders mechanically coupled to the body. The one or more air mover holders may comprise a plurality of cable maintenance features and a keying feature. The plurality of cable maintenance features may include a first cable maintenance feature configured to maintain the cable in a first configuration of the air mover in a first airflow direction and a second cable maintenance feature configured to maintain the cable in a second configuration of the air mover in a second airflow direction.

Abstract: A vertical probe head includes upper and lower die units having upper and lower through holes, and probes each including a body portion between the die units, tail and head portion installation parts in the upper and lower through holes respectively, and a head portion contact part for electrically contacting a device under test. The probes include a pair of signal probes including at least one distinctive probe, for which, the body portion is smaller in width than the head portion installation part, and a body portion center line is deviated from a head portion installation part center line toward the probe paired thereto. For the paired probes, a head portion contact part pitch is larger than a body portion pitch for matching a large-pitch high-speed differential pair of the device under test, great impedance matching effect, and consistent contact force and stable elasticity of the probes in operation.

Abstract: An information handling system includes a server and a bezel. The server includes multiple external ports and a mounting bracket. Multiple cables are connected to the external ports. The external ports are located within an air inlet surface of the server. The mounting bracket extends from the air inlet surface. The bezel includes a main frame and a filter. When the main frame is connected with the mounting bracket, the main frame covers the external ports and the cables. The cables extend through the cable router of the mounting bracket to exit an area between the main frame and the air inlet surface. The filter snap fits within the main frame, and provides air filtration to an airflow prior to the airflow being pulled into the server.

Abstract: A semiconductor package includes a first package component comprising: a first semiconductor die; a first encapsulant around the first semiconductor die; and a first redistribution structure electrically connected to the semiconductor die. The semiconductor package further includes a second package component bonded to the first package component, wherein the second package component comprises a second semiconductor die; a heat spreader between the first semiconductor die and the second package component; and a second encapsulant between the first package component and the second package component, wherein the second encapsulant has a lower thermal conductivity than the heat spreader.

Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a waveguide on a first side of the substrate. The semiconductor device further includes a photodetector (PD) on a second side of the substrate, opposite the first side of the substrate. The semiconductor device further includes an optical through via (OTV) optically connecting the PD with the waveguide, wherein the OTV extends through the substrate from the first side of the substrate to the second side of the substrate.

Abstract: A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.

Abstract: Disclosed are apparatus and methods for a silicon photonic (SiPh) structure comprising the integration of an electrical integrated circuit (EIC); a photonic integrated circuit (PIC) disposed on top of the EIC; two or more polymer waveguides (PWGs) disposed on top of the PIC and formed by layers of cladding polymer and core polymer; and an integration fan-out redistribution (InFO RDL) layer disposed on top of the two or more PWGs. The operation of PWGs is based on the refractive indexes of the cladding and core polymers. Inter-layer optical signals coupling is provided by edge-coupling, reflective prisms and grating coupling. A wafer-level system implements a SiPh structure die and provides inter-die signal optical interconnections among the PWGs.

Abstract: An IC device includes a heat spreader, an electronic component over the heat spreader, an optical component over the electronic component, a multilayer structure over the optical component, and a redistribution structure over the multilayer structure. The multilayer structure includes a waveguide optically coupled to the optical component. The redistribution structure is electrically coupled to the electronic component by vias through the optical component and the multilayer structure.