Abstract: Methods and systems are provided characterizing a formation traversed by a wellbore, wherein the formation includes at least a flushed zone and an uninvaded zone, which involve obtaining well log data based on plurality of different well log measurements of the formation at multiple depths in the wellbore. The well log data is used by a computational model that solves for a set of petrophysical parameters that characterize a portion of the formation corresponding to the multiple depths in the wellbore, wherein the set of petrophysical parameters include a cementation exponent, a saturation exponent, and a flushed zone water resistivity. The solved-for set of petrophysical parameters can be used to determine a value of water saturation of the uninvaded zone for the portion of the formation corresponding to the multiple depths in the wellbore.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

Abstract: A method for manufacturing a semiconductor structure is provided. First, a first insulating layer is formed over a substrate, and a second insulating layer having an opening is formed over the first insulating layer. A conductive line structure is formed in the opening of the second insulating layer, thereby forming a contact void between the second insulating layer and the conductive line structure. A plasma oxide layer is conformally formed over the conductive line structure, the first insulating layer, and the contact void. A nitride capping layer is formed over the plasma oxide layer to fill the contact void. Then, nitrogen ions are introduced into a surface of the nitride capping layer surrounding the conductive line structure. An etching back process is performed to remove a portion of the nitride capping layer, thereby forming a refilled contact void between the first insulating layer and the conductive line structure.

Abstract: Disclosed are a leadframe, a bracket and an LED device. The leadframe includes a first photo-etched metal part, having a first electrode and a chip placement layer thereon, which has a greater length for short and long edges than those of the first electrode; and a second photo-etched metal part, composed of a second electrode and a connection layer thereon, which has a greater length for short and long edges than those of the second electrode; wherein a first long edge of the chip placement layer is flush with a first long edge of the first electrode, and a first long edge of the connection layer is flush with a first long edge of the second electrode; and wherein the chip placement layer and the connection layer are provided with L-shaped pins at corners of their first long edges to cover sidewalls of the corresponding corners.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

Abstract: A semiconductor device includes a substrate and a bit line structure disposed on the substrate. The bit line structure includes a first conductive structure and a second conductive structure, in which a material of the first conductive structure includes polysilicon. The second conductive structure is disposed in direct contact on the first conductive structure, in which a reactivity of a material of the second conductive structure to oxygen is larger than a reactivity of tungsten to oxygen.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

Abstract: Disclosed are a semiconductor sensing chip and a microfluidic sensing system. The microfluidics sensing system includes a first inlet and a second inlet, a fluidic structure, and a semiconductor sensing chip. The first inlet and the second inlet are respectively configured for injection of a sample and a reagent. The fluidic structure is coupled to the first inlet and the second inlet. The fluidic structure is configured to mix the sample and the reagent to generate a biofluid under test. The semiconductor sensing chip is disposed at the end of the fluidic structure and configured to sense the biofluidic under test and generate a concentration sensing result corresponding to the sample.

Abstract: The present disclosure provides a lyophilized powder containing a boron complex. The lyophilized powder includes a sugar acid and a complex formed by a dehydration condensation reaction of a dihydroxyboryl compound and a sugar or a sugar alcohol. The present disclosure also provides a method of forming a lyophilized powder containing a boron complex. The method includes the following operations. A dihydroxyboryl compound and a sugar or a sugar alcohol are mixed to form a mixture, and the mixture includes a complex formed by a dehydration condensation reaction of the dihydroxyboryl compound and the sugar or the sugar alcohol. The mixture is immersed in liquid nitrogen to freeze the mixture to form a pre-frozen body. A vacuum drying process is performed to evaporate water of the pre-frozen body to form a lyophilized powder.

Abstract: A method for evaluating saturation of a kerogen bearing subterranean formation includes obtaining conductivity and permittivity values of the formation and providing an effective medium model relating the conductivity and the permittivity to a water filled porosity of the formation and an effective aspect ratio of graphitic kerogen particulate in the formation. The obtained conductivity and the permittivity values are input into the model which is in turn processed to compute the water filled porosity. The method may further optionally include evaluating the water filled porosity to estimate a hydrocarbon producibility of the formation.

Abstract: An auxiliary method for motion guidance performs the following steps by a server: obtaining a video recording a human body performing a motion, analyzing the video to generate a plurality of skeleton coordinate sequences corresponding to the human body by a skeleton analysis module, specifying a key frame by a key frame analysis model at least according to the video and the plurality of skeleton coordinate sequences, generating an auxiliary image by a pose correction analysis model according to the key frame, a key skeleton coordinate corresponding to the key frame, and a skeleton coordinate template, and sending the video and a recommended guidance to an electronic device by the server, where the recommended guidance includes a composition result of the key frame and the auxiliary image.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate having a first surface, a plurality of layers disposed on the first surface of the substrate. The plurality of layers includes a first nitride layer disposed on the first surface of the substrate, a first silicon-containing layer disposed on the first nitride layer, an intermediate nitride layer disposed on the first silicon-containing layer, a second silicon-containing layer disposed on the intermediate nitride layer, and a second nitride layer disposed on the second silicon-containing layer. In addition, the semiconductor structure includes a trench capacitor penetrating the plurality of layers and in contact with the substrate. The trench capacitor has a first portion having a first lateral surface and a second portion having a second lateral surface, and the first lateral surface has a slope different from that of the second lateral surface.

Abstract: A method for manufacturing a semiconductor structure is provided. First, a first insulating layer is formed over a substrate, and a second insulating layer having an opening is formed over the first insulating layer. A conductive line structure is formed in the opening of the second insulating layer, thereby forming a contact void between the second insulating layer and the conductive line structure. A plasma oxide layer is conformally formed over the conductive line structure, the first insulating layer, and the contact void. A nitride capping layer is formed over the plasma oxide layer to fill the contact void. Then, nitrogen ions are introduced into a surface of the nitride capping layer surrounding the conductive line structure. An etching back process is performed to remove a portion of the nitride capping layer, thereby forming a refilled contact void between the first insulating layer and the conductive line structure.

Abstract: A method for manufacturing a semiconductor structure is provided. First, a first insulating layer is formed over a substrate, and a second insulating layer having an opening is formed over the first insulating layer. A conductive line structure is formed in the opening of the second insulating layer, thereby forming a contact void between the second insulating layer and the conductive line structure. A plasma oxide layer is conformally formed over the conductive line structure, the first insulating layer, and the contact void. A nitride capping layer is formed over the plasma oxide layer to fill the contact void. Then, nitrogen ions are introduced into a surface of the nitride capping layer surrounding the conductive line structure. An etching back process is performed to remove a portion of the nitride capping layer, thereby forming a refilled contact void between the first insulating layer and the conductive line structure.

Abstract: An intermediate is provided herein, and it has the structure shown in the formula (1) as follows: formula (1). In the formula (1), R1 is —Cl, —Br, —I, —OSO2CF3, —B(OH)2, or R2 is —F, —18F, —Cl, —Br, —I, —SnMe3, —SnBu3, —B(OH)2, or and A is a chiral auxiliary.

Abstract: A temperature controlling method is provided, which is suitable for a communication system including a plurality of communication chips. The temperature controlling method includes the following operations: calculating an average temperature of each communication chip; if a first flag parameter corresponding to a first chip of the plurality of communication chips is a predetermined value, adjusting a first transmission rate of the first chip according to the average temperature of the first chip; and if the first flag parameter corresponding to the first chip is different from the predetermined value, adjusting the first transmission rate according to the average temperature of a second chip of the plurality of communication chips.