Abstract: A data encoding method, a data decoding method, and a storage controller are provided. The encoding method includes: obtaining a verification data corresponding to a raw data according to a write command; adding the verification data to the raw data, and obtaining a scrambled data accordingly; and performing an encoding operation on the scrambled data to obtain a codeword data. The decoding method includes: performing a decoding operation on a codeword data to obtain a decoded codeword data, and obtaining a pre-scrambling data accordingly; identifying a verification data and a raw data in the pre-scrambling data; identifying one or more first system data corresponding to the raw data according to a read command; and determining whether the raw data is correct by comparing the one or more first system data and the verification data.

Abstract: A memory management method and a storage controller are provided. The method includes performing a decoding operation to a first data stored in a first word line among multiple word lines of a rewritable non-volatile memory module to determine whether the decoding operation is successful or failed, and obtain a first error value of the first word line; when the decoding operation is determined as successful, determining whether to mark the first word line as a bad word line according to the first error value and a first threshold; and when the decoding operation is determined as failed, obtaining a second error value of a second word line adjacent to the first word line, and determining whether to mark both of the first and second word lines as the bad word line according to the first error value, the second error value, and a first threshold.

Abstract: A decoding method, a memory storage device, and a memory control circuit unit are provided. The decoding method includes: reading a codeword from a memory module and estimating error level information of the codeword; inputting the codeword and the error level information to an error checking and correcting circuit through a first message channel and a second message channel respectively; determining whether the error level information meets a default condition; if yes, inputting the codeword to a first decoding engine of the error checking and correcting circuit for decoding; otherwise, inputting the codeword to a second decoding engine of the error checking and correcting circuit for decoding, wherein a power consumption of the first decoding engine is lower than that of the second decoding engine, and a decoding success rate of the first decoding engine is lower than that of the second decoding engine. Therefore, an operating flexibility for decoding may be improved.

Abstract: A data reading method and a storage controller for a rewritable non-volatile memory module are provided. The method includes identifying a plurality of preset bit values corresponding to a plurality of first memory cells of a first physical unit; reading the first memory cells by respectively using a plurality of preset read voltages to obtain a plurality of read bit values corresponding to the first memory cells; adjusting the preset read voltages based on the identified preset bit values and the read bit values corresponding to the first memory cells to obtain a plurality of optimized read voltages; and executing a read command sequence on the first physical unit by using the optimized read voltages.

Abstract: A permutation network designing method and a permutation circuit using the same are provided. The method includes: identifying a predetermined check matrix of the QC-LDPC decoder, wherein the check matrix comprises M×N sub-matrices, wherein each of the sub-matrices is a Z×Z matrix, wherein Z is a default dimension value of each of the sub-matrices; constructing a second permutation network of a permutation circuit by removing a target first permutation layer from a first permutation layer according to a shift type of the check matrix, wherein the amount of a plurality of second permutation layers and the amount of the second nodes of each of the second permutation layers are set according to the default dimension value; and disposing a plurality of selectors on the second nodes of the constructed second permutation network of the permutation circuit.

Abstract: A data backup method, a data recovery method and a storage controller for a rewritable non-volatile memory module are provided. The data backup method includes receiving a trim command; generating a trim information list according to the trim command and a physical address that stores the trim information list, wherein the trim information list records information corresponding to the trim command and the physical address; storing the generated trim information list into the physical address. The data recovery method includes re-establishing a logical-to-physical table; loading a latest trim information list into a memory from the rewritable non-volatile memory module; updating the re-established logical-to-physical table or the trim information list in the memory according to the trim information.

Abstract: A permutation network designing method and a permutation circuit using the same are provided. The method includes: identifying a predetermined check matrix of the QC-LDPC decoder, wherein the check matrix comprises M×N sub-matrices, wherein each of the sub-matrices is a Z×Z matrix, wherein Z is a default dimension value of each of the sub-matrices; constructing a permutation network of a permutation circuit according to the default dimension value and a saving parameter, wherein the permutation network comprises a plurality of permutation layers arranged sequentially, and each of the permutation layers has the same amount of nodes, wherein the amount of the permutation layers and the amount of the nodes of each of the permutation layers are set according to the default dimension value and a saving parameter; and disposing a plurality of selectors on the nodes of the permutation network of the permutation circuit.

Abstract: A data backup method and a data recovery method are provided. The data backup method includes: updating a main information table and a sub information table and generating physical unit information according to an erase count and a physical unit status of a physical unit; writing the physical unit information into the physical unit before writing data into the empty physical unit; writing the main information table and the sub information table into a rewritable non-volatile memory module according to corresponding conditions. The data recovery method includes: writing a latest main information table stored in a rewritable non-volatile memory module into a memory; updating the main information table in the memory according to a sub information table which is newer than the main information table; and updating the main information table in the memory according to physical unit information which is newer than the sub information table.

Abstract: A data reading method for a rewritable non-volatile memory module is provided. The method includes receiving a reading command from a host system; identifying a target physical unit of the rewritable non-volatile memory module according to the reading command, and identifying a program erase cycle value, a first timestamp, a second timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is programmed last, and the second timestamp records a time at which the target physical unit is read last; and selecting a target reading voltage set among a plurality of reading voltage set according to the program erase cycle value, the first timestamp, the second timestamp, so as to read a target data from the target physical unit.

Abstract: A memory management method is provided. The method includes writing a plurality of first data into a first physical block and storing a first stamp corresponding to the first physical block; writing a plurality of second data into a second physical block and storing a second stamp corresponding to the second physical block, wherein the second stamp is greater than the first stamp; moving a plurality of third data in the first data in the first physical block to a third physical block, wherein the third data are valid data and the third data match a specific type; and storing a third stamp corresponding to the third physical block and updating the second stamp corresponding to the second physical block to a fourth stamp, wherein the fourth stamp is greater than the third stamp and the third stamp is greater than or equal to the second stamp.

Abstract: A data writing method is provided. The method includes writing a first write data into a first physical sub-unit in a storage device according to a first write command; recording a first meta data corresponding to the first write data into the storage device; writing a second write data into a second physical sub-unit in the storage device; recording a second meta data corresponding to the second write data into the storage device. A second write identification code of the second meta data is set to be different from a first write identification code of the first meta data if the second physical unit is closely adjacent to the first physical unit and the second write data is written according to the second write command; and whether the second write data is valid or invalid is determined according to the second meta data if a special event occurs.

Abstract: A data writing method is provided. The method includes writing a first write data into a first physical sub-unit in a storage device according to a first write command; recording a first meta data corresponding to the first write data into the storage device; writing a second write data into a second physical sub-unit in the storage device; recording a second meta data corresponding to the second write data into the storage device. A second write identification code of the second meta data is set to be different from a first write identification code of the first meta data if the second physical unit is closely adjacent to the first physical unit and the second write data is written according to the second write command; and whether the second write data is valid or invalid is determined according to the second meta data if a special event occurs.

Abstract: A decoding method for low density parity code is provided. The method includes performing an iterative decoding operation for a codeword, wherein a plurality of Log-Likelihood-Ratios correspond respectively to a plurality of data bits of the codeword; determining whether the iterative decoding operation is successful; determining whether a perturbation condition is met if the iterative decoding operation is not successful; performing protect operation for a first Log-Likelihood-Ratio among the Log-Likelihood-Ratios, and performing a perturbation operation for a plurality of second Log-Likelihood-Ratios among the Log-Likelihood-Ratios, wherein the second Log-Likelihood-Ratios are different to the first Log-Likelihood-Ratio; and re-performing the iterative decoding operation for the codeword after finishing the perturbation operation.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are provided. The decoding method includes: reading memory cells based on a default hard-decision voltage level and decoding the obtained hard-bit information; if the decoding fails, reading the memory cells based on default soft-decision voltage levels and then decoding the obtained soft-bit information; if the decoding still fails, reading the memory cells based on first test voltage levels to obtain first soft-bit information and reading the memory cells based on second test voltage levels to obtain second soft-bit information; obtaining a first estimating parameter and a second estimating parameter according to the first soft-bit information and the second soft-bit information, respectively; and updating the default hard-decision voltage level according to the first estimating parameter and the second estimating parameter. As a result, a decoding efficiency can be improved.

Abstract: A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: configuring a default encoding rule for a first physical erasing unit which includes encoding data to be stored to the first physical erasing unit based on a default code rate; configuring a first encoding rule, for the first physical erasing unit according to error estimating information of the first physical erasing unit, which includes encoding data to be stored to a first-type physical programming unit and a second-type physical programming unit belonging to the first physical erasing unit based on a first code rate and a second code rate respectively, where a value of the first code rate is greater than a value of the default code rate, and a value of the second code rate is less than the value of the default code rate.

Abstract: A memory management method is provided. The method includes writing a plurality of first data into a first physical block and storing a first stamp corresponding to the first physical block; writing a plurality of second data into a second physical block and storing a second stamp corresponding to the second physical block, wherein the second stamp is greater than the first stamp; moving a plurality of third data in the first data in the first physical block to a third physical block, wherein the third data are valid data and the third data match a specific type; and storing a third stamp corresponding to the third physical block and updating the second stamp corresponding to the second physical block to a fourth stamp, wherein the fourth stamp is greater than the third stamp and the third stamp is greater than or equal to the second stamp.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are provided. The decoding method includes: reading a target physical unit based on a first read voltage level; performing a first decoding operation; reading an authentication physical unit based on a first candidate voltage level to obtain first assistance data and reading the authentication physical unit based on a second candidate voltage level to obtain second assistance data if the first decoding operation fails; obtaining a first estimation parameter according to the first assistance data and authentication data and obtaining a second estimation parameter according to the second assistance data and the authentication data; determining a second read voltage level according to the first estimation parameter and the second estimation parameter; and reading the target physical unit again based on the second read voltage level. Accordingly, the decoding efficiency may be improved.

Abstract: A decoding method, a memory storage device and a memory control circuit unit are provided. The method includes: programming first data into a first physical unit of a rewritable non-volatile memory module; reading the first physical unit to obtain second data; obtaining a first threshold voltage distribution of a first bit-value and a second threshold voltage distribution of a second bit-value according to the first data and the second data, wherein the first bit-value and the second bit-value are different; calculating first channel reliability information corresponding to the first physical unit according to the first threshold voltage distribution and the second threshold voltage distribution; and decoding third data stored in the first physical unit according to the first channel reliability information. Therefore, decoding efficiency for the first physical unit is improved.

Abstract: A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: configuring a default encoding rule for a first physical erasing unit which includes encoding data to be stored to the first physical erasing unit based on a default code rate; configuring a first encoding rule, for the first physical erasing unit according to error estimating information of the first physical erasing unit, which includes encoding data to be stored to a first-type physical programming unit and a second-type physical programming unit belonging to the first physical erasing unit based on a first code rate and a second code rate respectively, where a value of the first code rate is greater than a value of the default code rate, and a value of the second code rate is less than the value of the default code rate.

Abstract: A decoding method for low density parity code is provided. The method includes performing an iterative decoding operation for a codeword, wherein a plurality of Log-Likelihood-Ratios correspond respectively to a plurality of data bits of the codeword; determining whether the iterative decoding operation is successful; determining whether a perturbation condition is met if the iterative decoding operation is not successful; performing protect operation for a first Log-Likelihood-Ratio among the Log-Likelihood-Ratios, and performing a perturbation operation for a plurality of second Log-Likelihood-Ratios among the Log-Likelihood-Ratios, wherein the second Log-Likelihood-Ratios are different to the first Log-Likelihood-Ratio; and re-performing the iterative decoding operation for the codeword after finishing the perturbation operation.