Patents by Inventor Yu-hung Huang

Yu-hung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088307
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240079263
    Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.
    Type: Application
    Filed: February 22, 2023
    Publication date: March 7, 2024
    Inventors: Kai-Hung HSIAO, Chi-Chung JEN, Yu-Chun SHEN, Yuan-Cheng KUO, Chih-Hsiung HUANG, Wen-Chih CHIANG
  • Patent number: 11913047
    Abstract: A method for producing ?-aminobutyric acid includes cultivating, in a culture medium containing glutamic acid or a salt thereof, a probiotic composition including at least one lactic acid bacterial strain selected from the group consisting of Bifidobacterium breve CCFM1025 which is deposited at the Guangdong Microbial Culture Collection Center under an accession number GDMCC 60386, Lactobacillus acidophilus TYCA06, Lactobacillus plantarum LPL28, and Bifidobacterium longum subsp. infantis BLI-02 which are deposited at the China General Microbiological Culture Collection Center respectively under accession numbers CGMCC 15210, CGMCC 17954, and CGMCC 15212, Lactobacillus salivarius subsp. salicinius AP-32 which is deposited at the China Center for Type Culture Collection under an accession number CCTCC M 2011127, and combinations thereof.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 27, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yu-Fen Huang, Chen-Hung Hsu, Wen-Yang Lin, Yi-Wei Kuo, Shin-Yu Tsai
  • Patent number: 11915957
    Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yi-Fam Shiu, Yu-Chen Chen, Yang-Ann Chu, Jiun-Rong Pai
  • Patent number: 11486652
    Abstract: A heat-dissipating device includes a condenser and an evaporator. The condenser includes a shell and a main capillary wick. The shell has a chamber and a through hole communicating with the chamber. The main capillary wick is disposed in the chamber. The evaporator has an evaporating section, a gas conduit and a liquid conduit. The evaporating section has a gas cavity, and the liquid conduit communicating with the chamber and filling with a liquid. The liquid conduit having a hole communicating with the gas cavity is inserted in the gas conduit and the gas cavity. A stepped area is formed between the liquid conduit and the chamber for gathering the liquid flowing into the liquid conduit.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: November 1, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Hung Huang, Li-Kuang Tan, Wei-Fang Wu
  • Patent number: 11322207
    Abstract: A program method for a memory device is provided. The memory device includes a plurality of memory cells, a bit line and word lines electrically connected to the plurality of memory cells. The plurality of memory cells includes a selected memory cell and unselected memory cells when the memory device is in a program operation. The program method including performing precharge steps, performing program steps and performing a verification step to the selected memory cell after the precharge steps and the program steps. Each of the precharge steps includes applying a precharge voltage to the bit line electrically connected to the unselected memory cells. Each of the program steps includes applying a program voltage to a word line of the word lines electrically connected to the selected memory cell.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: May 3, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Cheng-Hsien Cheng, Yu-Hung Huang, Chia-Hong Lee, Yin-Jen Chen
  • Patent number: 11289132
    Abstract: The present invention discloses an operation method of memory device, applied to a memory device including a number of word lines and one or more functional lines. The operation method includes: receiving a read command for a target memory cell of the memory device; and outputting a signal having a first waveform to a target word line corresponding to the target memory cell to be read among a plurality of the word lines of the memory device, output a signal having a second waveform to the one or more functional lines of the memory device, and output a signal having a third waveform to the word lines other than the target word line. A falling time of the third waveform is longer than a falling time of the first waveform.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: March 29, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Hung Huang, Cheng-Hsien Cheng, Chih-Chieh Cheng, Yin-Jen Chen
  • Patent number: 11217951
    Abstract: The present disclosure provides an AC power adapter comprising input connectors, first power conveying wires, a junction box, a power conveying wire assembly and a plug. The first power conveying wire is coupled to the input connector and includes an input neutral wire, an input live wire and an input ground wire. The power conveying wire assembly is electrically connected to the first power conveying wire through the junction box and includes plural output neutral wires, plural output live wires and an output ground wire. The output neutral wires are coupled to the input neutral wires respectively, the output live wires are coupled to the input live wires respectively, and the output ground wire is coupled to the input ground wires. The plug includes a housing and an electrical connector. The power conveying wire assembly is inserted into the housing and connected with the electrical connector.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: January 4, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Hung Huang
  • Patent number: 11217971
    Abstract: The present disclosure provides an AC power adapter comprising plural connectors, plural first power conveying wires, a junction box, a power conveying wire assembly and a plug. The first power conveying wire is connected with the connector and comprises an input neutral wire, an input live wire and an input ground wire. The first power conveying wire is inserted into the junction box. The power conveying wire assembly is inserted into the junction box and comprises plural output neutral wires, plural output live wires and an output ground wire. The output neutral wires are connected with the input neutral wires one-to-one, the output live wires are connected with the input live wires one-to-one, and the output ground wire is connected with the input ground wires. The plug comprises a housing and an electrical connector. The power conveying wire assembly is inserted into the housing and connected with the electrical connector.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: January 4, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Hung Huang
  • Patent number: 11062759
    Abstract: A memory device and a programming method thereof are provided. The memory device includes a memory array, a plurality of word lines and a voltage generator. During a programming procedure, one of the word lines is at a selected state and others of the word lines are at a deselected state. Some of the word lines, which are at the deselected state, are classified into a first group and a second group. The first group and the second group are respectively located at two sides of the word line, which is at the selected state. The voltage generator provides a programming voltage to the word line, which is at the select state, during a programming duration. The voltage generator provides a first two-stage voltage waveform to the word lines in the first group and provides a second two-stage voltage waveform to the word lines in the second group.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: July 13, 2021
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Shaw-Hung Ku, Cheng-Hsien Cheng, Atsuhiro Suzuki, Yu-Hung Huang, Sheng-Kai Chen, Wen-Jer Tsai
  • Patent number: 11037632
    Abstract: Provided is an erase method for a multi-tier three-dimension (3D) memory including a plurality of tiers and a plurality of blocks, each of the tiers including a plurality of word lines. The erase method includes: in erasing a selected block among the plurality of blocks, in a current iteration, selecting at least one tier among the plurality of tiers to be erased by a first erase voltage; determining whether the at least one tier passes erase verification; and if the at least one tier passes erase verification, in a next iteration, inhibiting the at least tier which already passes erase verification from erase.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: June 15, 2021
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Shaw-Hung Ku, Chih-Chieh Cheng, Cheng-Hsien Cheng, Yu-Hung Huang, Atsuhiro Suzuki, Wen-Jer Tsai
  • Patent number: 10951013
    Abstract: A multiple input power distribution shelf and a bus bar assembly thereof are provided. The power distribution shelf is installed in the server rack and comprises plural power supply units. The bus bar assembly comprises a first linking bus bar, a second linking bus bar, an insulation member and plural power connectors. The first linking bus bar comprises a first main bar, plural first bending parts and at least one first output part. The second linking bus bar comprises a second main bar, plural second bending parts and at least one second output part. The insulation member is disposed between the first main bar and the second main bar for insulation. The power connectors are mounted on the bending parts and connect with the power supply units. The first output part and the second output part are electrically connected with a rack bus bar of the server rack.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: March 16, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Hung Huang
  • Publication number: 20200358265
    Abstract: The present disclosure provides an AC power adapter comprising plural connectors, plural first power conveying wires, a junction box, a power conveying wire assembly and a plug. The first power conveying wire is connected with the connector and comprises an input neutral wire, an input live wire and an input ground wire. The first power conveying wire is inserted into the junction box. The power conveying wire assembly is inserted into the junction box and comprises plural output neutral wires, plural output live wires and an output ground wire. The output neutral wires are connected with the input neutral wires one-to-one, the output live wires are connected with the input live wires one-to-one, and the output ground wire is connected with the input ground wires. The plug comprises a housing and an electrical connector. The power conveying wire assembly is inserted into the housing and connected with the electrical connector.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 12, 2020
    Inventor: Yu-Hung Huang
  • Publication number: 20200350735
    Abstract: The present disclosure provides an AC power adapter comprising input connectors, first power conveying wires, a junction box, a power conveying wire assembly and a plug. The first power conveying wire is coupled to the input connector and includes an input neutral wire, an input live wire and an input ground wire. The power conveying wire assembly is electrically connected to the first power conveying wire through the junction box and includes plural output neutral wires, plural output live wires and an output ground wire. The output neutral wires are coupled to the input neutral wires respectively, the output live wires are coupled to the input live wires respectively, and the output ground wire is coupled to the input ground wires. The plug includes a housing and an electrical connector. The power conveying wire assembly is inserted into the housing and connected with the electrical connector.
    Type: Application
    Filed: July 15, 2020
    Publication date: November 5, 2020
    Inventor: Yu-Hung Huang
  • Patent number: 10796753
    Abstract: A method for determining quick-pass-write (QPW) operation in increment-step-program-pulse (ISPP) operation is provided. The QPW operation is simultaneously applying a bit line voltage during the ISPP operation. The method includes, according to bit line voltages varying in a first range and voltage difference values varying in a second range with respect to a verified voltage, estimating a shrinkage quantity of threshold voltage distribution width at each bit line voltage and each voltage difference value, so as to obtain a shrinkage-quantity topographic contour. According to the bit line voltages and the voltage difference values, a program shot number as needed to achieve the verified voltage is estimated, so as to obtain a program-shot-number topographic contour.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: October 6, 2020
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Hung Huang, Cheng-Hsien Cheng, Shaw-Hung Ku, Yin-Jen Chen
  • Patent number: 10770869
    Abstract: The present disclosure provides an AC power adapter comprising plural connectors, plural first power conveying wires, a junction box, a power conveying wire assembly and a plug. The first power conveying wire is connected with the connector and comprises an input neutral wire, an input live wire and an input ground wire. The first power conveying wire is inserted into the junction box. The power conveying wire assembly is inserted into the junction box and comprises plural output neutral wires, plural output live wires and an output ground wire. The output neutral wires are connected with the input neutral wires one-to-one, the output live wires are connected with the input live wires one-to-one, and the output ground wire is connected with the input ground wires. The plug comprises a housing and an electrical connector. The power conveying wire assembly is inserted into the housing and connected with the electrical connector.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: September 8, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Hung Huang
  • Publication number: 20190378812
    Abstract: A device for producing semiconductor bump metal layer includes a front end transfer module including a normal pressure transfer chamber, a base material carrier, a heating and carrying interlock vacuum chamber, and a cooling interlock vacuum chamber; a pre-cooking device for receiving the plurality of base materials, forming high vacuum, and baking the base materials; a rear end cleaning sputtering module for receiving the plurality of base materials and cleaning the plurality of base materials and sputtering metal layers; then the plurality of base materials being transferred to the cooling interlock vacuum chamber. The robot in the normal pressure transfer chamber transfers the base materials to the pre-cooking device so as to bake the base materials in high vacuum to remove vapors in the plurality of base materials; then the base materials are transferred to the heating and carrying interlock vacuum chamber for baking again to a predetermined level.
    Type: Application
    Filed: June 10, 2018
    Publication date: December 12, 2019
    Inventors: Yu-Hung Huang, Ying Hsien Chen, Hsin Yu Yao, Wei Liang Chan, Kuei Chang Peng, Nai Wei Yu, Yi Hsiang Chen
  • Publication number: 20190355560
    Abstract: A PVD reactor with a function of alignment in covering an upper cover includes a cavity having a first contact surface; an interior of the cavity having a metal isolation plate; an upper cover pivotally installed to the cavity; the upper cover having a second contact surface which is positioned corresponding to the first contact surface of the cavity; the upper cover being capable of being combined with a target; a plurality of semi-spherical recesses in the first contact surface of the cavity; and a plurality of semi-spherical protrusions in the second contact surface; when the upper cover covers upon the cavity, the plurality of semi-spherical protrusions will embed into the plurality of semi-spherical recesses.
    Type: Application
    Filed: May 21, 2018
    Publication date: November 21, 2019
    Inventors: YING HSIEN CHENG, Yuan Yuan Song, Wei Chuan Chou, Hsin-Chih Chiu, Yu Hung Huang, Kuei Chang Peng
  • Patent number: D867300
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: November 19, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Hung Huang