Patents by Inventor Yu Jen Chen

Yu Jen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12039240
    Abstract: An integrated circuit simulation method is performed by a processor and includes: obtaining a register transfer level (RTL) waveform set obtained by performing an RTL simulation based on a circuit, where the circuit is generated in an RTL design stage and includes a register having an internal net and a data output port, and the RTL waveform set includes a first waveform corresponding to the data output port of the register; obtaining a netlist and delay information obtained by performing a logic synthesis based on the circuit, where the netlist includes a first node and a second node, the first node corresponds to the internal net of the register, and the second node corresponds to the data output port of the register; applying the first waveform to the first node; and triggering the register according to the delay information to obtain a second waveform at the second node.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: July 16, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Hsing-Han Tseng, Yung-Jen Chen, Yu-Lan Lo
  • Patent number: 12037448
    Abstract: A method of manufacturing copolymer includes mixing and reacting a polyester, an aliphatic polyol or an aliphatic polyol oligomer, and a first catalyst in a first region of a screw to form a polyester polyol, and side-feeding a lactone or a lactam to a second region of the screw to copolymerize the lactone or a lactam and the polyester polyol to form a copolymer, wherein the first region and the second region are continuous connecting regions.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: July 16, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Feng-Jen Hsieh, Kuan-Yeh Huang, Yen-Ming Chen, Yu-Chieh Chou, Jyh-Jian Tai, Liang-Che Chen
  • Patent number: 12013736
    Abstract: A power supply system includes a plurality of power modules for supplying power to a load, and each power module provides an output current according to a modulation signal, and provides the output current to a power bus through an output end and supply the output current to the load through the power bus. Each power module is connected to a common-connected point of a signal bus to generate a second voltage level, acquires a first ratio according to a full-load output power of the conversion circuit corresponding to the controller and the full-load output power of the power module capable of outputting the maximum power, adjusts the first voltage level according to the first ratio and the second voltage level to adjust the amplified signal by adjusting the first voltage level, and adjusts the output current to a target value corresponding to the first ratio by adjusting the amplified signal.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: June 18, 2024
    Assignee: CHICONY POWER TECHNOLOGY CO., LTD.
    Inventors: Chin-Pin Chen, Yu-Jen Chen
  • Publication number: 20240119200
    Abstract: A method of building a characteristic model includes: acquiring raw electrical data from a measurement system outside one or more processing units; acquiring operational state-related data from an information collector inside the one or more processing units; performing a data annealing process on the raw electrical data and the operational state-related data to obtain and purified electrical data and purified operational state-related data; and performing a machine learning (ML)-based process to build the characteristic model based on the purified electrical data and the purified operational state-related data.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 11, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yu-Jen Chen, Chien-Chih Wang, Wen-Wen Hsieh, Ying-Yi Teng
  • Publication number: 20240090190
    Abstract: A semiconductor device includes: first and second active regions extending in a first direction and separated by a gap relative to a second direction substantially perpendicular to the first direction; and gate structures correspondingly over the first and second active regions, the gate structures extending in the second direction; and each of the gate structures extending at least unilaterally substantially beyond a first side of the corresponding first or second active region that is proximal to the gap or a second side of the corresponding first or second active region that is distal to the gap; and some but not all of the gate structures also extending bilaterally substantially beyond each of the first and second sides of the corresponding first or second active region.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Jen CHEN, Wen-Hsi LEE, Ling-Sung WANG, I-Shan HUANG, Chan-yu HUNG
  • Publication number: 20240007302
    Abstract: A data verification system comprises a provider-end computer apparatus and a request-end computer apparatus. The provider-end computer apparatus is configured to: receive a request of data from the request-end computer apparatus; retrieve a data cluster designated in the request of data; execute a first fingerprint process on an unrequested part of the data cluster, which includes everything in the data cluster other than a requested part so as to obtain an unrequested data fingerprint; and return the requested part of the data cluster and the unrequested data fingerprint to the request-end computer apparatus.
    Type: Application
    Filed: September 18, 2023
    Publication date: January 4, 2024
    Inventors: NAI-HO HSU, CHI-KUANG LEE, YU-JEN CHEN
  • Publication number: 20230409096
    Abstract: A power supply system includes a plurality of power modules for supplying power to a load, and each power module provides an output current according to a modulation signal, and provides the output current to a power bus through an output end and supply the output current to the load through the power bus. Each power module is connected to a common-connected point of a signal bus to generate a second voltage level, acquires a first ratio according to a full-load output power of the conversion circuit corresponding to the controller and the full-load output power of the power module capable of outputting the maximum power, adjusts the first voltage level according to the first ratio and the second voltage level to adjust the amplified signal by adjusting the first voltage level, and adjusts the output current to a target value corresponding to the first ratio by adjusting the amplified signal.
    Type: Application
    Filed: December 7, 2022
    Publication date: December 21, 2023
    Inventors: Chin-Pin CHEN, Yu-Jen CHEN
  • Patent number: 11844205
    Abstract: A semiconductor device includes: first and second active regions extending in a first direction and separated by a gap relative to a second direction; and gate structures correspondingly over the first and second active regions, the gate structures extending in the second direction; and for each active region, a portion of each of some but not all of the gate structures (gate extension) extending partially into the gap; and when viewing the gate structures as a group, the group having a notched profile relative to the second direction, where notches in the notched profile correspond to ones of the gate structures which are substantially free of extending into the gap.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: December 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jen Chen, Wen-Hsi Lee, Ling-Sung Wang, I-Shan Huang, Chan-yu Hung
  • Publication number: 20230385508
    Abstract: A semiconductor structure includes first and second active regions extending in a first direction. The semiconductor structure further includes gate electrodes extending in a second direction perpendicular to the first direction. Each of the gate electrodes includes a first segment over at least one of the first active region or the second active region; a gate extension extending beyond each of the first active region and the second active region, wherein the gate extension has a uniform width in the first direction, and a conductive element, wherein a width of the conductive element in the first direction increases as a distance from the gate extension increases along an entirety of the conductive element in the second direction.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 30, 2023
    Inventors: Yu-Jen CHEN, Ling-Sung WANG, I-Shan HUANG, Chan-yu HUNG
  • Patent number: 11810934
    Abstract: An image sensor is provided. The image sensor includes a substrate having a first pixel region and a second pixel region. The image sensor also includes a resonator structure disposed over the substrate. The resonator structure includes a first metal layer over the first pixel region and the second pixel region. The resonator structure also includes a first insulating layer over the first metal layer and the first pixel region. The first insulating layer has a first thickness. The resonator structure further includes a second insulating layer over the first metal layer and the second pixel region. The second insulating layer has a second thickness that is greater than the first thickness. In addition, the resonator structure includes a second metal layer over the first insulating layer and the second insulating layer.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: November 7, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Yu-Jen Chen, Chang-Wei Chen
  • Publication number: 20230337971
    Abstract: A detecting method for a behavior disorder event during rapid-eye-movement sleep is provided. The detecting method includes: collecting a heart rate value and a motion value of a user per epoch within a time period; generating a plurality of corresponding sleep condition values by using the motion values, to distinguish epochs into an awake period and a sleep period; transforming the motion values corresponding to the sleep period into a score according to a predetermined rule, to generate a plurality of sleep depth scores, and distinguishing the sleep period into a light sleep period and a deep sleep period by using the sleep depth scores; grouping the heart rate values corresponding to the deep sleep period as a high heart rate group and a low heart rate group; and determining, when the motion values corresponding to the high heart rate group satisfy a condition, that a behavior disorder event happens.
    Type: Application
    Filed: October 31, 2022
    Publication date: October 26, 2023
    Inventors: Pei-Chi CHUANG, Chun-Hsiang TSAI, Yu-Jen CHEN, Ching-Fu WANG, Shih-Zhang LI, Sheng-Huang LIN, Pei-Hsin KUO, You-Yin CHEN
  • Patent number: 11764970
    Abstract: A method of verifying partial data based on collective certificate is provided. A provider-end computer apparatus receives a request of data, retrieves a data cluster, executes a fingerprint process on the unrequested part of the data cluster for obtaining an unrequested data fingerprint, and transfer the requested part of the data cluster and the unrequested data fingerprint to a request-end computer apparatus. The request-end computer apparatus retrieves a trusty collective data fingerprint, executes the fingerprint process on the requested part of the data cluster for obtaining a requested data fingerprint, merges the unrequested data fingerprint and the requested data fingerprint into a merged collective data fingerprint, and determines that the requested part is correct if the merged collective data is consistent with the trusty collective data fingerprint. The present disclosed example can effectively verify correctness of the requested part of data.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: September 19, 2023
    Assignee: AuthMe Co., Ltd.
    Inventors: Nai-ho Hsu, Chi-Kuang Lee, Yu-Jen Chen
  • Patent number: 11763061
    Abstract: A method of making a semiconductor structure includes forming a plurality of gate electrodes over a plurality of active regions. The method further includes increasing a width of a portion of each of the plurality of gate electrodes between adjacent active regions of the plurality of active regions, wherein increasing the width of the portion of each of the plurality of gate electrodes comprises increasing the width of less than an entirety of each of the plurality of gate electrodes between the adjacent active regions. The method further includes removing a central region of each of the plurality of gate electrodes, wherein the central region has the increased width, and removing the central region comprises removing less than an entirety of the portion of each of the plurality of gate electrodes.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: September 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jen Chen, Ling-Sung Wang, I-Shan Huang, Chan-Yu Hung
  • Publication number: 20230284428
    Abstract: A semiconductor device includes: first and second active regions extending in a first direction and separated by a gap relative to a second direction; and gate structures correspondingly over the first and second active regions, the gate structures extending in the second direction; and for each active region, a portion of each of some but not all of the gate structures (gate extension) extending partially into the gap; and when viewing the gate structures as a group, the group having a notched profile relative to the second direction, where notches in the notched profile correspond to ones of the gate structures which are substantially free of extending into the gap.
    Type: Application
    Filed: February 21, 2023
    Publication date: September 7, 2023
    Inventors: Yu-Jen CHEN, Wen-Hsi LEE, Ling-Sung WANG, I-Shan HUANG, Chan-yu HUNG
  • Patent number: 11725406
    Abstract: The present disclosure provides a spraying system and a using method thereof. The spraying system includes a lifting apparatus and a spraying apparatus. The spraying apparatus connects to the lifting apparatus and includes a stage, a multi-axis transfer mechanism, a spraying component, a driving component, a surface profile detector, and a controlling component. The multi-axis transfer mechanism is disposed on the stage. The spraying component is disposed on the multi-axis transfer mechanism and the stage. The driving component is disposed on the stage and connects to the lifting apparatus. The surface profile detector is disposed on the stage and scans an area to be sprayed to obtain scanning data. The controlling component is disposed on the stage and controls the lifting apparatus, the spraying component, and the driving component according to the scanning data and pre-stored initial data.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: August 15, 2023
    Assignee: KENMEC MECHANICAL ENGINEERING CO., LTD.
    Inventors: Yu-Jen Chen, Chun-Jen Lin, Chia-Hui Huang
  • Patent number: 11632840
    Abstract: An the LED driving circuit, for driving an the LED load, includes: a bridge rectifier for rectifying an AC input voltage into a DC voltage; a serial capacitor voltage divider coupled to the bridge rectifier, including a plurality of serial capacitors; a half-bridge switch, coupled to the serial capacitor voltage divider; and a controller coupled to the half-bridge switch, for determining whether the DC voltage is higher than a threshold value and for controlling the half-bridge switch in a full-voltage mode or a half-voltage mode. In the full-voltage mode, the plurality of serial capacitors of the serial capacitor voltage divider synchronously supply power to the LED load. In the half-voltage mode, the plurality of serial capacitors of the serial capacitor voltage divider alternatively supply power to the LED load.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: April 18, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wen-Tien Tsai, Yu-Jen Chen
  • Patent number: 11630062
    Abstract: A biosensor is provided. The biosensor includes a substrate, photodiodes, pixelated filters, an excitation light rejection layer and an immobilization layer. The substrate has pixels. The photodiodes are disposed in the substrate and correspond to one of the pixels, respectively. The pixelated filters are disposed on the substrate. The excitation light rejection layer is disposed on the pixelated filter. The immobilization layer is disposed on the excitation light rejection layer.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: April 18, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Hsin-Yi Hsieh, Chin-Chuan Hsieh, Wei-Ko Wang, Yu-Jen Chen, Yi-Hua Chiu, Chung-Jung Hsu
  • Publication number: 20230057095
    Abstract: An embedded power supply apparatus is partially buried in an enclosed structure, is configured to provide a first DC voltage to a plurality of electronic devices, and includes a first power conversion circuit, a plurality of switch circuits, a human-machine interface module and a control circuit. The first power conversion circuit is configured to convert an input AC voltage into the first DC voltage and provide the first DC voltage to the switch circuits. The switch circuits each is configured to selectively transmit the first DC voltage to a corresponding electronic device of the electronic devices according to a corresponding first control signal of a plurality of first control signals. The control circuit is configured to receive a second control signal generated by the human-machine interface module, and generate the first control signals to the switch circuits according to the second control signal.
    Type: Application
    Filed: November 24, 2021
    Publication date: February 23, 2023
    Inventors: Yu-Jen CHEN, Chih-Yen LIU
  • Patent number: 11587937
    Abstract: A method (of manufacturing a semiconductor device) includes: forming active regions including spacing apart neighboring active regions resulting in corresponding gaps; forming gate structures (overlying the active regions and the gaps) including locating intra-gap segments of the gate structures over the gaps, arranging each intra-gap segment to include two end regions separated by a central region, and at intersections between active regions and gate structures that is designated to be non-functional (flyover intersection), preventing formation of a functional connection between the two; and removing selected portions of at least some of the intra-gap segments including removing central regions of first selected intra-gap segments substantially without removing portions of corresponding end regions of the first selected intra-gap segments, and removing central regions and portions of end regions of second selected intra-gap segments for which corresponding end regions of the second intra-gap segments abut fl
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Jen Chen, Wen-Hsi Lee, Ling-Sung Wang, I-Shan Huang, Chan-Yu Hung
  • Patent number: 11547311
    Abstract: A physiological data detection method is provided. The physiological data detection method includes the following steps. Firstly, an ECG signal and a PPG signal are detected. Then, a plurality of RRI values is calculated according to the ECG signal, and a plurality of PPI values is calculated according to the PPG signal. Thereafter, wrong RRI values are excluded according to the RRI values and/or the PPI values. Then, whether an abnormal state occurs or not is determined by using the remaining RRI values. A wearable device therefor is also provided.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: January 10, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Yu-Jen Chen, Chun-Hsiang Tsai