Abstract: A source driver includes a receiver for receiving a digital signal at an input node to generate an output signal at an output node, where the receiver includes a first switch, a second switch, a voltage-limiting circuit, a third switch and a channel. The first switch is for selectively connecting the output node of the receiver to a first reference voltage based on the digital signal. The second switch is for selectively connecting the output node of the receiver to a second reference voltage based on the digital signal. The voltage-limiting circuit is coupled between the input node and the output node of the receiver, and is for limiting a voltage level of the input node of the receiver. The third switch is coupled between the voltage-limiting circuit and the output node of the receiver. The channel is for generating a driving voltage based on the output signal.

Abstract: A source driver includes a receiver for receiving a digital signal at an input node to generate a received signal at an output node, and the receiver includes a first switch, a second switch, a voltage-limiting circuit and a channel. The first switch is utilized for selectively connecting the output node of the receiver to a first reference voltage based on the digital signal. The second switch is utilized for selectively connecting the output node of the receiver to a second reference voltage based on the digital signal. The voltage-limiting circuit is coupled between the input node and the output node of the receiver, and is utilized for limiting a voltage level of the input node of the receiver. The channel is utilized for generating a driving voltage based on the received signal.

Abstract: A level shift circuit comprises a first input terminal, a second input terminal, a first output terminal, a second output terminal, a level shifter and an equalization unit. The first and second input terminals receive an input signal and an inverted input signal respectively. The first and second output terminals output an output signal and an inverted output signal respectively. The level shifter is connected to the first and second input terminals, the first and the second output terminals. The equalization unit is coupled between the first and second output terminals. Wherein, at a reset phase, the input signal and the inverted input signal are inputted to the level shifter, and the equalization unit is turned on. After the reset phase, the equalization unit is turned off and the level shifter starts to shift a level of the input signal.

Abstract: A level shift circuit comprises a first input terminal, a second input terminal, a first output terminal, a second output terminal, a level shifter and an equalization unit. The first and second input terminals receive an input signal and an inverted input signal respectively. The first and second output terminals output an output signal and an inverted output signal respectively. The level shifter is connected to the first and second input terminals, the first and the second output terminals. The equalization unit is coupled between the first and second output terminals. Wherein, at a reset phase, the input signal and the inverted input signal are inputted to the level shifter, and the equalization unit is turned on. After the reset phase, the equalization unit is turned off and the level shifter starts to shift a level of the input signal.