Abstract: A system and method for to modify a setup to allow a restart despite a faulty hardware component is disclosed. The system includes a management controller storing a system error log. The computer system includes hardware components in communication with the management controller. A basic input output system (BIOS) includes a start-up routine that successfully completes if all of the hardware components are functional. The start-up routine determines an error in one of the hardware components from the system error log. The routine disables the hardware component. The routine then completes a power-on self-test routine.

Abstract: An aerial vehicle including a body, a first ranging device, a second ranging device and a controller is provided. The first ranging device is disposed on the body and is configured to detect a first distance between the first ranging device and the reflector. The second ranging device is disposed on the body and is configured to detect a second distance between the second ranging device and the reflector. The controller is configured to obtain an included angle between a direction of the body and the reflector according to the first distance and the second distance.

Abstract: A power supply method and a power supply apparatus including a power conversion circuit, a first and a second switching circuit, and a control circuit are provided. The power conversion circuit is coupled between a DC power source and a power supply terminal and performs a boosting operation according to a DC voltage of the DC power source to generate a boost voltage. The first switching circuit is coupled between an AC power source and the power supply terminal. The second switching circuit is coupled between the power conversion circuit and the power supply terminal. The control circuit enters a first mode after turning on the first and the second switching circuit, so the first switching circuit transmits a main AC voltage of the AC power source to the power supply terminal in the first mode. The boost voltage is greater than a peak value of the main AC voltage.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a gate disposed on the semiconductor substrate. The semiconductor device structure also includes a source doped region and a drain doped region on two opposite sides of the gate. The semiconductor device structure further includes a source protective circuit and a drain protective circuit. From a side perspective view, a first drain conductive element of the source protective circuit partially overlaps a first source conductive element of the drain protective circuit.

Abstract: An operating circuit is provided. A first N-type transistor determines whether to turn the path between a core circuit and a ground terminal on or off according to the voltage level of a specific node. An electrostatic discharge (ESD) protection circuit is coupled between an input/output pad and the core circuit to prevent an ESD current from passing through the core circuit. The ESD protection circuit includes a detection circuit and a releasing element. The detection circuit determines whether there is an ESD event at the input/output pad and generates a first detection signal according to the detection of the ESD event at the input/output pad. The releasing element provides a release path according to the first detection signal to release the ESD current. A control circuit controls the voltage level of the specific circuit according to the first detection signal.

Abstract: A lens module of enhanced stability and strength when mounted to an image-capturing device includes a voice coil motor. The voice coil motor includes a casing and a first connection plate connected to the casing. The first connection plate defines at least one first mounting hole. An electronic device using the lens module is also provided.

Abstract: An ESD protection circuit, which protects a subject NMOS transistor coupled between an I/O pad and a ground, includes a first discharge device arranged between the I/O pad and the ground, having a trigger-on voltage that is lower than a breakdown voltage of the subject NMOS transistor; and a gate voltage control device, including a discharge NMOS transistor coupled to the ground and a gate of the subject NMOS transistor; a first PMOS transistor connected to the gate of the subject NMOS transistor and a connection node; and a first NMOS transistor connected to the connection node and the ground. The connection node is connected to the gate of the discharge NMOS transistor, and the gate of the first PMOS transistor and the gate of the first NMOS transistor are connected to each other.

Abstract: A power supply method and a power supply apparatus including a power conversion circuit, a first and a second switching circuit, and a control circuit are provided. The power conversion circuit is coupled between a DC power source and a power supply terminal and performs a boosting operation according to a DC voltage of the DC power source to generate a boost voltage. The first switching circuit is coupled between an AC power source and the power supply terminal. The second switching circuit is coupled between the power conversion circuit and the power supply terminal. The control circuit enters a first mode after turning on the first and the second switching circuit, so the first switching circuit transmits a main AC voltage of the AC power source to the power supply terminal in the first mode. The boost voltage is greater than a peak value of the main AC voltage.

Abstract: An ESD protection circuit, which protects a subject NMOS transistor coupled between an I/O pad and a ground, includes a first discharge device arranged between the I/O pad and the ground, having a trigger-on voltage that is lower than a breakdown voltage of the subject NMOS transistor; and a gate voltage control device, including a discharge NMOS transistor coupled to the ground and a gate of the subject NMOS transistor; a first PMOS transistor connected to the gate of the subject NMOS transistor and a connection node; and a first NMOS transistor connected to the connection node and the ground. The connection node is connected to the gate of the discharge NMOS transistor, and the gate of the first PMOS transistor and the gate of the first NMOS transistor are connected to each other.

Abstract: A power supply failover system/method providing uninterruptable power to protected load devices (PLD) is disclosed. The system includes a failover switch controller (FSC) with inputs from an AC I/V monitor (AIV), AC cycle counter (ACC), failover switch timer (FST), and overcurrent protection timer (OPT). The FSC utilizes these inputs to control failsafe switching of a bypass phase switch (BPS) and AC phase switch (ACS) to the PLD when power from the APS is determined to be good by the AIV. When power from the APS is determined to be compromised by the AIV, the FPS disables the ACS/BPS and enables a DC switch (DCS) and battery isolation switch (BIS) to connect a DC source to the PLD after a time period determined by the FST. APS/DCS overcurrent protection is limited by OPT intervals allowing a smooth transition between the APS to DCS during power failover/failback.

Abstract: A micro bandpass filter comprises a substrate, a first signal transmission member, a second signal transmission member and a resonator structure. The resonator structure includes a plurality of microstrip lines. The present invention realizes the function of a bandpass filter in a smaller area via curving the first signal transmission member, the second signal transmission member and the resonator structure.

Abstract: A micro bandpass filter comprises a substrate, a first signal transmission member, a second signal transmission member and a resonator structure. The resonator structure includes a plurality of microstrip lines. The present invention realizes the function of a bandpass filter in a smaller area via curving the first signal transmission member, the second signal transmission member and the resonator structure.

Abstract: A power supply failover system/method providing uninterruptable power to protected load devices (PLD) is disclosed. The system includes a failover switch controller (FSC) with inputs from an AC I/V monitor (AIV), AC cycle counter (ACC), failover switch timer (FST), and overcurrent protection timer (OPT). The FSC utilizes these inputs to control failsafe switching of a bypass phase switch (BPS) and AC phase switch (ACS) to the PLD when power from the APS is determined to be good by the AIV. When power from the APS is determined to be compromised by the AIV, the FPS disables the ACS/BPS and enables a DC switch (DCS) and battery isolation switch (BIS) to connect a DC source to the PLD after a time period determined by the FST. APS/DCS overcurrent protection is limited by OPT intervals allowing a smooth transition between the APS to DCS during power failover/failback.

Abstract: A method for optimizing energy consumption of an application program for a DSP includes a program code generating unit is adapted to edit and generate a program code, a program compiling unit is adapted to receive the program code, and according to the program code and the instructional wise energy consumption database generate a plurality of assembly codes, and a DSP simulator adapted to receive the assembly codes and at least one stimulus to simulate the total and the amount of energy every instruction of the assembly codes consumes and transmit the results to the program compiling unit. The program compiling unit modifies the compiling scheme to recompile the program code and transmits the new assembly codes to the DSP simulator, until the simulation results reach or are lower than a predetermined energy consumption value.

Abstract: A circuit for converting a direct current voltage into an alternating current voltage includes a buck converter, a resonant DC voltage/DC voltage converter, a DC voltage/AC voltage inverter, and a DC link capacitor. The buck converter generates a DC current according to an input voltage generated by a voltage source operating at an optimal operation point. The resonant DC voltage/DC voltage converter converts the input voltage to a DC voltage according to a switch clock and a resonant frequency determined by a resonant capacitor and a resonant inductance of the resonant DC voltage/DC voltage converter. The DC voltage/AC voltage inverter converts the DC voltage and outputs an AC voltage to an AC power supply network. The DC link capacitor adjusts power outputted by the DC voltage/AC voltage converter to regulate the DC voltage.

Abstract: A developing system and method for optimizing the energy consumption of an application program for a DSP are provided.