Patents by Inventor Yu-Kai Wang

Yu-Kai Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10616542
    Abstract: A multi-dimensional image projection apparatus is provided. The multi-dimensional image projection apparatus includes an image projector and an image-processing circuit. The image-processing circuit is configured to receive an input image, and perform a linearity transformation process and a first inverse image warping process on the input image according to sensor information about the multi-dimensional image projection apparatus relative to the projection surface to generate a first image. The image-processing circuit performs a matrix transformation process and a second inverse image warping process on the first image according to the sensor information to generate a second image, and generate an output image according to the second image. The image projector projects the output image onto the projection surface.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: April 7, 2020
    Assignee: Terawins, Inc.
    Inventors: Yu Kuang Wang, Wen Yi Huang, Pei Kai Hsu, Wei Ya Wu
  • Publication number: 20200103756
    Abstract: Embodiments of the present disclosure describe a chemical replacement system and a method to automatically replace PR bottles. The chemical replacement system includes a computer system and a transfer module. The computer system can receive a request signal to replace one or more chemical containers and transmit a command to the transfer module. The transfer module, being controlled by the computer system, can include a holder configured to hold the one or more chemical containers (e.g., PR bottles); a door unit configured to open in response to the command; and a transfer unit configured to eject the holder in response to the command for replacement. The chemical replacement system can further include an automated vehicle configured to replace the one or more chemical containers in the ejected holder.
    Type: Application
    Filed: December 19, 2018
    Publication date: April 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu Kai CHEN, Forster Yuan, Ko-BIn Kao, Shi-Ming Wang, Su-Yu Yeh, Li-Jen Wu, Oliver Yu
  • Publication number: 20200098740
    Abstract: An ESD protection circuit, which protects a subject NMOS transistor coupled between an I/O pad and a ground, includes a first discharge device arranged between the I/O pad and the ground, having a trigger-on voltage that is lower than a breakdown voltage of the subject NMOS transistor; and a gate voltage control device, including a discharge NMOS transistor coupled to the ground and a gate of the subject NMOS transistor; a first PMOS transistor connected to the gate of the subject NMOS transistor and a connection node; and a first NMOS transistor connected to the connection node and the ground. The connection node is connected to the gate of the discharge NMOS transistor, and the gate of the first PMOS transistor and the gate of the first NMOS transistor are connected to each other.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Li-Fan CHEN, Chih-Hsuan LIN, Yu-Kai WANG, Hung-Wei CHEN, Ching-Wen WANG, Ting-You LIN, Chun-Chih CHEN
  • Publication number: 20200074255
    Abstract: A method of creating a graphic Quick Response (QR) code includes a picture and first and second two-dimensional barcodes combined through a halftoning technique. The graphic QR code includes a plurality of module units, each having a plurality of sub-modules. Information dots containing first information for the first two-dimensional barcode are provided, and each of the information dots of the first two-dimensional barcode is located at a central sub-module of each of the module units. The first information is readable by a scanning device. Information dots containing second information for the second two-dimensional barcode are provided, and each of the information dots of the second two-dimensional barcode is located at one of the other sub-modules. A position of each of the information dots of the second two-dimensional barcode is capable of being located by inputting a key through a decryption program for obtaining the second information.
    Type: Application
    Filed: January 16, 2019
    Publication date: March 5, 2020
    Inventors: HSI-CHUN WANG, CHUN-SHIEN LU, PEI-CHUN KUAN, CHIA-TSEN SUN, YU-MEI WANG, JONG-KAI LEE
  • Publication number: 20200066581
    Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Szu-Ping Tung, Yu-Kai Lin, Jen Hung Wang, Shing-Chyang Pan
  • Patent number: 10562976
    Abstract: Disclosed herein is an immunoconjugate comprising an antibody, a functional motif, and a linker connecting the functional motif to the antibody. According to embodiments of the present disclosure, the antibody may recognize tumor-associated antigens (TAAs), and serves as a targeting module for delivering the functional motif connected therewith to the tumor cells thereby inhibiting tumor growth or detecting the distribution of tumor cells. Also disclosed herein are methods of treating cancers and methods of diagnosing cancers by use of the present immunoconjugate.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: February 18, 2020
    Assignee: Academia Sinica
    Inventors: An-Suei Yang, Wei-Ying Kuo, Hung-Ju Hsu, Hong-Sen Chen, Yu-Chi Chou, Yueh-Liang Tsou, Hung-Pin Peng, Jhih-Wei Jian, Chung-Ming Yu, Yi-Kai Chiu, Ing-Chein Chen, Chao-Ping Tung, Michael Hsiao, Hwei-Jiung Wang
  • Publication number: 20200043762
    Abstract: The present disclosure describes a container for placing an object therein. The container includes a container body and a lid over the container body, a collision-preventing portion attached to one or more of the container body and the lid and configured to buffer an impact force, a pairing recognition mechanism configured to detect an object placed in the container body, and a liquid-detecting sensor configured to detect a leakage from the object.
    Type: Application
    Filed: December 27, 2018
    Publication date: February 6, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu Kai CHEN, Chia-Hung CHUNG, Ko-Bin KAO, Shi-Ming WANG, Su-Yu YEH, Li-Jen WU, Oliver YU, Wen-Shiung CHEN
  • Publication number: 20200020541
    Abstract: A method includes forming a metal gate structure, wherein the metal gate structure includes a gate dielectric layer and a gate electrode; performing a surface treatment to a top surface of the metal gate structure, wherein the surface treatment converts a top portion of the gate electrode to an oxidation layer; forming a conductive layer above the gate electrode, wherein the forming of the conductive layer includes substituting oxygen in the oxidation layer with a metallic element; and forming a contact feature above the metal gate structure, wherein the contact feature is in direct contact with the conductive layer.
    Type: Application
    Filed: July 16, 2018
    Publication date: January 16, 2020
    Inventors: Pang-Sheng Chang, Yu-Feng Yin, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Feng-Yu Chang, Chen-Yuan Kao, Chia-Yang Hung, Chia-Sheng Chang, Shu-Huei Suen, Jyu-Horng Shieh, Sheng-Liang Pan, Jack Kuo-Ping Kuo, Shao-Jyun Wu
  • Publication number: 20200004912
    Abstract: A method (of generating a layout diagram) includes: identifying, in the layout diagram, a group of three or more cells which violates a horizontal constraint vector (HCV) and is arranged so as to exhibit two or more vertically-aligned edge-pairs (VEPs); each VEP including two members representing at least partial portions of vertical edges of corresponding cells of the group; relative to a horizontal direction, the members of each VEP being disposed in edgewise-abutment and separated by a corresponding actual gap; and the HCV having separation thresholds, each of which has a corresponding VEP and represents a corresponding minimum gap in the horizontal direction between the members of the corresponding VEP; and for each of at least one but fewer than all of the separation thresholds, selectively moving a given one of cells corresponding to one of the members of the corresponding VEP thereby to avoid violating the HCV.
    Type: Application
    Filed: June 14, 2019
    Publication date: January 2, 2020
    Inventors: Meng-Kai HSU, Sheng-Hsiung CHEN, Wai-Kei MAK, Ting-Chi WANG, Yu-Hsiang CHENG, Ding-Wei HUANG
  • Patent number: 10524373
    Abstract: The disclosure provides a fixing assembly adapted to fix an expansion card on an expansion slot of a motherboard. The fixing assembly includes a casing, a first positioning component and a second positioning component. The first positioning component is slidably disposed on the casing so that a distance between the first positioning component and the expansion slot of the motherboard is adjustable. The second positioning component is slidably disposed on the first positioning component. The second positioning component and the first positioning component are configured to press against the expansion card, and sliding directions of the first positioning component and the second positioning component are different from each other.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: December 31, 2019
    Assignee: WISTRON CORP.
    Inventors: Yi Chien Liu, Po-Kai Wang, Yu-Hsin Yu, Jung-Shu Hsiao, Ching-Hua Wang
  • Patent number: 10510830
    Abstract: An N-type polysilicon crystal, a manufacturing method thereof, and an N-type polysilicon wafer are provided. The N-type polysilicon crystal has a slope of resistivity and a slope of defect area percentage. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to resistivity presented by a unit of Ohm·cm (?·cm), the slope of resistivity is 0 to ?1.8 at the solidified fraction of 0.25 to 0.8. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to defect area percentage (%), the slope of defect area percentage is less than 2.5 at the solidified fraction of 0.4 to 0.8.
    Type: Grant
    Filed: September 2, 2018
    Date of Patent: December 17, 2019
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Ching-Hung Weng, Cheng-Jui Yang, Yu-Min Yang, Yuan-Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Ying-Ru Shih, Sung-Lin Hsu
  • Patent number: 10498164
    Abstract: A wireless charging device is provided, including an accommodating space, a first coil, a second coil, and a control module. The first coil surrounds the accommodating space, and the second coil is disposed in the accommodating space. The control module is electrically connected to the first coil and the second coil.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: December 3, 2019
    Assignee: TERAWINS, INC.
    Inventors: Yu Kuang Wang, Wen Yi Huang, Pei-Kai Hsu, Yung-Hsiang Lin
  • Patent number: 10468297
    Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: November 5, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Szu-Ping Tung, Yu-Kai Lin, Jen Hung Wang, Shing-Chyang Pan
  • Publication number: 20190333807
    Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.
    Type: Application
    Filed: April 27, 2018
    Publication date: October 31, 2019
    Inventors: Szu-Ping Tung, Yu-Kai Lin, Jen Hung Wang, Shing-Chyang Pan
  • Publication number: 20190307012
    Abstract: The disclosure provides a fixing assembly adapted to fix an expansion card on an expansion slot of a motherboard. The fixing assembly includes a casing, a first positioning component and a second positioning component. The first positioning component is slidably disposed on the casing so that a distance between the first positioning component and the expansion slot of the motherboard is adjustable. The second positioning component is slidably disposed on the first positioning component. The second positioning component and the first positioning component are configured to press against the expansion card, and sliding directions of the first positioning component and the second positioning component are different from each other.
    Type: Application
    Filed: September 5, 2018
    Publication date: October 3, 2019
    Applicant: WISTRON CORP.
    Inventors: Yi Chien LIU, Po-Kai WANG, Yu-Hsin YU, Jung-Shu HSIAO, Ching-Hua WANG
  • Publication number: 20190286331
    Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware. The firmware includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a mode selection command and a data out message arranged to rewrite a first mode page setting among the plurality of mode page settings from a host. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting according to the data out message. When the data out message will not change the mode parameters which cannot be rewritten in the first mode page setting, the controller determines whether a plurality of new mode parameters are kept in the flash after the data storage device is turned off.
    Type: Application
    Filed: June 5, 2019
    Publication date: September 19, 2019
    Inventors: Te-Kai WANG, Yu-Da CHEN
  • Publication number: 20190273023
    Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 5, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Yip LOH, Chih-Wei CHANG, Hong-Mao LEE, Chun-Hsien HUANG, Yu-Ming HUANG, Yan-Ming TSAI, Yu-Shiuan WANG, Hung-Hsu CHEN, Yu-Kai CHEN, Yu-Wen CHENG
  • Patent number: 10396243
    Abstract: A light-emitting device includes: a rectangular shape with a first side, a second side opposite to the first side, and a third side connecting the first side and the second side; a light-emitting stack, comprising a lower semiconductor layer, an upper semiconductor layer, and an active layer between the lower semiconductor layer and the upper semiconductor layer; a first electrode formed on the lower semiconductor layer, comprising a first electrode pad and a first extension electrode; a second electrode formed on the upper semiconductor layer, comprising a second electrode pad and a second extension electrode; and a first current blocking layer formed between the lower semiconductor layer and the first electrode pad, wherein the first current blocking layer comprises a top surface and side surfaces; wherein the first electrode pad covers the top surface and the side surfaces of the first current blocking layer and contacts the lower semiconductor layer.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: August 27, 2019
    Assignee: Epistar Corporation
    Inventors: Chien-Kai Chung, Po-Shun Chiu, Hsin-Ying Wang, De-Shan Kuo, Tsun-Kai Ko, Yu-Ting Huang
  • Patent number: 10381508
    Abstract: This invention discloses a light emitting element to solve the problem of lattice mismatch and inequality of electron holes and electrons of the conventional light emitting elements. The light emitting element comprises a gallium nitride layer, a gallium nitride pyramid, an insulating layer, a first electrode and a second electrode. The gallium nitride pyramid contacts with the gallium nitride layer, with a c-axis of the gallium nitride layer opposite in direction to a c-axis of the gallium nitride pyramid, and with an M-plane of the gallium nitride layer parallel to an M-plane of the gallium nitride pyramid, with broken bonds at the mounting face of the gallium nitride layer and the larger end face of the gallium nitride pyramid welded with each other, with the gallium nitride layer and the gallium nitride pyramid being used as a p-type semiconductor and an n-type semiconductor respectively.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: August 13, 2019
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: I-Kai Lo, Ying-Chieh Wang, Yu-Chi Hsu, Cheng-Hung Shih
  • Publication number: 20190245116
    Abstract: A light-emitting device comprises a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first pad on the semiconductor stack; a second pad on the semiconductor stack, wherein the first pad and the second pad are separated from each other with a distance, which define a region between the first pad and the second pad on the semiconductor stack; and multiple vias penetrating the active layer to expose the first semiconductor layer, wherein the first pad and the second pad are formed on regions other than the multiple vias.
    Type: Application
    Filed: April 15, 2019
    Publication date: August 8, 2019
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Bo-Jiun HU, Tsung-Hsun CHIANG, Wen-Hung CHUANG, Kuan-Yi LEE, Yu-Ling LIN, Chien-Fu SHEN, Tsun-Kai KO