Patents by Inventor Yu Kuang

Yu Kuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200225277
    Abstract: An epitaxial LED wafer is provided and chip process is processed such that each LED chip on the epitaxial wafer can be probed by an array of probe pin and results can be stored in a database. The epitaxial wafer is then diced on an expandable tape, and a display substrate is provided with driving circuits. The tape is expanded such that a pitch of LED chips on the tape is equal to a pitch of LED chips on display substrate. An array of drop pins will collectively and selectively drop LED chips, from the tape to the display substrate, with the same specification according to the probed results in the database.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 16, 2020
    Inventors: Tzu-Yi Kuo, Cheng Ta Kao, Chiyan Kuan, Yu-Kuang Tseng
  • Publication number: 20200227235
    Abstract: A collimated electron beam is illuminated to a grounded metal mask such that patterns on the mask can be transferred to a substrate identically. In a preferred embodiment, a linear electron source can be provided for enhancing lithographic throughput. The metal mask is adjacent to the substrate, but does not contact with substrate.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 16, 2020
    Inventors: Tzu-Yi Kuo, Yu-Kuang Tseng
  • Publication number: 20200227231
    Abstract: An immersion objective lens is configured below a stage such that multiple detectors can be configured above sample for large beam current application, particularly for defect inspection. Central pole piece of the immersion objective lens thus can be provided that a magnetic monopole-like field can be provided for electron beam. Auger electron detector thus can be configured to analyze materials of sample in the defect inspection.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 16, 2020
    Inventors: Tzu-Yi Kuo, Yu-Kuang Tseng
  • Publication number: 20200220543
    Abstract: In a capacitive touch sensing circuit, a parallel capacitor is coupled to a first input terminal and an output terminal of an operational amplifier. A series capacitor and a sensing capacitor are coupled in series between first input terminal and ground. A test capacitor is coupled to a second node and ground. A first switch is coupled to an operating voltage and a first node. A second switch is coupled to first node and ground. A third switch is coupled to second node and ground. A fourth switch is coupled to operating voltage and second node. A first current source and a fifth switch are coupled between operating voltage and first node. A sixth switch and a second current source are coupled between first node and ground. A seventh switch is coupled to second node and a third node. An eighth switch is coupled to the parallel capacitor.
    Type: Application
    Filed: January 6, 2020
    Publication date: July 9, 2020
    Inventors: Chih-Kai CHANG, Chih-Hsiung CHEN, Yu KUANG, Yu-Chin HSU
  • Patent number: 10665560
    Abstract: A semiconductor package includes an interconnect structure having a first surface and a second surface opposite to the first surface, at least one optical chip over the first surface of the interconnect structure and electrically coupled to the interconnect structure, an insulating layer contacting the second surface of the interconnect structure, and a molding compound over the first surface of the interconnect structure. The insulating layer includes a third surface facing the second surface of the interconnect structure and a fourth surface opposite to the third surface. At least an edge of the optical chip is covered by the molding compound.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: May 26, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chuei-Tang Wang, Chih-Chieh Chang, Yu-Kuang Liao, Hsing-Kuo Hsia, Chih-Yuan Chang, Jeng-Shien Hsieh, Chen-Hua Yu
  • Patent number: 10616542
    Abstract: A multi-dimensional image projection apparatus is provided. The multi-dimensional image projection apparatus includes an image projector and an image-processing circuit. The image-processing circuit is configured to receive an input image, and perform a linearity transformation process and a first inverse image warping process on the input image according to sensor information about the multi-dimensional image projection apparatus relative to the projection surface to generate a first image. The image-processing circuit performs a matrix transformation process and a second inverse image warping process on the first image according to the sensor information to generate a second image, and generate an output image according to the second image. The image projector projects the output image onto the projection surface.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: April 7, 2020
    Assignee: Terawins, Inc.
    Inventors: Yu Kuang Wang, Wen Yi Huang, Pei Kai Hsu, Wei Ya Wu
  • Publication number: 20200107427
    Abstract: A droplet generator assembly includes a storage tank, a refill system, a droplet generator, and a temperature control system. The storage tank is configured to store a target material. The refill system is connected to the storage tank. The droplet generator includes a reservoir and a nozzle connected to the reservoir, in which the droplet generator is connected to the refill system, and the refill system is configured to deliver the target material to the reservoir. The temperature control system is adjacent to the refill system or the reservoir.
    Type: Application
    Filed: July 11, 2019
    Publication date: April 2, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Yu TU, Yu-Kuang SUN, Shao-Hua WANG, Han-Lung CHANG, Hsiao-Lun CHANG, Li-Jui CHEN, Po-Chung CHENG, Cheng-Hao LAI, Hsin-Feng CHEN, Wei-Shin CHENG, Ming-Hsun TSAI, Yen-Hsun CHEN
  • Publication number: 20200098736
    Abstract: A semiconductor package includes a first optical transceiver, a second optical transceiver, a third optical transceiver, and a plasmonic waveguide. The first optical transceiver includes at least one optical input/output portion for transmitting and receiving optical signal. The second optical transceiver is stacked on the first optical transceiver. The third optical transceiver includes at least one optical input/output portion for transmitting and receiving optical signal. The third optical transceiver is stacked on the second optical transceiver. The plasmonic waveguide penetrates through the second optical transceiver and optically couples the at least one optical input/output portion of the first optical transceiver and the at least one optical input/output portion of the third optical transceiver.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Kuang Liao, Cheng-Chun Tsai, Chen-Hua Yu, Fang-Cheng Chen, Wen-Chih Chiou, Ping-Jung Wu
  • Publication number: 20200091124
    Abstract: A package structure including a plurality of first dies and an insulating encapsulant is provided. The plurality of first dies each include a first waveguide layer having a first waveguide path of a bent pattern, wherein the first waveguide layers of the plurality of first dies are optically coupled to each other to form an optical route. The insulating encapsulant encapsulates the plurality of first dies.
    Type: Application
    Filed: September 18, 2018
    Publication date: March 19, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Kuang Liao, Cheng-Chun Tsai, Chen-Hua Yu, Fang-Cheng Chen, Wen-Chih Chiou, Ping-Jung Wu
  • Patent number: 10514403
    Abstract: A circuit and method of measuring capacitance are disclosed. The capacitance measuring circuit includes an integrator circuit, a first control circuit, a second control circuit and a processor circuit. The capacitance measuring method includes steps of: using a current source and a charging/discharging time to generate a first charge amount related to a second charge amount of a capacitor to be detected; generating a third charge amount and generating a fourth charge amount according to the first charge amount and the third charge amount; generating a fifth charge amount and generating a remaining charge amount according to the fifth charge amount and fourth charge amount; using an integrator to convert the remaining charge amount into a first voltage and generating a judging result according to whether the first voltage meets a second voltage; and calculating the judging result to obtain a capacitance variation of the capacitor to be detected.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: December 24, 2019
    Assignee: Raydium Semiconductor Corporation
    Inventors: Yu Kuang, Tsung-Yi Su, Shih-Chin Chang
  • Publication number: 20190371244
    Abstract: Embodiments of pixel circuits for light emitting elements are disclosed herein. In one example, a pixel circuit includes a pixel driver and a bridge transistor. The pixel driver is configured to receive a data signal and drive a light emitting element based on the data signal. The bridge transistor includes a gate terminal receiving a first bias signal, a source terminal coupled to the pixel driver, a drain terminal coupled to a terminal of the light emitting element, and a body terminal coupled to the source terminal or receiving the data signal. The first bias signal controls a voltage at the source terminal.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 5, 2019
    Applicant: VIEWTRIX TECHNOLOGY CO., LTD.
    Inventors: Yu-Hsun Peng, Yu-Kuang Chang, Chao-Wei Su, Chun-Wei Huang
  • Patent number: 10498164
    Abstract: A wireless charging device is provided, including an accommodating space, a first coil, a second coil, and a control module. The first coil surrounds the accommodating space, and the second coil is disposed in the accommodating space. The control module is electrically connected to the first coil and the second coil.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: December 3, 2019
    Assignee: TERAWINS, INC.
    Inventors: Yu Kuang Wang, Wen Yi Huang, Pei-Kai Hsu, Yung-Hsiang Lin
  • Patent number: 10461309
    Abstract: A method for manufacturing an electrode is provided. A composite including a carrier layer and a collector layer disposed thereon is provided. The collector layer has a first surface and an opposite second surface, and the first surface of the collector layer faces to the carrier layer. A first coating process is performed to coat first electrode material on the second surface of the collector layer. A first curing process is performed to dry the first electrode material. The carrier layer is removed after the first electrode material is dried to expose the first surface of the collector layer. A second coating process is performed to coat a second electrode material on the first surface of the collector layer. A material of the second electrode material is same with that of the first electrode material. A second curing process is performed to dry the second electrode material.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: October 29, 2019
    Assignee: ASUSTeK COMPUTER INC.
    Inventor: Yu-Kuang Chen
  • Publication number: 20190296386
    Abstract: A method for manufacturing a spiral-wound battery is provided. The method includes the following steps: performing surface plasma treatment on a current collector; coating electrode slurry on a surface of the current collector, to form an electrode foil; performing surface plasma treatment on an isolating film, to improve hydrophilia of the isolating film; arranging and electrically connecting a plurality of metal conductive handles to the electrode foil, where the electrode foil is divided into a plurality of sections, and each section of the electrode foil corresponds to a jelly roll; and sequentially winding the isolating film and the electrode foil to form the spiral-wound battery. According to the method for manufacturing a spiral-wound battery provided in the present disclosure, internal impedance of a jelly roll is effectively reduced, and advantages of a high yield and low costs of a manufacturing process of the spiral-wound battery are maintained.
    Type: Application
    Filed: March 26, 2019
    Publication date: September 26, 2019
    Inventor: Yu-Kuang CHEN
  • Patent number: 10395861
    Abstract: A key structure having a pressing area is provided. The key structure includes a first membrane and a second membrane. A first conductive layer and a first insulation layer are sequentially disposed on a surface of the first membrane. The first insulation layer has a first opening in the pressing area, so that a part of the first conductive layer is exposed from the first opening. The second membrane is disposed opposite to the first membrane. A second conductive layer and a second insulation layer are sequentially disposed on a surface of the second membrane facing the first membrane. The second insulation layer has a second opening, which is formed corresponding to the first opening, in the pressing area, so that a part of the second conductive layer is exposed from the second opening to face the first conductive layer in the first opening.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: August 27, 2019
    Assignee: ASUSTEK COMPUTER INC.
    Inventor: Yu-Kuang Chen
  • Patent number: 10371893
    Abstract: In an embodiment, a method includes: forming an interconnect including waveguides and conductive features disposed in a plurality of dielectric layers, the conductive features including conductive lines and vias, the waveguides formed of a first material having a first refractive index, the dielectric layers formed of a second material having a second refractive index less than the first refractive index; bonding a plurality of dies to a first side of the interconnect, the dies electrically connected by the conductive features, the dies optically connected by the waveguides; and forming a plurality of conductive connectors on a second side of the interconnect, the conductive connectors electrically connected to the dies by the conductive features.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: August 6, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chuei-Tang Wang, Hsing-Kuo Hsia, Yu-Kuang Liao, Chih-Chieh Chang
  • Publication number: 20190220108
    Abstract: A stylus has a pen tip assembly and an end cover synchronized in motion. The stylus includes a barrel, a pen tip assembly, a drive circuit unit, an end cover, and an elastic element. The pen tip assembly is electrically connected to the drive circuit unit. The end cover is connected to the pen tip assembly, and an end portion is exposed from the end cover. When the pen tip assembly is pressed, the end portion is moved together with the end cover from an initial position, the pen tip assembly moves inwardly toward the barrel and compresses the elastic element. When the elastic element is restored to release the pen tip assembly, the pen tip assembly and the end cover are together returned to the initial position to avoid a deduction or a loss in signal strength.
    Type: Application
    Filed: January 15, 2018
    Publication date: July 18, 2019
    Inventors: Yueh-Hua LI, Yu-Kuang HOU, Shu-Ming GUO
  • Patent number: 10333623
    Abstract: An optical transceiver including a photonic integrated circuit component, an electric integrated circuit component and an insulating encapsulant is provided. The photonic integrated circuit component includes at least one optical input/output portion configured to transmit and receive optical signal. The electric integrated circuit component is disposed on and electrically connected to the photonic integrated circuit component. The insulating encapsulant covers the at least one optical input/output portion of the photonic integrated circuit component. The insulating encapsulant laterally encapsulates the electric integrated circuit component. The insulating encapsulant is optically transparent to the optical signal.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: June 25, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Kuang Liao, Cheng-Chun Tsai, Chen-Hua Yu, Fang-Cheng Chen, Wen-Chih Chiou, Ping-Jung Wu
  • Publication number: 20190190300
    Abstract: A wireless charging device is provided, including an accommodating space, a first coil, a second coil, and a control module. The first coil surrounds the accommodating space, and the second coil is disposed in the accommodating space. The control module is electrically connected to the first coil and the second coil.
    Type: Application
    Filed: April 10, 2018
    Publication date: June 20, 2019
    Inventors: Yu Kuang WANG, Wen Yi HUANG, Pei-Kai HSU, Yung-Hsiang LIN
  • Patent number: D885333
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: May 26, 2020
    Assignee: Motiv Inc.
    Inventors: Curt C. von Badinski, Yu-Kuang Hou, Hsiang-Yin Cheng, Han-Pin Chien