Abstract: A method for manufacturing a stacked capacitor structure includes: forming a first patterned structure over a substrate; forming a first bottom electrode over the first patterned structure; depositing a first dielectric film over the first bottom electrode; depositing a first top electrode layer over the first dielectric film; forming a first vertical interconnect structure; forming a second patterned structure over the first top electrode layer; forming a second bottom electrode over the second patterned structure and electrically connected to the first bottom electrode through the first vertical interconnect structure; depositing a second dielectric film over the second bottom electrode; depositing a second top electrode layer over the second dielectric film; and forming a second vertical interconnect structure extending from the first top electrode layer. The second top electrode layer is electrically connected to the first top electrode layer through the second vertical interconnect structure.

Abstract: An adhesive system comprising a tape and an activator, wherein the activator includes an oxidizing agent and is a liquid at normal temperature and pressure; and wherein the tape includes a curable adhesive free-standing film adjacent to a curable foam support layer, wherein the curable adhesive free-standing film comprises: a) a film-forming polymer or oligomer; b) a species comprising unsaturated free-radically polymerizable groups, which may be a) or a species other than a); and c) a transition metal cation.

Abstract: A bare circuit board is provided, in which the bare circuit board includes a substrate, an antenna, a chip pad, a ground pattern and a trace. The substrate includes a surface. The antenna and the chip pad are formed on the substrate. The ground pattern is formed on the surface. The trace is formed on the surface and isn't connected to the ground pattern. A measuring gap is formed between the trace and an edge of the ground pattern, and the trace includes a first end and a second end. The first end is electrically connected to the chip pad, whereas the second end is electrically connected to the antenna. The bare circuit board is adapted to transmit a signal. The width of the measuring gap is smaller than a quarter of an equivalent wavelength of the signal.

Abstract: A semiconductor device includes source/drain regions, a gate structure, a first gate spacer, and a dielectric material. The source/drain regions are over a substrate. The gate structure is laterally between the source/drain regions. The first gate spacer is on a first sidewall of the gate structure, and spaced apart from a first one of the source/drain regions at least in part by a void region. The dielectric material is between the first one of the source/drain regions and the void region. The dielectric material has a gradient ratio of a first chemical element to a second chemical element.

Abstract: An integrated circuit device includes a first-type active-region semiconductor structure, a second-type active-region semiconductor structure stacked with the first-type active-region semiconductor structure, a front-side power rail in a front-side conductive layer, and a back-side power rail in a back-side conductive layer. The integrated circuit device also includes a source conductive segment intersecting the first-type active-region semiconductor structure at a source region of a transistor, a back-side power node in the back-side conductive layer, and a top-to-bottom via-connector. The source conductive segment is conductively connected to the front-side power rail through a front-side terminal via-connector. The top-to-bottom via-connector is connected between the source conductive segment and the back-side power node.

Abstract: Additive-polymer precursor materials for filaments (e.g., for three-dimensional (3D) printing) are provided, as well as methods of fabricating and using the same. One or more two-dimensional (2D) additive materials (e.g., nano materials, such as nanosheets) can be mixed with a polymer base to give an additive-polymer precursor composite material. The additive material can be dissolved in a first solvent to give an additive solution, and the polymer can be dissolved in a second solvent to give a polymer base. The additive solution can be mixed with the polymer base to give a mixed solution. Solvent casting can then be performed on the mixed solution to evaporate the solvent(s) and give the additive-polymer precursor composite material, which can have a layered structure.

Abstract: Additive-polymer precursor materials for filaments (e.g., for three-dimensional (3D) printing) are provided, as well as methods of fabricating and using the same. One or more two-dimensional (2D) additive materials (e.g., nano materials, such as nanosheets) can be mixed with a polymer base to give an additive-polymer precursor composite material. The additive material can be dissolved in a first solvent to give an additive solution, and the polymer can be dissolved in a second solvent to give a polymer base. The additive solution can be mixed with the polymer base to give a mixed solution. Solvent casting can then be performed on the mixed solution to evaporate the solvent(s) and give the additive-polymer precursor composite material, which can have a layered structure.

Abstract: There is provided an optical engine for a navigation device including a first light source, a second light source, a lens, a barrier structure and an image sensor. The barrier structure has a first space for containing the first light source, a second space for containing the lens and a third space for containing the second light source and the image sensor. The reflected light associated with the first light source propagates to the image sensor via the lens in the second space. The reflected light associated with the second light source propagates to the image sensor via the third space without passing through the lens in the second space.

Abstract: A communication assembly is configured to be disposed on a substrate, and the communication assembly includes an optical fiber communication module and a heat dissipation shielding module. The optical fiber communication module is configured to be disposed on the substrate. The heat dissipation shielding module is configured for cooling the optical fiber communication module and protecting the optical fiber communication module from external electromagnetic interference, and the heat dissipation shielding module includes a shielding cover and a heat sink. The shielding cover is configured to be disposed on the substrate. The shielding cover and the substrate together surround and form an accommodation space. The optical fiber communication module is located in the accommodation space, and the shielding cover is in thermal contact with the optical fiber communication module. The heat sink and the shielding cover are made of a single piece.

Abstract: A method includes forming a stack of channel layers and sacrificial layers on a substrate. The channel layers and the sacrificial layers have different material compositions and being alternatingly disposed in a vertical direction. The method further includes patterning the stack to form a semiconductor fin, forming an isolation feature on sidewalls of the semiconductor fin, recessing the semiconductor fin, thereby forming a source/drain recess, such that a recessed top surface of the semiconductor fin is below a top surface of the isolation feature, growing a base epitaxial layer from the recessed top surface of the semiconductor fin, depositing an insulation layer in the source/drain recess, and forming an epitaxial feature in the source/drain recess, wherein the epitaxial feature is above the insulation layer. The insulation layer is above the base epitaxial layer and above a bottommost channel layer.

Abstract: A display panel, a display apparatus, and a method for manufacturing a display panel. The display panel includes a base plate, an isolation structure, a light-emitting functional layer, and a plurality of first electrodes, the isolation structure includes a first portion and a second portion; the light-emitting functional layer includes first light-emitting portions and second light-emitting portions; an edge of the first electrode overlaps the first portion, a shortest connecting line between an edge of the first electrode portion and the first edge is a first connecting line, a shortest connecting line between an edge of the second electrode portion and the second edge is a second connecting line, and an angle between the second connecting line and a plane in which the base plate is located is less than an angle between the first connecting line and the plane.

Abstract: The present invention relates to a linkage structure of a key switch. A second key and a fourth key share one bridge and are connected by a first connecting rod. When the second key or the fourth key is pressed down, the first connecting rod is pushed, so that a first bridge metal dome deforms and is connected to a common contact piece for conduction. A third key and a fifth key share one bridge and are connected by a second connecting. When the third key or the fifth key is pressed down, the second connecting rod is pushed, so that a second bridge metal dome deforms and is connected to the common contact piece for conduction. An input terminal is connected in series to a fuse, and the second key and the fourth key are connected in series to a diode so as to output a rectification half-wave.

Abstract: The present application relates to a display panel, a display apparatus, and a method for manufacturing a display panel. The display panel includes: a base plate including a pixel definition layer, the pixel definition layer including a plurality of pixel openings, an isolation structure being arranged at a side of the base plate close to the pixel definition layer, and an orthographic projection of the isolation structure on the pixel definition layer being spaced apart from the pixel opening and arranged around the pixel opening; a plurality of sub-pixels; and an encapsulation structure including a plurality of sub-encapsulation portions, the sub-encapsulation portion including a first encapsulation sub-layer and a second encapsulation sub-layer and in a thickness direction of the display panel, an area of an orthographic projection of the second encapsulation sub-layer being less than an area of an orthographic projection of the first encapsulation sub-layer.

Abstract: A pen mouse is provided for controlling a movement of a cursor displayed on a monitor. The pen mouse includes a pen and an optical detection module assembled in the pen. The optical detection module includes a circuit board, two sensors, and a laser emitter, the latter two of which are assembled onto the circuit board. When the pen mouse is moved along a working surface to implement a mouse control motion, the two sensors receive a detection light emitted from the laser emitter and reflected by the working surface, so as to determine whether the mouse control motion is a pen-tilted motion or a pen-spinning motion, thereby compensating the movement of the cursor.

Abstract: A storage environment monitoring device is capable of measuring and/or monitoring various parameters of an environment inside a storage area, such as airflow, temperature, and humidity, to increase the storage quality of semiconductor components stored in the storage area. The storage environment monitoring device is capable of measuring and/or monitoring the parameters of the environment inside the storage area without having to open an enclosure that is storing the semiconductor components in the storage area. This reduces exposure of the semiconductor components to contamination and other environmental factors.

Abstract: A display panel in the present application includes: a base plate; a plurality of first electrodes disposed on a side of the base plate, first openings are formed between adjacent ones of the first electrodes; an insulation layer disposed on a side of the first electrodes away from the base plate, at least a part of the insulation layer is located within the first openings, the insulation layer includes second openings that run through the insulation layer, and an orthographic projection of the second opening on the base plate overlaps at least partially with an orthographic projection of the first electrode on the base plate; and at least one isolation structure disposed on a side of the insulation layer away from the base plate, an orthographic projection of the first opening on the base plate is located within an orthographic projection of the isolation structure on the base plate.

Abstract: Ophthalmic formulations containing nintedanib, or a pharmaceutically acceptable salt thereof are provided. The ophthalmic formulations can contain microparticles or nanoparticles of nintedanib. Also provided are methods of using the ophthalmic formulations for treating ocular surface diseases, such as dry eye disease.

Abstract: A polyimide resin composition, a polyimide resin adhesive layer, a laminate, and a manufacturing method of an electronic component are provided. The polyimide resin composition includes a polyimide resin. The polyimide resin is obtained by the polymerization reaction of a diamine (A) and a tetracarboxylic dianhydride (B). The diamine (A) includes a diamine (A-1) represented by following Formula (I-1) and a diamine (A-2) represented by following Formula (I-2). A molar ratio ((A-1):(A-2)) of the diamine (A-1) to the diamine (A-2) is 0.1:0.2 to 0.6.

Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.

Abstract: A method of fabricating an integrated circuit includes fabricating a set of transistors in a front-side of a substrate, depositing a first conductive material over the set of transistors on a first level thereby forming a set of contacts for the set of transistors, fabricating a first set of vias over the set of transistors, depositing a second conductive material over the set of contacts on a second level thereby forming a set of power rails, depositing a third conductive material over the set of contacts on the second level thereby forming a first set of conductors, and depositing a fourth conductive material over the set of contacts on the second level thereby forming a second set of conductors. The set of power rails and the first set of conductors have the first width. The second set of conductors has a second width different from the first width.