Abstract: Provided is a useful hydrocarbon production method including: a methanation step for generating a first gas containing methane from a mixed gas containing hydrogen and carbon dioxide; a dry reforming step for generating a second gas containing carbon monoxide and hydrogen from the first gas; a useful hydrocarbon generating step for generating a third gas containing a useful hydrocarbon from the carbon monoxide and hydrogen in the second gas; and a recycling step of separating a dry reforming recycle gas containing at least carbon dioxide from the third gas, and supplying the dry reforming recycle gas to the dry reforming step.

Abstract: A server that creates a spatial model includes a derivation unit configured to derive boundary point information from a panoramic image of an indoor space; a point cloud creation unit configured to create a point cloud for the panoramic image; a division unit configured to divide the point cloud based on the boundary point information; a texture image creation unit configured to create a texture image by projecting the divided point cloud onto a plane corresponding to the divided point cloud; a mesh model creation unit configured to extract geometric information from the point cloud based on the boundary point information, and create a mesh model based on the extracted geometric information; and a spatial model creation unit configured to create the spatial model for the indoor space based on the texture image and the mesh model.

Abstract: This catalyst for liquefied petroleum gas synthesis includes a Cu—Zn based catalytic material and an MFI type zeolite catalytic material supporting Pt, the Cu—Zn based catalytic material containing copper oxide, zinc oxide, aluminium oxide, and zirconium oxide, a mass (M(ZrO2)) of zirconium oxide in the Cu—Zn based catalytic material being more than 0 mass % and 6.5 mass % or less based on a mass (M1) of the Cu—Zn based catalytic material, and the MFI type zeolite catalytic material containing more than 0 mass % and less than 4.5 mass % of P.

Abstract: A composite comprising: a skeleton having a porous structure and containing a crystalline SiO2 compound; and a fine particles including a metal oxide fine particles or a metal fine particle existing within the skeleton.

Abstract: A catalyst for synthesizing liquefied petroleum gas according to the present invention includes: a Cu—Zn-based catalytic material; and an MFI-type zeolite catalytic material supporting Pt, in which a ratio (M1/(M1+M2)) of mass (M1) of the Cu—Zn-based catalytic material to total mass of the mass (M1) of the Cu—Zn-based catalytic material and mass (M2) of the MFI-type zeolite catalytic material is 0.30 or more and 0.95 or less.

Abstract: A server that creates a spatial model includes a derivation unit configured to derive boundary point information from a panoramic image of an indoor space; a point cloud creation unit configured to create a point cloud for the panoramic image; a division unit configured to divide the point cloud based on the boundary point information; a texture image creation unit configured to create a texture image by projecting the divided point cloud onto a plane corresponding to the divided point cloud; a mesh model creation unit configured to extract geometric information from the point cloud based on the boundary point information, and create a mesh model based on the extracted geometric information; and a spatial model creation unit configured to create the spatial model for the indoor space based on the texture image and the mesh model.

Abstract: A voltage-controlled oscillator device includes first and second voltage-controlled oscillators, a first switch group including two first switches, and a second switch group including two second switches. The first voltage-controlled oscillator includes a first inductor group, a first negative resistance circuit and a first voltage output terminal group. The second voltage-controlled oscillator includes a second inductor group, a second negative resistance circuit and a second voltage output terminal group. For the first switch group, first control terminals are electrically connected to the first voltage output terminal group, first input terminals are electrically connected to the second voltage output terminal group, first output terminals are electrically connected.

Abstract: A voltage-controlled oscillator device includes first and second voltage-controlled oscillators, a first switch group including two first switches, and a second switch group including two second switches. The first voltage-controlled oscillator includes a first inductor group, a first negative resistance circuit and a first voltage output terminal group. The second voltage-controlled oscillator includes a second inductor group, a second negative resistance circuit and a second voltage output terminal group. For the first switch group, first control terminals are electrically connected to the first voltage output terminal group, first input terminals are electrically connected to the second voltage output terminal group, first output terminals are electrically connected.

Abstract: A highly stable organic light-emitting panel includes a substrate and a plurality of pixelated OLED circuit assemblies. The substrate further includes an auxiliary electrode and a plurality of circuit protection structures, each of which is electrically connected to a corresponding pixelated first electrode in each pixelated OLED circuit assembly. The plurality of circuit protection structures are respectively connected to the auxiliary electrode. An insulator covers the auxiliary electrode, the plurality of circuit protection structures, and an area between the plurality of circuit protection structures and the plurality of OLED circuit assemblies.

Abstract: A luminaire (20) for mounting in an annular housing (10) having a cylindrical sidewall with an inner diameter (15), said sidewall terminating in an upper rim (12) is disclosed. The luminaire (20) comprises a reflector (50) having a light exit aperture (51) mounted in an annular body and a wedge-shaped clip (40) movably attached to the annular body by a spring (44) such that the annular body has a first diameter not exceeding the inner diameter (15) when the clip is pressed against the body by compressing said spring; and a second diameter exceeding the inner diameter when said spring is relaxed. The clip (40) further comprises an outwardly inclined member (42) in the direction of the light exit aperture and the reflector further comprises an outwardly inclining groove (52) in the direction of the light exit aperture engaging with the outwardly inclined member (42) to facilitate easy release of the luminaire from its annular housing.

Abstract: A luminaire (20) for mounting in an annular housing (10) having a cylindrical sidewall with an inner diameter (15), said sidewall terminating in an upper rim (12) is disclosed. The luminaire (20) comprises a reflector (50) having a light exit aperture (51) mounted in an annular body and a wedge-shaped clip (40) movably attached to the annular body by a spring (44) such that the annular body has a first diameter not exceeding the inner diameter (15) when the clip is pressed against the body by compressing said spring; and a second diameter exceeding the inner diameter when said spring is relaxed. The clip (40) further comprises an outwardly inclined member (42) in the direction of the light exit aperture and the reflector further comprises an outwardly inclining groove (52) in the direction of the light exit aperture engaging with the outwardly inclined member (42) to facilitate easy release of the luminaire from its annular housing.

Abstract: A highly stable organic light-emitting panel includes a substrate and a plurality of pixelated OLED circuit assemblies. The substrate further includes an auxiliary electrode and a plurality of circuit protection structures, each of which is electrically connected to a corresponding pixelated first electrode in each pixelated OLED circuit assembly. The plurality of circuit protection structures are respectively connected to the auxiliary electrode. An insulator covers the auxiliary electrode, the plurality of circuit protection structures, and an area between the plurality of circuit protection structures and the plurality of OLED circuit assemblies.

Abstract: A capacitance phase interpolation circuit including a first capacitance phase interpolation unit and a second capacitance phase interpolation unit is disclosed. The first capacitance phase interpolation unit includes a first capacitance group, wherein a plurality of capacitors in the first capacitance group are in a ring coupling, and the first capacitance phase interpolation unit receives a plurality of reference clock signals. The second capacitance phase interpolation unit is coupled to the first capacitance phase interpolation unit and includes a second capacitance group, wherein a plurality of capacitors in the second capacitance group are in a ring coupling, and each of the output clock signals is obtained via the first capacitance phase interpolation unit and the second capacitance phase interpolation unit by performing phase interpolation on all the reference clock signals.

Abstract: A capacitance phase interpolation circuit including a first capacitance phase interpolation unit and a second capacitance phase interpolation unit is disclosed. The first capacitance phase interpolation unit includes a first capacitance group, wherein a plurality of capacitors in the first capacitance group are in a ring coupling, and the first capacitance phase interpolation unit receives a plurality of reference clock signals. The second capacitance phase interpolation unit is coupled to the first capacitance phase interpolation unit and includes a second capacitance group, wherein a plurality of capacitors in the second capacitance group are in a ring coupling, and each of the output clock signals is obtained via the first capacitance phase interpolation unit and the second capacitance phase interpolation unit by performing phase interpolation on all the reference clock signals.

Abstract: A current reuse frequency divider including a first latch circuit and a second latch circuit is provided. The first latch circuit includes a first transistor pair and a second transistor pair. The first latch circuit receives a first differential oscillation signal through bodies of the first transistor pair and the second transistor pair and divides the frequency of the first differential oscillation signal to generate a second differential oscillation signal. The second latch circuit is coupled to the first latch circuit and includes a third transistor pair and a fourth transistor pair. The second latch circuit receives the first differential oscillation signal through bodies of the third transistor pair and the fourth transistor pair and divides the frequency of the first differential oscillation signal to generate a third differential oscillation signal.

Abstract: A current reuse frequency divider including a first latch circuit and a second latch circuit is provided. The first latch circuit includes a first transistor pair and a second transistor pair. The first latch circuit receives a first differential oscillation signal through bodies of the first transistor pair and the second transistor pair and divides the frequency of the first differential oscillation signal to generate a second differential oscillation signal. The second latch circuit is coupled to the first latch circuit and includes a third transistor pair and a fourth transistor pair. The second latch circuit receives the first differential oscillation signal through bodies of the third transistor pair and the fourth transistor pair and divides the frequency of the first differential oscillation signal to generate a third differential oscillation signal.

Abstract: A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.

Abstract: A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.

Abstract: An apparatus for clock skew compensation is provided. The apparatus includes a first delay locked loop (DLL) module disposed in a first die and a second DLL module disposed in a second die. A first input terminal of the first DLL module receives a reference clock. A first input terminal of the second DLL module is electrically connected to an output terminal of the first DLL module. An output terminal of the second DLL module is electrically connected to a second input terminal of the first DLL module.

Abstract: An apparatus for clock skew compensation is provided. The apparatus includes a first delay locked loop (DLL) module disposed in a first die and a second DLL module disposed in a second die. A first input terminal of the first DLL module receives a reference clock. A first input terminal of the second DLL module is electrically connected to an output terminal of the first DLL module. An output terminal of the second DLL module is electrically connected to a second input terminal of the first DLL module.