Abstract: A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a transistor and a first resistor. A base of the transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage.

Abstract: A passive flow modulation device for a machine defining an axial direction and a radial direction, the passive flow modulation device including: a first ring with a first coefficient of thermal expansion; a second ring disposed coaxially with the first ring and positioned at least partially inward of the first ring along the radial direction, spaced from the first ring along the axial direction, or both, the first ring, the second ring, or both defining at least in part one or more passages, the second ring with a second coefficient of thermal expansion that is less than the first coefficient of thermal expansion to passively modulate a size of the one or more passages during operation.

Abstract: An exercise intensity assessing system includes a physiological information sensor, a signal transmitter connected with the physiological information sensor, a central control host connected with the signal transmitter, and a cloud database connected with the central control host. The physiological information sensor senses physiological information of an exerciser before and after the exerciser exercises. The physiological information is transmitted by the signal transmitter to the central control host, and transmitted by the central control host to the cloud database for being diagnosed and analyzed by a fitness instructor. The cloud database obtains a forecasted watt value corresponding to the physiological information, and obtains a resistance level of different fitness apparatuses according to the forecasted watt value.

Abstract: An intelligent exercise intensity assessing system includes an exercise testing machine, a physiological information sensor, a signal transmitter connected with the physiological information sensor, a central control host connected with the signal transmitter, and a cloud database connected with the central control host. The physiological information sensor senses physiological information of an exerciser before and after the exerciser operates the exercise testing machine. The physiological information is transmitted by the signal transmitter to the central control host, and transmitted by the central control host to the cloud database. The cloud database analyzes the physiological information to obtain a corresponding forecasted watt value, and obtains a resistance level of different fitness apparatuses according to the forecasted watt value.

Abstract: A passive flow modulation device for a machine defining an axial direction and a radial direction, the passive flow modulation device including: a first ring with a first coefficient of thermal expansion; a second ring disposed coaxially with the first ring and positioned at least partially inward of the first ring along the radial direction, spaced from the first ring along the axial direction, or both, the first ring, the second ring, or both defining at least in part one or more passages, the second ring with a second coefficient of thermal expansion that is less than the first coefficient of thermal expansion to passively modulate a size of the one or more passages during operation.

Abstract: A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a transistor and a first resistor. A base of the transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage.

Abstract: A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a bipolar junction transistor, a first resistor and a second resistor. A base of the bipolar junction transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage, a first terminal of the second resistor is electrically connected to an emitter of the bipolar junction transistor, and a second terminal of the second resistor receives a third driving voltage The bipolar junction transistor is operated in an active region.

Abstract: A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a bipolar junction transistor, a first resistor and a second resistor. A base of the bipolar junction transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage, a first terminal of the second resistor is electrically connected to an emitter of the bipolar junction transistor, and a second terminal of the second resistor receives a third driving voltage The bipolar junction transistor is operated in an active region.

Abstract: A passive flow modulation device for a machine defining an axial direction and a radial direction, the passive flow modulation device including: a first ring with a first coefficient of thermal expansion; a second ring disposed coaxially with the first ring and positioned at least partially inward of the first ring along the radial direction, spaced from the first ring along the axial direction, or both, the first ring, the second ring, or both defining at least in part one or more passages, the second ring with a second coefficient of thermal expansion that is less than the first coefficient of thermal expansion to passively modulate a size of the one or more passages during operation.

Abstract: The present disclosure, in some embodiments, relates to a debonding and cleaning apparatus. The apparatus has a debonding module configured to separate semiconductor substrates from carrier substrates. A first cleaning module is configured to clean surfaces of a first plurality of the semiconductor substrates and a second cleaning module is configured to clean surfaces of a second plurality of the semiconductor substrates. The apparatus also has a first substrate handling module including a first robotic arm in communication with the debonding module and a second substrate handling module including a second robotic arm that is located between the first cleaning module and the second cleaning module. The second substrate handling module is configured to transfer the first plurality of the semiconductor substrates to first cleaning module and to transfer the second plurality of the semiconductor substrates to the second cleaning module.

Abstract: The present disclosure, in some embodiments, relates to a debonding and cleaning apparatus. The apparatus has a debonding module configured to separate semiconductor substrates from carrier substrates. A first cleaning module is configured to clean surfaces of a first plurality of the semiconductor substrates and a second cleaning module is configured to clean surfaces of a second plurality of the semiconductor substrates. The apparatus also has a first substrate handling module including a first robotic arm in communication with the debonding module and a second substrate handling module including a second robotic arm that is located between the first cleaning module and the second cleaning module. The second substrate handling module is configured to transfer the first plurality of the semiconductor substrates to first cleaning module and to transfer the second plurality of the semiconductor substrates to the second cleaning module.

Abstract: A wafer debonding and cleaning apparatus comprises a wafer debonding module configured to separate a semiconductor wafer from a carrier wafer. The wafer debonding and cleaning apparatus also comprises a first wafer cleaning module configured perform a first cleaning process to clean a surface of the semiconductor wafer. The wafer debonding and cleaning apparatus further comprises an automatic wafer handling module configured to transfer the semiconductor wafer from one of the wafer debonding module or the first wafer cleaning module to the other of the wafer debonding module or the first wafer cleaning module. The semiconductor wafer has a thickness ranging from about 0.20 ?m to about 3 mm.

Abstract: A method comprising placing a wafer assembly in a wafer cassette, wherein the wafer assembly includes a wafer and an electrostatic carrier attached to the wafer. In addition, the electrostatic carrier is charged through the wafer cassette, the wafer cassette is transported to a next process stage, and the wafer assembly is removed from the wafer cassette.

Abstract: A method of wafer bonding includes bonding a wafer to a carrier in a bonding system. The method further includes measuring thickness profile of the bonded wafer. The method further includes modifying surface contours of at least one of an upper plate or a lower plate of the bonding system during a bonding operation to improve planarity of bonded wafers based on the measured thickness profile, wherein modifying the surface contours of at least one of the upper plate or the lower plate comprises modifying the surface contours using a plurality of height adjusters.

Abstract: A motor drive circuit including a back electromotive force detecting module and a processing module is disclosed herein. The back electromotive force detecting module is electrically connected to a single phase DC motor and is configured to detect a back electromotive force of the single phase DC motor and to output a detecting signal correspondingly. The processing module is electrically connected to the back electromotive force detecting module and the single phase DC motor. The processing module is configured to determine the rotation direction of the single phase DC motor according to the detecting signal and a hall signal outputted by a hall element located in the single phase DC motor, and is configured to control the single phase DC motor.

Abstract: Packaged semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes a substrate and a plurality of integrated circuit dies coupled to the substrate. The device also includes a molding material disposed over the substrate between adjacent ones of the plurality of integrated circuit dies. A cap layer is disposed over the molding material and the plurality of integrated circuit dies, wherein the cap layer comprises an electrically conductive material that directly contacts the molding material and each of the plurality of integrated circuit dies.

Abstract: A method comprising placing a wafer assembly in a wafer cassette, wherein the wafer assembly includes a wafer and an electrostatic carrier attached to the wafer. In addition, the electrostatic carrier is charged through the wafer cassette, the wafer cassette is transported to a next process stage, and the wafer assembly is removed from the wafer cassette.

Abstract: A wafer cassette includes a main body having space to hold at least one wafer assembly. Each of the at least one wafer assembly includes a wafer and an electrostatic carrier attached to the wafer. An electrical contact structure inside the main body is arranged to contact an electrical pad of the electrostatic carrier.

Abstract: Packaged semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes a substrate and a plurality of integrated circuit dies coupled to the substrate. The device also includes a molding material disposed over the substrate between adjacent ones of the plurality of integrated circuit dies. A cap layer is disposed over the molding material and the plurality of integrated circuit dies, wherein the cap layer comprises an electrically conductive material that directly contacts the molding material and each of the plurality of integrated circuit dies.

Abstract: A controlled release pharmaceutical composition is disclosed, which comprises: a drug core comprising 10-50 mg of Carvedilol or a pharmaceutical acceptable salt thereof, and a first pharmaceutical acceptable polymer, wherein a content of the first pharmaceutical acceptable polymer is 0.01-50% based on a total weight of the drug core; and a controlled release coating layer covering the drug core and comprising a second pharmaceutical acceptable polymer. In addition, a method for manufacturing the aforementioned controlled release pharmaceutical composition is also disclosed.