Abstract: A semiconductor may include an active region, an epitaxial source/drain formed in and extending above the active region, and a first dielectric layer formed over a portion of the active region. The semiconductor may include a first metal gate and a second metal gate formed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer and the second metal gate, and a titanium layer, without an intervening fluorine residual layer, formed on the metal gate and the epitaxial source/drain. The semiconductor may include a first metal layer formed on top of the titanium on the first metal gate, a second metal layer formed on top of the titanium layer on the epitaxial source/drain, and a third dielectric layer formed on the second dielectric layer. The semiconductor may include first and second vias formed in the third dielectric layer.

Abstract: A lid attach process includes dipping a periphery of a lid in a dipping tank of adhesive material such that the adhesive material attaches to the periphery of the lid. The lid attach process further includes positioning the lid over a die attached to a substrate using a lid carrier, wherein the periphery of the lid is aligned with a periphery of the lid carrier. The lid attach process further includes attaching the lid to the substrate with the adhesive material forming an interface with the substrate. The lid attach process further includes contacting a thermal interface material (TIM) on the die with the lid.

Abstract: In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.

Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.

Abstract: The present invention provides a supporting hook structure, comprising a sleeve, a fixing rod, a first limit unit, a hook and a fixing device. The fixing rod is connected to the side surface of the sleeve. The hook body is connected to one end of the sleeve. The first limit unit is arranged on the side surface of the sleeve and adjacent to the hook body. The first limit unit makes the hook body rotates with the axis direction of the sleeve as a rotation axis. The fixing device is connected to the other end of the sleeve to fix the rotating position of the hook body. Through the above, the hook part enters the proximal thigh from a surgical entrance and the hook part rotates to make the hook part abut against the proximal femur to complete the positioning and fixation of the femur hook structure to the femur.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE sends a request message to a core network. The request message requests joining one or more requested multicast broadcast service (MBS) sessions. The UE receives a response message from the core network. The response message contains received MBS information indicating one or more admitted MBS sessions. The received MBS information includes a respective IP address type (IPAT) field. The IPAT field indicates a type of an IP address corresponding to each of the one or more admitted MBS sessions. The UE decodes the IP address corresponding to each of the one or more admitted MBS sessions according to the type indicated by the respective IPAT field.

Abstract: The physical vapor deposition tool includes a magnet component, a single cathode, and a power circuit for biasing a pedestal that supports a semiconductor substrate. During a deposition operation that deposits an inert metal material, the physical vapor deposition tool may modulate an electromagnetic field emanating from the magnet component that includes spiral-shaped bands having different ranges of magnetic strength. The physical vapor deposition tool may have an increased throughput relative to a physical vapor deposition tool without the magnet component, the single cathode, and the power circuit. Additionally, or alternatively, the inert metal material may have a grain size that is greater relative to a grain size of an inert metal material deposited using the physical vapor deposition tool without the magnet component, the single cathode, and the power circuit.

Abstract: An exercise intensity assessing system includes a physiological information sensor, a signal transmitter connected with the physiological information sensor, a central control host connected with the signal transmitter, and a cloud database connected with the central control host. The physiological information sensor senses physiological information of an exerciser before and after the exerciser exercises. The physiological information is transmitted by the signal transmitter to the central control host, and transmitted by the central control host to the cloud database for being diagnosed and analyzed by a fitness instructor. The cloud database obtains a forecasted watt value corresponding to the physiological information, and obtains a resistance level of different fitness apparatuses according to the forecasted watt value.

Abstract: An intelligent exercise intensity assessing system includes an exercise testing machine, a physiological information sensor, a signal transmitter connected with the physiological information sensor, a central control host connected with the signal transmitter, and a cloud database connected with the central control host. The physiological information sensor senses physiological information of an exerciser before and after the exerciser operates the exercise testing machine. The physiological information is transmitted by the signal transmitter to the central control host, and transmitted by the central control host to the cloud database. The cloud database analyzes the physiological information to obtain a corresponding forecasted watt value, and obtains a resistance level of different fitness apparatuses according to the forecasted watt value.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first diffusion barrier layer made of a dielectric material including a metal element, nitrogen, and oxygen and a first protection layer made of a dielectric material including silicon and oxygen and in direct contact with the top surface of the first diffusion barrier layer. The semiconductor device structure also includes a first thickening layer made of a dielectric material including the metal element and oxygen and in direct contact with the top surface of the first protection layer. A maximum metal content in the first thickening layer is greater than that in the first diffusion barrier layer. The semiconductor device structure further includes a conductive feature surrounded by and in direct contact with the first diffusion barrier layer, the first protection layer, and the first thickening layer.

Abstract: A passive flow modulation device for a machine defining an axial direction and a radial direction, the passive flow modulation device including: a first ring with a first coefficient of thermal expansion; a second ring disposed coaxially with the first ring and positioned at least partially inward of the first ring along the radial direction, spaced from the first ring along the axial direction, or both, the first ring, the second ring, or both defining at least in part one or more passages, the second ring with a second coefficient of thermal expansion that is less than the first coefficient of thermal expansion to passively modulate a size of the one or more passages during operation.

Abstract: A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a transistor and a first resistor. A base of the transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage.

Abstract: A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a bipolar junction transistor, a first resistor and a second resistor. A base of the bipolar junction transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage, a first terminal of the second resistor is electrically connected to an emitter of the bipolar junction transistor, and a second terminal of the second resistor receives a third driving voltage The bipolar junction transistor is operated in an active region.

Abstract: A voltage stabilizer is provided for stabilizing a gate-source voltage of a switching element, wherein a source of the switching element receives a first driving voltage. The voltage stabilizer includes a bipolar junction transistor, a first resistor and a second resistor. A base of the bipolar junction transistor receives a second driving voltage, a collector of the bipolar junction transistor is electrically connected to a gate of the switching element, a first terminal of the first resistor is electrically connected to the collector and the gate, a second terminal of the first resistor is electrically connected to the source of the switching element and receives the first driving voltage, a first terminal of the second resistor is electrically connected to an emitter of the bipolar junction transistor, and a second terminal of the second resistor receives a third driving voltage The bipolar junction transistor is operated in an active region.

Abstract: A passive flow modulation device for a machine defining an axial direction and a radial direction, the passive flow modulation device including: a first ring with a first coefficient of thermal expansion; a second ring disposed coaxially with the first ring and positioned at least partially inward of the first ring along the radial direction, spaced from the first ring along the axial direction, or both, the first ring, the second ring, or both defining at least in part one or more passages, the second ring with a second coefficient of thermal expansion that is less than the first coefficient of thermal expansion to passively modulate a size of the one or more passages during operation.

Abstract: The present disclosure, in some embodiments, relates to a debonding and cleaning apparatus. The apparatus has a debonding module configured to separate semiconductor substrates from carrier substrates. A first cleaning module is configured to clean surfaces of a first plurality of the semiconductor substrates and a second cleaning module is configured to clean surfaces of a second plurality of the semiconductor substrates. The apparatus also has a first substrate handling module including a first robotic arm in communication with the debonding module and a second substrate handling module including a second robotic arm that is located between the first cleaning module and the second cleaning module. The second substrate handling module is configured to transfer the first plurality of the semiconductor substrates to first cleaning module and to transfer the second plurality of the semiconductor substrates to the second cleaning module.

Abstract: The present disclosure, in some embodiments, relates to a debonding and cleaning apparatus. The apparatus has a debonding module configured to separate semiconductor substrates from carrier substrates. A first cleaning module is configured to clean surfaces of a first plurality of the semiconductor substrates and a second cleaning module is configured to clean surfaces of a second plurality of the semiconductor substrates. The apparatus also has a first substrate handling module including a first robotic arm in communication with the debonding module and a second substrate handling module including a second robotic arm that is located between the first cleaning module and the second cleaning module. The second substrate handling module is configured to transfer the first plurality of the semiconductor substrates to first cleaning module and to transfer the second plurality of the semiconductor substrates to the second cleaning module.

Abstract: A wafer debonding and cleaning apparatus comprises a wafer debonding module configured to separate a semiconductor wafer from a carrier wafer. The wafer debonding and cleaning apparatus also comprises a first wafer cleaning module configured perform a first cleaning process to clean a surface of the semiconductor wafer. The wafer debonding and cleaning apparatus further comprises an automatic wafer handling module configured to transfer the semiconductor wafer from one of the wafer debonding module or the first wafer cleaning module to the other of the wafer debonding module or the first wafer cleaning module. The semiconductor wafer has a thickness ranging from about 0.20 ?m to about 3 mm.

Abstract: A method comprising placing a wafer assembly in a wafer cassette, wherein the wafer assembly includes a wafer and an electrostatic carrier attached to the wafer. In addition, the electrostatic carrier is charged through the wafer cassette, the wafer cassette is transported to a next process stage, and the wafer assembly is removed from the wafer cassette.

Abstract: A method of wafer bonding includes bonding a wafer to a carrier in a bonding system. The method further includes measuring thickness profile of the bonded wafer. The method further includes modifying surface contours of at least one of an upper plate or a lower plate of the bonding system during a bonding operation to improve planarity of bonded wafers based on the measured thickness profile, wherein modifying the surface contours of at least one of the upper plate or the lower plate comprises modifying the surface contours using a plurality of height adjusters.