Patents by Inventor Yu-Lin Chang
Yu-Lin Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250107234Abstract: A display device has a display area and a peripheral area, and includes an array substrate. The array substrate includes M number of pixel unit columns disposed in the display area and a first dummy electrode disposed in the peripheral area, where M is a positive integer greater than or equal to 2. The M number of pixel unit columns include a first pixel unit column to an Mth pixel unit column arranged in sequence. Each of the M number of pixel unit columns includes a plurality of pixel units arranged in sequence. The first dummy electrode is located on one side of the first pixel unit column. During a frame period, the first pixel unit column receives the first pixel signal, and the first dummy electrode receives the first dummy signal. The polarity of the first pixel signal is different from that of the first dummy signal.Type: ApplicationFiled: July 1, 2024Publication date: March 27, 2025Inventors: Chung-Lin CHANG, Hsuan-Chen LIU, Yu-Cheng LIN, Chen-Hao SU
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Publication number: 20250098138Abstract: Semiconductor structures and methods are provided. An exemplary semiconductor structure according to the present disclosure includes a two-port static random access memory (SRAM) cell having a write port portion and a read port portion electrically coupled to the write port portion. The read port portion includes a transistor having a gate structure. The semiconductor structure also includes a first plurality of metal lines comprising a write bit line and a complementary write bit line are positioned at a first interconnect layer disposed over the gate structure and a read word line positioned at a second interconnect layer and electrically coupled to the gate structure, the second interconnect layer is disposed under the gate structure.Type: ApplicationFiled: September 19, 2023Publication date: March 20, 2025Inventors: Ping-Wei Wang, Feng-Ming Chang, Jui-Lin Chen, Yu-Bey Wu
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Publication number: 20250098137Abstract: Semiconductor structures and methods are provided. An exemplary semiconductor structure according to the present disclosure includes a two-port static random access memory (SRAM) cell having a write port portion and a read port portion electrically coupled to the write port portion. The read port portion includes a transistor having a first source/drain feature and a second source/drain feature. The semiconductor structure also includes a first plurality of metal lines comprising a write bit line and a complementary write bit line, wherein the first plurality of metal lines are positioned at a first metal interconnect layer, wherein the first metal interconnect layer is disposed over the first source/drain feature. The semiconductor structure also includes a read bit line positioned at a second metal interconnect layer, where the second metal interconnect layer is disposed under the first source/drain feature.Type: ApplicationFiled: September 19, 2023Publication date: March 20, 2025Inventors: Ping-Wei Wang, Feng-Ming Chang, Jui-Lin Chen, Yu-Bey Wu
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Publication number: 20250085751Abstract: A thermal power budget optimization method includes acquiring sensor log information from a plurality of sensors of a heating device, generating a virtual surface temperature of the heating device according to the sensor log information, setting a target surface temperature of the heating device, and dynamically adjusting a thermal power budget of the heating device according to the virtual surface temperature and the target surface temperature over time.Type: ApplicationFiled: July 29, 2024Publication date: March 13, 2025Applicant: MEDIATEK INC.Inventors: Yu-Chia Chang, Chien-Chih Huang, Ta-Chang Liao, Chia-Feng Yeh, Ching-Lin Hsiao, Wei-Te Wu
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Publication number: 20250084274Abstract: A curable composition includes an epoxy monomer component and an aniline-based hardener. The epoxy monomer component is a first component formed from a first epoxy monomer represented by Formula (I), or a second component including the first epoxy monomer represented by Formula (I) and a second epoxy monomer different from the first epoxy monomer represented by Formula (I), wherein each of the substituents in Formula (I) is given the definitions as set forth in the Specification and Claims. Based on 100 wt % of the epoxy monomer component, an amount of the first epoxy monomer represented by Formula (I) is not smaller than 25 wt % and less than 100 wt % and an amount of the second epoxy monomer is greater than 0% and not greater than 75 wt %. A cured product formed from the curable composition, and a method for encapsulating a semiconductor device using the curable composition are also provided.Type: ApplicationFiled: September 12, 2024Publication date: March 13, 2025Inventors: Yun-Ching WU, Yu-Lin HUANG, Ming-Tsung TSAI, Pei-Nung CHEN, Shu-Wei CHANG, Ming-Tsung HSU
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Publication number: 20250073667Abstract: A complex ionic compound includes a carrier, a bridging agent, and an adsorbent. The bridging agent is grafted to the carrier, and the adsorbent is grafted to the bridging agent.Type: ApplicationFiled: October 22, 2023Publication date: March 6, 2025Applicant: NAN YA PLASTICS CORPORATIONInventors: Te-Chao Liao, Wei-Sheng Cheng, Chia-Shan Chang, Yu-lin Li
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Publication number: 20250058286Abstract: A moisture-permeable composite membrane is manufactured by the step of subjecting a mixture to a crosslinking treatment. The mixture contains a polyisoprene, a polyurethane with a polar functional group, a crosslinking agent, and a vulcanizing agent. In the mixture, a weight ratio of the polyurethane with the polar functional group to the polyisoprene ranges from 1:0.55 to 1:6.60. A method for manufacturing the moisture-permeable composite membrane is also provided.Type: ApplicationFiled: January 4, 2024Publication date: February 20, 2025Inventors: Kuo-Chin CHEN, Sung-Yun HUANG, Li-Hsun CHANG, Chia-Lin CHEN, Shu-Ling LIN, Yu-Ping CHUANG
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Publication number: 20250048612Abstract: An integrated circuit (IC) device has a memory region in which a plurality of memory cells is implemented. Each of the memory cells has a first dimension in a first horizontal direction. The IC device includes an edge region bordering the memory cell region in the first horizontal direction. The edge region has a second dimension in the first horizontal direction. The second dimension is less than or equal to about 4 times the first dimension. The IC device is formed by revising a first IC layout to generate a second IC layout. The second IC layout is generated by shrinking a dimension of the edge region in the first horizontal direction.Type: ApplicationFiled: January 4, 2024Publication date: February 6, 2025Inventors: Jui-Lin Chen, Feng-Ming Chang, Ping-Wei Wang, Yu-Bey Wu, Chih-Ching Wang
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Publication number: 20250048613Abstract: The present disclosure provides an IC structure that includes a semiconductor substrate having a SRAM region, an input/output and peripheral (IOP) region, and an edge region spanning tween the SRAM region and the IOP region; a STI structure formed on the semiconductor substrate and defining active regions; a SRAM cell formed within the SRAM region; and a backside dielectric layer disposed on a backside of the semiconductor substrate and landing on a bottom surface of the STI structure. The active regions are longitudinally oriented along a first direction; gates are formed on the semiconductor substrate and are evenly distributed with a pitch P along the first direction; the SRAM cell spans a first dimension Ds along the first direction; the edge region spans a second dimension De along the first direction; and a ratio De/Ds equals to 2 or is less than 2.Type: ApplicationFiled: January 12, 2024Publication date: February 6, 2025Inventors: Jui-Lin Chen, Feng-Ming Chang, Ping-Wei Wang, Yu-Bey Wu
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Publication number: 20250043045Abstract: A method for preparing a long-chain branched polypropylene includes subjecting a T-reagent to a polymerization reaction with propylene in the presence of a catalyst composition. The catalyst composition includes an alkylaluminoxane and a metallocene-based catalyst. The metallocene-based catalyst contains a metal selected from the group consisting of titanium (Ti), zirconium (Zr), and hafnium (Hf). The T-reagent having an alkenyl silyl functional group is selected from the group consisting of 1,2-bis[dimethyl(vinyl)silyl]ethane, dimethyldivinylsilane, 7-octenyldimethyl(vinyl)silane, 7-octenyldimethyl(allyl)silane, 4-(but-3-enyl)phenyldimethyl(vinyl)silane, 4-(but-3-enyl)phenyldimethyl(allyl)silane, and combinations thereof.Type: ApplicationFiled: July 30, 2024Publication date: February 6, 2025Inventors: Jing-Cherng Tsai, Kwang-Ming Chen, Jung-Hung Kao, Kun-Pei Hsieh, Chao-Shun Chang, Hsing-Chun Chen, Chun-Wei Chiu, Cheng-Hung Chiang, Yu-Chuan Sung, Shang-Lin Tsai, Yu-Sheng Lin
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Publication number: 20250035718Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, in which the MTJ includes a pinned layer on the substrate, a reference layer on the pinned layer, a barrier layer on the reference layer, and a free layer on the barrier layer. Preferably, the free layer and the barrier layer have same width and the barrier layer and the reference layer have different widths.Type: ApplicationFiled: October 15, 2024Publication date: January 30, 2025Applicant: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Chen -Yi Weng, Che-Wei Chang, Si-Han Tsai, Ching-Hua Hsu, Jing-Yin Jhang, Yu-Ping Wang
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Patent number: 12211811Abstract: An electronic device includes a substrate, an electronic component, a first interposing layer and a second interposing layer. The substrate is non-planar and the substrate includes a first substrate pad and a second substrate pad. The electronic component includes a first component pad and a second component pad corresponding to the first substrate pad and the second substrate pad respectively. When the first component pad contacts the first substrate pad, a height difference exists between the second component pad and the second substrate pad. The first interposing layer connects between the first component pad and the first substrate pad. The second interposing layer connects between the second component pad and the second substrate pad. A thickness difference between the first interposing layer and the second interposing layer is 0.5 to 1 time the height difference.Type: GrantFiled: March 24, 2022Date of Patent: January 28, 2025Assignee: Industrial Technology Research InstituteInventors: Yu-Ming Peng, Chien-Chou Tseng, Chih-Chia Chang, Kuan-Chu Wu, Yu-Lin Hsu
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Publication number: 20240409180Abstract: Provided is a bicycle handlebar grip assembly for mounting on a handlebar of a bicycle handlebar, the bicycle handlebar grip assembly including at least one handgrip body for arranging on a handlebar, such as the end thereof, for a rider to thereby hold the handlebar, fixing means for fixing the bicycle handlebar grip assembly to the handlebar, such as for the purpose of securing or clamping this, and a coupling connection for coupling the handgrip body to the fixing meansType: ApplicationFiled: October 7, 2022Publication date: December 12, 2024Inventors: Yi-Fang Chen, Zhao-Bo Zhan, Alexandre Phaneuf, Chun-Hsun Kao, Chien-I Chen, Yu-Lin Chang, Job Hendrik Stehmann
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Publication number: 20240400144Abstract: The invention relates to a bicycle (200), in particular an electric bicycle (200). The invention also relates to a light module (100) for use in a bicycle (200), in particular an electric bicycle (200) according to the invention. The invention further relates to a bicycle control unit (8) programmed to independently control a plurality of light sources (104) of at least one light module (100) for use in a bicycle (200), in particular an electric bicycle (200) according to the invention. The invention moreover relates to an assembly of at least one light module (100) according to the invention and at least one bicycle control unit (8) according to the invention.Type: ApplicationFiled: October 7, 2022Publication date: December 5, 2024Inventors: Marjolein Deun, Alexandre Phaneuf, Olivier Hébert, Wei-Ting Yu, Tzu-Jung Huang, Yu-Lin Chang, Job Hendrik Stehmann
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Patent number: 10803003Abstract: A data recording system includes a host terminal and a data recorder. The host terminal defines a first module card to be corresponding to a first data channel and a first module card slot of the data recorder. The first module card is inserted into the first module card slot, and the data recorder stores a first type of data captured from the first data channel to the first module card. The host terminal has the data recorder stop capturing the first type of data, and defines a second module card to be corresponding to a second data channel and the first module card slot of the data recorder. The data recorder is shut down, and the first module card is dismounted from the first module card slot. The second module card is inserted into the first module card slot, and the data recorder is rebooted.Type: GrantFiled: December 8, 2019Date of Patent: October 13, 2020Assignees: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Yu-Lin Chang, Kai-Yang Tung
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Patent number: 10520546Abstract: An automatic power supply system is electrically coupled to a component to be tested. The automatic power supply system includes a power array and a controller. The power array includes a plurality of power channels, and provides power supplies through the plurality of power channels. The component to be tested is electrically coupled to a first power channel of the plurality of power channels and receives a power supply through the first power channel. The controller is electrically coupled to the power array, and calculates a power of the power supply received by the component to be tested. The controller adjusts a power specification of the power supply provided through the first power channel according to the power.Type: GrantFiled: December 13, 2018Date of Patent: December 31, 2019Assignees: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Yu-Lin Chang, Kai-Yang Tung, Mao-Ching Lin
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Patent number: 10482626Abstract: Calibration methods for calibrating image capture devices of an around view monitoring (AVM) system mounted on vehicle are provided, the calibration method including: extracting local patterns from images captured by each image capture device, wherein each local pattern is respectively disposed at a position within the image capturing range of one of the image capture devices; acquiring an overhead-view (OHV) image from OHV point above vehicle, wherein the OHV image includes first patterns relative to the local patterns for the image capture devices; generating global patterns from the OHV image using the first patterns, each global pattern corresponding to one of the local patterns; matching the local patterns with the corresponding global patterns to determine camera parameters and transformation information corresponding thereto for each image capture device; and calibrating each image capture device using determined camera parameters and transformation information corresponding thereto so as to generate AType: GrantFiled: January 8, 2018Date of Patent: November 19, 2019Assignee: MEDIATEK INC.Inventors: Yu-Lin Chang, Yu-Pao Tsai
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Patent number: 10477183Abstract: A method of three-dimensional video encoding and decoding that adaptively incorporates camera parameters in the video bitstream according to a control flag is disclosed. The control flag is derived based on a combination of individual control flags associated with multiple depth-oriented coding tools. Another control flag can be incorporated in the video bitstream to indicate whether there is a need for the camera parameters for the current layer. In another embodiment, a first flag and a second flag are used to adaptively control the presence and location of camera parameters for each layer or each view in the video bitstream. The first flag indicates whether camera parameters for each layer or view are present in the video bitstream. The second flag indicates camera parameter location for each layer or view in the video bitstream.Type: GrantFiled: July 18, 2014Date of Patent: November 12, 2019Assignee: HFI INNOVATION INC.Inventors: Yu-Lin Chang, Yi-Wen Chen, Jian-Liang Lin
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Publication number: 20190301661Abstract: The proposed vacuum jacketed tube may deliver the high/low temperature fluid with less temperature-transfer, especially may delivery high/low temperature fluid through a flexible structure. The vacuum jacketed tube includes a tubular structure surrounding a pipe wherein the fluid is delivered therethrough. Also, the space between the tubular structure and the pipe may be vacuumed. Therefore, the heat transferred into and/or away the fluid may be minimized, especially if the tubular structure and the pipe is separated by at least one thermal insulator or is separated mutually. Moreover, the vacuum jacketed tube may be mechanically connected to the source/destination of the delivered fluid, even other vacuum jacketed tube, through the bellows and/or the rotary joint. Besides, the pipe may be surrounded by a Teflon bellows and the tubular structure may be surrounded by a steel bellows, so as to further reduce the heat transferred into/away the fluid delivered inside the pipe.Type: ApplicationFiled: March 29, 2019Publication date: October 3, 2019Inventors: Yu-Lin Chang, Chien-Cheng Kuo, Yu-Ho Ni, Chun-Chieh Lin
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Publication number: 20190213756Abstract: Calibration methods for calibrating image capture devices of an around view monitoring (AVM) system mounted on vehicle are provided, the calibration method including: extracting local patterns from images captured by each image capture device, wherein each local pattern is respectively disposed at a position within the image capturing range of one of the image capture devices; acquiring an overhead-view (OHV) image from OHV point above vehicle, wherein the OHV image includes first patterns relative to the local patterns for the image capture devices; generating global patterns from the OHV image using the first patterns, each global pattern corresponding to one of the local patterns; matching the local patterns with the corresponding global patterns to determine camera parameters and transformation information corresponding thereto for each image capture device; and calibrating each image capture device using determined camera parameters and transformation information corresponding thereto so as to generate AType: ApplicationFiled: January 8, 2018Publication date: July 11, 2019Inventors: Yu-Lin CHANG, Yu-Pao TSAI