Patents by Inventor Yu-Lung Huang
Yu-Lung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210320076Abstract: Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate. Therefore, the arrangement of the bump body and the metal auxiliary layer allows complete reaction of the IMCs after reflowing the solder layer, and the volume of the conductive structures will not continue to shrink. As such, the problem of cracking of the conductive structures can be effectively averted.Type: ApplicationFiled: July 7, 2020Publication date: October 14, 2021Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
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Publication number: 20210287962Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.Type: ApplicationFiled: May 12, 2020Publication date: September 16, 2021Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
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Patent number: 11069661Abstract: An electronic package is formed by arranging two encapsulating portions of different materials between a plurality of electronic components stacked to each other to adjust a stress distribution of the electronic package, so that the degree of warpage of the electronic package can be optimally controlled.Type: GrantFiled: June 23, 2020Date of Patent: July 20, 2021Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Wei-Jhen Chen, Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
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Publication number: 20210082837Abstract: An electronic package is provided and includes a plurality of electronic elements, a spacing structure connecting each of the plurality of electronic elements, and a plurality of conductive elements electrically connected to the plurality of electronic elements and serving as external contacts. The spacing structure has a recess to enhance the flexibility of the electronic elements after the electronic elements are connected to one another, thereby preventing the problem of warpage. A method for fabricating the electronic package is also provided.Type: ApplicationFiled: May 6, 2020Publication date: March 18, 2021Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chee-Key Chung, Yuan-Hung Hsu, Chi-Jen Chen
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Patent number: 10950520Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.Type: GrantFiled: August 6, 2019Date of Patent: March 16, 2021Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Kuo-Hua Yu, Wen-Shan Tsai, En-Li Lin, Kaun-I Cheng, Wei-Ping Wang
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Publication number: 20210068260Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.Type: ApplicationFiled: November 2, 2020Publication date: March 4, 2021Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
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Patent number: 10863626Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.Type: GrantFiled: October 31, 2019Date of Patent: December 8, 2020Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
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Publication number: 20200168523Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.Type: ApplicationFiled: August 6, 2019Publication date: May 28, 2020Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Kuo-Hua Yu, Wen-Shan Tsai, En-Li Lin, Kaun-I Cheng, Wei-Ping Wang
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Patent number: 10152180Abstract: This present invention provides a chip scale sensing chip package, comprising a sensing chip having a first top surface and a first bottom surface opposite to each other, a touch plate having a second top surface and a second bottom surface opposite to each other, formed above the sensing chip, and a color layer, sandwiched between the sensing chip and the touch plate, wherein the sensing chip comprises a sensing device formed nearby the first top surface and a plurality of conductive pads formed nearby the first top surface and adjacent to the sensing device, a plurality of through silicon vias exposing their corresponding conductive pads formed on the first bottom surface, a plurality of conductive structures formed on the first bottom surface, and a re-distribution layer overlaying the first bottom surface and each through silicon via to electrically connect each conductive pad and each conductive structure.Type: GrantFiled: March 4, 2016Date of Patent: December 11, 2018Assignee: XINTEC INC.Inventors: Shu-Ming Chang, Yu-Lung Huang, Tsang-Yu Liu, Yen-Shih Ho
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Patent number: 10140498Abstract: A method for forming a sensing device includes providing a first substrate. The first substrate has a first surface and a second surface opposite thereto. A sensing region is adjacent to the first surface. A temporary cover plate is provided on the second surface to cover the sensing region. The method also includes forming a redistribution layer on the second surface and electrically connected to the sensing region. The method further includes removing the temporary cover plate after the formation of the redistribution layer. The first substrate is bonded to a second substrate and a cover plate after the removal of the temporary cover plate so that the first substrate is positioned between the second substrate and the cover plate. In addition, the method includes filling an encapsulating layer between the second substrate and the cover plate to surround the first substrate.Type: GrantFiled: October 19, 2016Date of Patent: November 27, 2018Assignee: XINTEC INC.Inventors: Tsang-Yu Liu, Ying-Nan Wen, Chi-Chang Liao, Yu-Lung Huang
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Patent number: 10109663Abstract: A chip package including a substrate is provided. The substrate has a first surface and a second surface opposite thereto. The substrate includes a sensing region. A cover plate is on the first surface and covers the sensing region. A shielding layer covers a sidewall of the cover plate and extends towards the second surface. The shielding layer has an inner surface adjacent to the cover plate and has an outer surface away from the cover plate. The length of the outer surface extending towards the second surface is less than that of the inner surface extending towards the second surface, and is not less than that of the sidewall of the cover plate. A method of forming the chip package is also provided.Type: GrantFiled: September 7, 2016Date of Patent: October 23, 2018Assignee: XINTEC INC.Inventors: Yu-Lung Huang, Tsang-Yu Liu, Yi-Ming Chang, Hsin Kuan
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Patent number: 9947716Abstract: A chip package includes a chip, an adhesive layer, and a dam element. The chip has a sensing area, a first surface, and a second surface that is opposite to the first surface. The sensing area is located on the first surface. The adhesive layer covers the first surface of the chip. The dam element is located on the adhesive layer and surrounds the sensing area. The thickness of the dam element is in a range from 20 ?m to 750 ?m, and the wall surface of the dam element surrounding the sensing area is a rough surface.Type: GrantFiled: November 22, 2016Date of Patent: April 17, 2018Assignee: XINTEC INC.Inventors: Yen-Shih Ho, Hsiao-Lan Yeh, Chia-Sheng Lin, Yi-Ming Chang, Po-Han Lee, Hui-Hsien Wu, Jyun-Liang Wu, Shu-Ming Chang, Yu-Lung Huang, Chien-Min Lin
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Patent number: 9881889Abstract: A chip package is provided, in which includes: a packaging substrate, a chip and a plurality solder balls interposed between the packaging substrate and the chip for bonding the packaging substrate and the chip, wherein the solder balls include a first portion of a first size and a second portion of a second size that is different from the first size.Type: GrantFiled: April 11, 2014Date of Patent: January 30, 2018Assignee: XINTEC INC.Inventors: Yu-Lung Huang, Shu-Ming Chang, Tsang-Yu Liu, Yen-Shih Ho
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Patent number: 9865526Abstract: A chip package including a first substrate having an upper surface, a lower surface and a sidewall is provided. A sensing region or device region and a conducting pad are adjacent to the upper surface. A through-hole penetrates the first substrate. A redistribution layer extends from the lower surface into the through-hole and is electrically connected to the conducting pad. The redistribution layer further laterally extends from the lower surface to protrude from the sidewall. A method for forming the chip package is also provided.Type: GrantFiled: October 7, 2015Date of Patent: January 9, 2018Assignee: XINTEC INC.Inventor: Yu-Lung Huang
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Patent number: 9711425Abstract: A sensing module is provided. The sensing module includes a sensing device. The sensing device includes a first substrate having a first surface and a second surface opposite thereto. The sensing device also includes a sensing region adjacent to the first surface and a conducting pad on the first surface. The sensing device further includes a redistribution layer on the second surface and electrically connected to the conducting pad. The sensing module also includes a second substrate and a cover plate bonded to the sensing device so that the sensing device is between the second substrate and the cover plate. The conducting pad is electrically connected to the second substrate through the redistribution layer. The sensing module further includes an encapsulating layer filled between the second substrate and the cover plate to surround the sensing device.Type: GrantFiled: August 15, 2016Date of Patent: July 18, 2017Assignee: XINTEC INC.Inventors: Shu-Ming Chang, Po-Chang Huang, Tsang-Yu Liu, Yu-Lung Huang, Chi-Chang Liao
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Publication number: 20170148844Abstract: A chip package includes a chip, an adhesive layer, and a dam element. The chip has a sensing area, a first surface, and a second surface that is opposite to the first surface. The sensing area is located on the first surface. The adhesive layer covers the first surface of the chip. The dam element is located on the adhesive layer and surrounds the sensing area. The thickness of the dam element is in a range from 20 ?m to 750 ?m, and the wall surface of the dam element surrounding the sensing area is a rough surface.Type: ApplicationFiled: November 22, 2016Publication date: May 25, 2017Inventors: Yen-Shih HO, Hsiao-Lan YEH, Chia-Sheng LIN, Yi-Ming CHANG, Po-Han LEE, Hui-Hsien WU, Jyun-Liang WU, Shu-Ming CHANG, Yu-Lung HUANG, Chien-Min LIN
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Publication number: 20170116458Abstract: A method for forming a sensing device includes providing a first substrate. The first substrate has a first surface and a second surface opposite thereto. A sensing region is adjacent to the first surface. A temporary cover plate is provided on the second surface to cover the sensing region. The method also includes forming a redistribution layer on the second surface and electrically connected to the sensing region. The method further includes removing the temporary cover plate after the formation of the redistribution layer. The first substrate is bonded to a second substrate and a cover plate after the removal of the temporary cover plate so that the first substrate is positioned between the second substrate and the cover plate. In addition, the method includes filling an encapsulating layer between the second substrate and the cover plate to surround the first substrate.Type: ApplicationFiled: October 19, 2016Publication date: April 27, 2017Inventors: Tsang-Yu LIU, Ying-Nan WEN, Chi-Chang LIAO, Yu-Lung HUANG
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Patent number: 9620431Abstract: A chip package including a semiconductor substrate is provided. A recess is in the semiconductor substrate, wherein the semiconductor substrate has at least one spacer protruding from the bottom of the recess. A conducting layer is disposed on the semiconductor substrate and extends into the recess. A method for forming the chip package is also provided.Type: GrantFiled: February 11, 2015Date of Patent: April 11, 2017Assignee: XINTEC INC.Inventors: Chia-Ming Cheng, Tsang-Yu Liu, Chi-Chang Liao, Yu-Lung Huang
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Publication number: 20170077158Abstract: A chip package including a substrate is provided. The substrate has a first surface and a second surface opposite thereto. The substrate includes a sensing region. A cover plate is on the first surface and covers the sensing region. A shielding layer covers a sidewall of the cover plate and extends towards the second surface. The shielding layer has an inner surface adjacent to the cover plate and has an outer surface away from the cover plate. The length of the outer surface extending towards the second surface is less than that of the inner surface extending towards the second surface, and is not less than that of the sidewall of the cover plate. A method of forming the chip package is also provided.Type: ApplicationFiled: September 7, 2016Publication date: March 16, 2017Inventors: Yu-Lung HUANG, Tsang-Yu LIU, Yi-Ming CHANG, Hsin KUAN
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Publication number: 20170053848Abstract: A sensing module is provided. The sensing module includes a sensing device. The sensing device includes a first substrate having a first surface and a second surface opposite thereto. The sensing device also includes a sensing region adjacent to the first surface and a conducting pad on the first surface. The sensing device further includes a redistribution layer on the second surface and electrically connected to the conducting pad. The sensing module also includes a second substrate and a cover plate bonded to the sensing device so that the sensing device is between the second substrate and the cover plate. The conducting pad is electrically connected to the second substrate through the redistribution layer. The sensing module further includes an encapsulating layer filled between the second substrate and the cover plate to surround the sensing device.Type: ApplicationFiled: August 15, 2016Publication date: February 23, 2017Inventors: Shu-Ming CHANG, Po-Chang HUANG, Tsang-Yu LIU, Yu-Lung HUANG, Chi-Chang LIAO