Patents by Inventor Yu Maehashi

Yu Maehashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180294307
    Abstract: Each of a plurality of pixels arranged in two dimensions includes a photoelectric conversion unit including a pixel electrode, a photoelectric conversion layer provided above the pixel electrode, and a counter electrode provided so as to sandwich the photoelectric conversion layer between the counter electrode and the pixel electrode, and a microlens arranged above the photoelectric conversion unit. The plurality of pixels includes a first pixel and a plurality of second pixels. At least either the pixel electrodes of the plurality of second pixels are smaller than the pixel electrode of the first pixel or the counter electrodes of the plurality of second pixels are smaller than the counter electrode of the first pixel, and a configuration between the counter electrode and the microlens of the first pixel is the same as a configuration between the counter electrode and the microlens of each of the plurality of second pixels.
    Type: Application
    Filed: June 11, 2018
    Publication date: October 11, 2018
    Inventors: Masatsugu Itahashi, Toshiaki Ono, Hidekazu Takahashi, Naoki Inatani, Yu Maehashi
  • Patent number: 10020340
    Abstract: Each of a plurality of pixels arranged in two dimensions includes a photoelectric conversion unit including a pixel electrode, a photoelectric conversion layer provided above the pixel electrode, and a counter electrode provided so as to sandwich the photoelectric conversion layer between the counter electrode and the pixel electrode, and a microlens arranged above the photoelectric conversion unit. The plurality of pixels includes a first pixel and a plurality of second pixels. At least either the pixel electrodes of the plurality of second pixels are smaller than the pixel electrode of the first pixel or the counter electrodes of the plurality of second pixels are smaller than the counter electrode of the first pixel, and a configuration between the counter electrode and the microlens of the first pixel is the same as a configuration between the counter electrode and the microlens of each of the plurality of second pixels.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: July 10, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masatsugu Itahashi, Toshiaki Ono, Hidekazu Takahashi, Naoki Inatani, Yu Maehashi
  • Patent number: 9986194
    Abstract: A solid state imaging device includes a photoelectric conversion unit that generates a signal based on an incident light by photoelectric conversion; a transfer unit that transfers the signal from the photoelectric conversion unit; a ramp wave generating unit that has an input node where the signal is transferred and that generates a ramp wave whose voltage changes with time at a slope based on a potential of the input node; a detection unit that detects a change in a relationship between the ramp wave and a threshold voltage; a ramp wave reset unit that resets the ramp wave voltage upon detection of a change in the relationship; a control unit that causes the detection unit to repeatedly detect a change in the relationship; and a digital value acquisition unit that acquires a digital value corresponding to the number of repetitions for which a change in the relationship is detected.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: May 29, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yu Maehashi
  • Publication number: 20170347049
    Abstract: A solid state imaging device includes a photoelectric conversion unit that generates a signal based on an incident light by photoelectric conversion; a transfer unit that transfers the signal from the photoelectric conversion unit; a ramp wave generating unit that has an input node where the signal is transferred and that generates a ramp wave whose voltage changes with time at a slope based on a potential of the input node; a detection unit that detects a change in a relationship between the ramp wave and a threshold voltage; a ramp wave reset unit that resets the ramp wave voltage upon detection of a change in the relationship; a control unit that causes the detection unit to repeatedly detect a change in the relationship; and a digital value acquisition unit that acquires a digital value corresponding to the number of repetitions for which a change in the relationship is detected.
    Type: Application
    Filed: May 15, 2017
    Publication date: November 30, 2017
    Inventor: Yu Maehashi
  • Publication number: 20170318248
    Abstract: An image capturing apparatus includes a comparison circuit unit including a first comparator and a second comparator. The second comparator is kept in a non-operating state until the signal level of a first comparison result signal from the first comparator changes and is brought into an operating state in correspondence with a change in the signal level of the first comparison result signal.
    Type: Application
    Filed: April 20, 2017
    Publication date: November 2, 2017
    Inventor: Yu Maehashi
  • Patent number: 9762839
    Abstract: An image capturing apparatus includes a plurality of current sources each including a first transistor, a first switch, a second transistor connected to a vertical signal line via the first switch, and a second switch. The gate of the first transistor is connected to a common connecting line, and the gate of the second transistor is connected to the common connecting line via the second switch.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: September 12, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Seiichirou Sakai, Hideo Kobayashi, Yu Maehashi
  • Patent number: 9762840
    Abstract: In an imaging device including a pixel array in which a plurality of pixels is arranged, each of the pixels including first and second photoelectric conversion units, and a micro lens that collects incident light to the first and second photoelectric conversion units, in a first frame period, a first signal based on a signal electric charge generated in the first photoelectric conversion unit and a second signal based on a signal electric charge generated in at least the second photoelectric conversion unit are read out from a plurality of pixels included in a part of the pixel array, and in a second frame period, a third signal based on the signal electric charges generated in the first and the second photoelectric conversion units is read out from a plurality of pixels included in another part of the pixel array.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: September 12, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Seiichirou Sakai, Yu Maehashi
  • Patent number: 9407847
    Abstract: Provided is a solid state imaging apparatus including: a writing memory selecting unit connected between a plurality of vertical output lines and a plurality of memories, configured to selectively store a signal transmitted from at least one of the plurality of vertical output lines into at least one of the plurality of memories; a plurality of horizontal scanning channels configured to input the signals stored in the plurality of memories; and a reading memory selecting unit connected between the plurality of memories and the plurality of horizontal scanning channels, configured to selectively output the signal stored in the at least one of the plurality of memories to at least one of the plurality of horizontal scanning channels. The reading memory selecting unit is configured to output the signals in an order corresponding to spatial arrangement of photoelectric conversion elements.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: August 2, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yu Maehashi, Hiroaki Kameyama, Hideo Kobayashi, Kazuo Yamazaki
  • Publication number: 20160156860
    Abstract: An image capturing apparatus includes a plurality of current sources each including a first transistor, a first switch, a second transistor connected to a vertical signal line via the first switch, and a second switch. The gate of the first transistor is connected to a common connecting line, and the gate of the second transistor is connected to the common connecting line via the second switch.
    Type: Application
    Filed: November 24, 2015
    Publication date: June 2, 2016
    Inventors: Seiichirou Sakai, Hideo Kobayashi, Yu Maehashi
  • Patent number: 9307174
    Abstract: A solid-state imaging apparatus includes a plurality of pixels arrayed in a matrix, and configured to generate signals by photoelectric conversion; a plurality of read-out circuits disposed on each column of the plurality of pixels arrayed in a matrix pattern, and configured to read out the signals from the plurality of pixels; a plurality of comparison units configured to compare the signals output from the plurality of read-out circuits with a reference signal whose level changes with time; a counter configured to count a clock signal after the level of the reference signal starts a change; a storage unit configured, when a magnitude relationship between the signals output from the plurality of the read-out circuits and the reference signal is reversed; and a reset unit configured to reset the count value stored in the storage unit.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: April 5, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Yu Maehashi
  • Publication number: 20160037117
    Abstract: At least one solid-state image pickup element includes a plurality of pixels that are arranged in a two-dimensional manner. Each of the plurality of pixels includes a plurality of photoelectric conversion units each including a pixel electrode, a photoelectric conversion layer disposed on the pixel electrode, and a counter electrode disposed such that the photoelectric conversion layer is sandwiched between the pixel electrode and the counter electrode. In one or more embodiments, each of the plurality of pixels also includes a microlens disposed on the plurality of photoelectric conversion units.
    Type: Application
    Filed: July 27, 2015
    Publication date: February 4, 2016
    Inventors: Toshiaki Ono, Masatsugu Itahashi, Naoki Inatani, Yu Maehashi, Hidekazu Takahashi
  • Publication number: 20160035780
    Abstract: Each of a plurality of pixels arranged in two dimensions includes a photoelectric conversion unit including a pixel electrode, a photoelectric conversion layer provided above the pixel electrode, and a counter electrode provided so as to sandwich the photoelectric conversion layer between the counter electrode and the pixel electrode, and a microlens arranged above the photoelectric conversion unit. The plurality of pixels includes a first pixel and a plurality of second pixels. At least either the pixel electrodes of the plurality of second pixels are smaller than the pixel electrode of the first pixel or the counter electrodes of the plurality of second pixels are smaller than the counter electrode of the first pixel, and a configuration between the counter electrode and the microlens of the first pixel is the same as a configuration between the counter electrode and the microlens of each of the plurality of second pixels.
    Type: Application
    Filed: July 28, 2015
    Publication date: February 4, 2016
    Inventors: Masatsugu Itahashi, Toshiaki Ono, Hidekazu Takahashi, Naoki Inatani, Yu Maehashi
  • Publication number: 20150341580
    Abstract: In an imaging device including a pixel array in which a plurality of pixels is arranged, each of the pixels including first and second photoelectric conversion units, and a micro lens that collects incident light to the first and second photoelectric conversion units, in a first frame period, a first signal based on a signal electric charge generated in the first photoelectric conversion unit and a second signal based on a signal electric charge generated in at least the second photoelectric conversion unit are read out from a plurality of pixels included in a part of the pixel array, and in a second frame period, a third signal based on the signal electric charges generated in the first and the second photoelectric conversion units is read out from a plurality of pixels included in another part of the pixel array.
    Type: Application
    Filed: May 12, 2015
    Publication date: November 26, 2015
    Inventors: Kazuo Yamazaki, Seiichirou Sakai, Yu Maehashi
  • Publication number: 20150215561
    Abstract: Provided is a solid state imaging apparatus including: a writing memory selecting unit connected between a plurality of vertical output lines and a plurality of memories, configured to selectively store a signal transmitted from at least one of the plurality of vertical output lines into at least one of the plurality of memories; a plurality of horizontal scanning channels configured to input the signals stored in the plurality of memories; and a reading memory selecting unit connected between the plurality of memories and the plurality of horizontal scanning channels, configured to selectively output the signal stored in the at least one of the plurality of memories to at least one of the plurality of horizontal scanning channels. The reading memory selecting unit is configured to output the signals in an order corresponding to spatial arrangement of photoelectric conversion elements.
    Type: Application
    Filed: January 7, 2015
    Publication date: July 30, 2015
    Inventors: Yu Maehashi, Hiroaki Kameyama, Hideo Kobayashi, Kazuo Yamazaki
  • Patent number: 9077918
    Abstract: A photoelectric conversion apparatus includes, on one substrate, a pixel driving unit and a signal processing unit that includes a digital circuit configured to execute signal processing. A first voltage and a second voltage different in value from the first voltage are supplied to the digital circuit of the pixel driving unit. A third voltage and a fourth voltage different in value from the third voltage are supplied to the digital circuit of the signal processing unit. A main portion of a first conductor that supplies the first voltage to the digital circuit of the pixel driving unit and a main portion of a second conductor that supplies the third voltage to the digital circuit of the signal processing unit are isolated from each other.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: July 7, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Kohichi Nakamura, Yu Maehashi, Koichiro Iwata
  • Patent number: 8994866
    Abstract: A photoelectric conversion device includes a counter circuit configured to count a first clock signal to output a count signal thereof, a second clock signal generation unit configured to generate a second clock signal based on the first clock signal, and a clock synchronization unit configured to output a count start signal in synchronization with the second clock signal, wherein the counter circuit performs a counting operation in response to the count start signal synchronized with the second clock signal.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 31, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Yu Maehashi, Koichiro Iwata
  • Patent number: 8723099
    Abstract: An imaging apparatus includes a plurality of unit pixels arranged in a matrix and configured to generate a signal by photoelectric conversion, a plurality of pixel output lines connected to each column of the unit pixels, a plurality of column amplifiers configured to amplify a signal of the pixel output lines, and a driving circuit configured to generate a control signal of the column amplifiers. Each of the column amplifiers includes first and second input terminals, an output terminal, an input capacitance between the first and second input terminals, and a first switch between the second input and output terminals. The driving circuit is configured to generate the control signal so as to make a period for switching the first switch from a conductive state to a non-conductive state longer than a period for switching the first switch from the non-conductive state to the conductive state.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: May 13, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Koichiro Iwata, Yu Maehashi, Takeshi Akiyama
  • Patent number: 8711259
    Abstract: A solid-state imaging apparatus includes: an amplifier circuit configured to amplify a signal from pixel; and a reference signal generating circuit configured to generate a ramp signal, wherein feedback capacitor elements having the same structure are electrically connected to a capacitive feedback type amplifier of the amplifier circuit and to a capacitive feedback type amplifier of the reference signal generating circuit respectively, and a connecting configuration between an amplifier of the amplifier circuit and the feedback capacitor element and a connecting configuration between an amplifier of the reference signal generating circuit and the feedback capacitor element are the same.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: April 29, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yu Maehashi, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Kohichi Nakamura
  • Patent number: 8598901
    Abstract: A system includes: a plurality of pixels arranged in a matrix; a reference signal generating unit for generating a ramp signal; A/D converters each arranged correspondingly to each of columns to A/D-convert a signal from the pixel; a counter that performs a count operation according to an output of the ramp signal, and supplies the count signal through the count signal line to the A/D converter; and a counter test circuit that is provided independently from the A/D converter, and tests the counter, based on a matching of the expected value of the count signal with the count signal supplied through the count signal line from the counter. This configuration allows the count signal to be checked concurrently with imaging of an object.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: December 3, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Yu Maehashi, Koichiro Iwata, Kohichi Nakamura
  • Publication number: 20130087685
    Abstract: An imaging apparatus includes a plurality of unit pixels arranged in a matrix and configured to generate a signal by photoelectric conversion, a plurality of pixel output lines connected to each column of the unit pixels, a plurality of column amplifiers configured to amplify a signal of the pixel output lines, and a driving circuit configured to generate a control signal of the column amplifiers. Each of the column amplifiers includes first and second input terminals, an output terminal, an input capacitance between the first and second input terminals, and a first switch between the second input and output terminals. The driving circuit is configured to generate the control signal so as to make a period for switching the first switch from a conductive state to a non-conductive state longer than a period for switching the first switch from the non-conductive state to the conductive state.
    Type: Application
    Filed: September 10, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Koichiro Iwata, Yu Maehashi, Takeshi Akiyama