Abstract: A protection case for protecting an electronic device includes a cover body shaped to receive and hold to the electronic device. A cable winding apparatus is arranged adjacent the cover body and includes a wheel rotatably arranged adjacent the cover body, and a pivot protruding from a center of the wheel and configured to wind a cable of an earphone. A through hole is arranged on a side wall of the pivot and configured to permit a first end of the earphone, which connects to a jack, to pass through.

Abstract: A protective case for an electronic device includes a PCB and other components and devices. The other components and devices arranged on the case are connected to the PCB, the devices include a battery, a socket configured to accommodate a wireless communication device, a data connector, a wireless communication module, and a control module. The control module controls the battery to charge the electronic device and activates the wireless communication module to connect to the electronic device through the data connector, if the data connector is in use. The wireless communication module is controlled to communicate with the wireless communication device if the wireless communication device is removed from the socket and the battery is controlled to supply power to the wireless communication device if the wireless communication device is inserted into the socket.

Abstract: The instant application describes a display device including a display panel; a first component forming the front portion of the cabinet; a second component forming the rear portion of the cabinet; a metal plate comprising a first flat portion parallel to the display surface of the display panel and a second flat portion perpendicular to the first flat portion; an engaging portion provided on the first flat portion, the engaging portion being engaged with the first component; a female screw portion to which a screw penetrating the second component is inserted, and a receiving portion provided on the first component to which the engaging portion is engaged.

Abstract: A method or system that receives a product definition that includes a feature family having data defining one or more product features. The product definition including one or more corresponding rules defining one or more relationships between one or more product features. The method or system receiving input selecting one or more feature families of interest. The method or system identifying the one or more rules that provide a relationship connecting the one or more feature families to the selected feature families of interest. The method or system converting the identified rules to one or more positive logic rule groups. The method or system generating one or more global representations of the product definition by interacting the one or more positive logic rule groups to produce a result that defines the relationship between the interacted positive logic rule groups and storing the results that are determined as being valid.

Abstract: A protection case for protecting an electronic device includes a cover body shaped to receive and hold to the electronic device. A cable winding apparatus is arranged adjacent the cover body and includes a wheel rotatably arranged adjacent the cover body, and a pivot protruding from a center of the wheel and configured to wind a cable of an earphone. A through hole is arranged on a side wall of the pivot and configured to permit a first end of the earphone, which connects to a jack, to pass through.

Abstract: A method and layout generating machine for generating a layout for a device having FinFETs from a first layout for a device having planar transistors are disclosed. A planar layout with a plurality of FinFET active areas is received and corresponding FinFET active areas are generated with active area widths. Mandrels are generated according to the active area widths and adjusted such that a beta ratio of a beta number for each FinFET active area to a beta number for each corresponding planar active area is within a predetermined beta ratio range.

Abstract: A computer-implemented method or system that is capable of configuring a product. The computer-implemented method or system receiving a product configuration matrix from a computer storage medium. The computer-implemented method or system also receiving user input defining a user selection of at least one feature or component of the product. The computer-implemented method or system generating a binary representation of the user selection. The computer-implemented method or system deriving a resolution matrix. The method or system comparing the resolution matrix and the binary representation of the user selection to determine whether one or more of the selected product features or components in the user selection are valid for the product. The computer-implemented method or system also generating a validation result that identifies one or more valid product features or components within the user selection.

Abstract: A method or system that receives a product definition that includes a feature family having data defining one or more product features. The product definition including one or more corresponding rules defining one or more relationships between one or more product features. The method or system receiving input selecting one or more feature families of interest. The method or system identifying the one or more rules that provide a relationship connecting the one or more feature families to the selected feature families of interest. The method or system converting the identified rules to one or more positive logic rule groups.

Abstract: A method or system that receives a product definition that includes a feature family having data defining one or more product features. The product definition including one or more corresponding rules defining one or more relationships between one or more product features. The method or system receiving input selecting one or more feature families of interest. The method or system identifying the one or more rules that provide a relationship connecting the one or more feature families to the selected feature families of interest. The method or system converting the identified rules to one or more positive logic rule groups. The method or system generating one or more global representations of the product definition by interacting the one or more positive logic rule groups to produce a result that defines the relationship between the interacted positive logic rule groups and storing the results that are determined as being valid.

Abstract: A computer-implemented method or system that is capable of configuring a product. The computer-implemented method or system receiving a product configuration matrix from a computer storage medium. The computer-implemented method or system also receiving user input defining a user selection of at least one feature or component of the product. The computer-implemented method or system generating a binary representation of the user selection. The computer-implemented method or system deriving a resolution matrix. The method or system comparing the resolution matrix and the binary representation of the user selection to determine whether one or more of the selected product features or components in the user selection are valid for the product. The computer-implemented method or system also generating a validation result that identifies one or more valid product features or components within the user selection.

Abstract: The instant application describes a display device including a display panel; a cabinet configured to house the display panel; a spacer disposed inside of the cabinet between a back wall of the cabinet and a back portion of the display panel; and a fastening component configured to secure the back wall of the cabinet to the back portion of the display panel by penetrating through the back wall of the cabinet and the spacer and resting in an aperture provided in the back portion of the display panel.

Abstract: A method and layout generating machine for generating a layout for a device having FinFETs from a first layout for a device having planar transistors are disclosed. A planar layout with a plurality of FinFET active areas is received and corresponding FinFET active areas are generated with active area widths. Mandrels are generated according to the active area widths and adjusted such that a beta ratio of a beta number for each FinFET active area to a beta number for each corresponding planar active area is within a predetermined beta ratio range.

Abstract: A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. The planar layout is analyzed and corresponding FinFET structures are generated in a matching fashion. The resulting FinFET structures are then optimized. Dummy patterns and a new metal layer may be generated before the FinFET layout is verified and outputted.

Abstract: A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. The planar layout is analyzed and corresponding FinFET structures are generated.

Abstract: A data store includes, for a dealer of interest, a target inventory mix rate for an item having a feature. A computing device is configured to perform an optimization to obtain a recommended feature allocation of the item including the feature by minimizing a difference between a projected inventory mix rate for the feature and the target inventory mix rate for the feature.

Abstract: A computer-implemented method or system that is capable of configuring a product. The computer-implemented method or system receiving a product configuration matrix from a computer storage medium. The computer-implemented method or system also receiving user input defining a user selection of at least one feature or component of the product. The computer-implemented method or system generating a binary representation of the user selection. The computer-implemented method or system deriving a resolution matrix. The method or system comparing the resolution matrix and the binary representation of the user selection to determine whether one or more of the selected product features or components in the user selection are valid for the product. The computer-implemented method or system also generating a validation result that identifies one or more valid product features or components within the user selection.

Abstract: System and method for hierarchy reconstruction from a flattened layout are described. In one embodiment, a method for producing a reconstructed layout for an integrated circuit design from an original layout and a revised layout includes, for each pattern of the original layout, determining a pattern of the revised layout that corresponds to the pattern of the original layout; and assigning the corresponding pattern of the revised layout to a temporary instance, the temporary instance corresponding to an instance of the pattern of the original layout and citing to a temporary cell. The method further includes creating a temporary reconstructed layout from the temporary instances; and producing the reconstructed layout from the temporary reconstructed layout, wherein a hierarchy of the reconstructed layout is similar to a hierarchy of the original layout.

Abstract: The instant application describes a display device including a display panel; a first component forming the front portion of the cabinet; a second component forming the rear portion of the cabinet; a metal plate comprising a first flat portion parallel to the display surface of the display panel and a second flat portion perpendicular to the first flat portion; an engaging portion provided on the first flat portion, the engaging portion being engaged with the first component; a female screw portion to which a screw penetrating the second component is inserted, and a receiving portion provided on the first component to which the engaging portion is engaged.

Abstract: A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. The planar layout is analyzed and corresponding FinFET structures are generated.

Abstract: A method for generating a layout for a device having FinFETs from a first layout for a device having planar transistors is disclosed. The planar layout is analyzed and corresponding FinFET structures are generated in a matching fashion. The resulting FinFET structures are then optimized. Dummy patterns and a new metal layer may be generated before the FinFET layout is verified and outputted.