Patents by Inventor Yu-Ren Wang

Yu-Ren Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140290841
    Abstract: The present invention provides a method for manufacturing a display panel, comprising the following steps: (A) providing a carrier with a separation layer formed thereon; (B) laminating a glass substrate on the hydrophobic surface of the separation layer to make the separation layer between the carrier and the glass substrate; (C) forming a display unit on the glass substrate; and (D) separating the glass substrate from the carrier and the separation layer to obtain a display panel; wherein the separation layer has a hydrophobic surface with a water contacting angle in a range from 25° to 180°.
    Type: Application
    Filed: March 4, 2014
    Publication date: October 2, 2014
    Applicant: InnoLux Corporation
    Inventors: Chi-Che TSAI, Wei-Yen WU, Yu-Ren WANG
  • Patent number: 8802579
    Abstract: A semiconductor process includes the following steps. A substrate is provided. A dielectric layer having a high dielectric constant is formed on the substrate, wherein the steps of forming the dielectric layer include: (a) a metallic oxide layer is formed; (b) an annealing process is performed to the metallic oxide layer; and the steps (a) and (b) are performed repeatedly. Otherwise, the present invention further provides a semiconductor structure formed by said semiconductor process.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: August 12, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Liang Lin, Shao-Wei Wang, Yu-Ren Wang, Ying-Wei Yen
  • Publication number: 20140199854
    Abstract: A method of forming a film is provided. The method includes at least the following steps. A first substrate and a second substrate are provided in a batch processing system, wherein a first surface of the first substrate is adjacent to a second surface of the second substrate, the first surface of the first substrate has a first surface condition, the second surface of the second substrate has a second surface condition, and the first surface condition is different from the second surface condition. A pretreatment gas is provided to the surfaces of the substrates for transforming the first surface condition and the second surface condition to a third surface condition. A reaction gas is provided to form the film on the surfaces, having the third surface condition, of the substrates.
    Type: Application
    Filed: January 16, 2013
    Publication date: July 17, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Chung Chen, Tsuo-Wen Lu, Yu-Ren Wang
  • Publication number: 20140162431
    Abstract: A method for manufacturing a semiconductor structure includes the following steps. First, a semiconductor substrate is provided and a patterned pad layer is formed on the semiconductor substrate so as to expose a portion of the semiconductor substrate. Then, the semiconductor substrate exposed from the patterned pad layer is etched away to form a trench inside the semiconductor substrate. A selectively-grown material layer is selectively formed on the surface of the trench, followed by filling a dielectric precursor material into the trench. Finally, a transformation process is carried out to concurrently transform the dielectric precursor material into a dielectric material and transform the selectively-grown material layer into an oxygen-containing amorphous material layer.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 12, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Keng-Jen Lin, Yu-Ren Wang, Chih-Chung Chen, Tsuo-Wen Lu, Tsai-Yu Wen
  • Publication number: 20140159211
    Abstract: A semiconductor structure includes a dielectric layer located on a substrate, wherein the dielectric layer includes nitrogen atoms, and the concentration of the nitrogen atoms in the dielectric layer is lower than 5% at a location wherein the distance between this location in the dielectric layer to the substrate is less than 20% of the thickness of the dielectric layer. Moreover, the present invention provides a semiconductor process including the following steps: a dielectric layer is formed on a substrate. Two annealing processes are performed in-situly on the dielectric layer, wherein the two annealing processes have different imported gases and different annealing temperatures.
    Type: Application
    Filed: December 10, 2012
    Publication date: June 12, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chien-Liang Lin, Yu-Ren Wang, Ying-Wei Yen
  • Patent number: 8741784
    Abstract: A process for fabricating a semiconductor device is described. A silicon oxide layer is formed. A nitridation process including at least two steps is performed to nitridate the silicon oxide layer into a silicon oxynitride (SiON) layer. The nitridation process comprises a first nitridation step and a second nitridation step in sequence, wherein the first nitridation step and the second nitridation step are different in the setting of at least one parameter.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: June 3, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Liang Lin, Te-Lin Sun, Ying-Wei Yen, Yu-Ren Wang
  • Patent number: 8697508
    Abstract: A semiconductor process includes the following steps. A gate structure is formed on a substrate. An oxide layer is formed and covers the gate structure and the substrate. A plasma process without oxygen is performed to densify the oxide layer. A material layer is formed and covers the oxide layer. The material layer and the oxide layer are etched to form a dual spacer.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: April 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang
  • Publication number: 20140073111
    Abstract: The present invention provides a method of forming an isolation structure. A substrate is provided, and a trench is formed in the substrate. Next, a semiconductor layer is formed on a surface of the trench. A nitridation is carried out to form a nitridation layer in the semiconductor layer. Lastly, an insulation layer is filled into the trench.
    Type: Application
    Filed: September 9, 2012
    Publication date: March 13, 2014
    Inventors: Te-Lin Sun, Chien-Liang Lin, Yu-Ren Wang
  • Patent number: 8614152
    Abstract: A method for forming a gate structure includes the following steps. A substrate is provided. A silicon oxide layer is formed on the substrate. A decoupled plasma-nitridation process is applied to the silicon oxide layer so as to form a silicon oxynitride layer. A first polysilicon layer is formed on the silicon oxynitride layer. A thermal process is applied to the silicon oxynitride layer having the first polysilicon layer. After the thermal process, a second polysilicon layer is formed on the first polysilicon layer. The first polysilicon layer can protect the gate dielectric layer during the thermal process. The nitrogen atoms inside the gate dielectric layer do not lose out of the gate dielectric layer. Thus, the out-gassing phenomenon can be avoided, and a dielectric constant of the gate dielectric layer can not be changed, thereby increasing the reliability of the gate structure.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: December 24, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Liang Lin, Gin-Chen Huang, Ying-Wei Yen, Yu-Ren Wang
  • Publication number: 20130280878
    Abstract: A semiconductor process includes the following steps. A gate structure is formed on a substrate. An oxide layer is formed and covers the gate structure and the substrate. A plasma process without oxygen is performed to densify the oxide layer. A material layer is formed and covers the oxide layer. The material layer and the oxide layer are etched to form a dual spacer.
    Type: Application
    Filed: April 19, 2012
    Publication date: October 24, 2013
    Inventors: Tsai-Yu Wen, Tsuo-Wen Lu, Yu-Ren Wang
  • Patent number: 8551876
    Abstract: A manufacturing method for a semiconductor device having a metal gate includes providing a substrate having at least a first semiconductor device formed thereon, forming a first gate trench in the first semiconductor device, forming a first work function metal layer in the first gate trench, and performing a decoupled plasma oxidation to the first work function metal layer.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: October 8, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Yu-Ren Wang, Te-Lin Sun, Szu-Hao Lai, Po-Chun Chen, Chih-Hsun Lin, Che-Nan Tsai, Chun-Ling Lin, Chiu-Hsien Yeh
  • Patent number: 8536038
    Abstract: A manufacturing method for a metal gate includes providing a substrate having at least a semiconductor device with a conductivity type formed thereon, forming a gate trench in the semiconductor device, forming a work function metal layer having the conductivity type and an intrinsic work function corresponding to the conductivity type in the gate trench, and performing an ion implantation to adjust the intrinsic work function of the work function metal layer to a target work function.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: September 17, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Shao-Wei Wang, Yu-Ren Wang, Chien-Liang Lin, Wen-Yi Teng, Tsuo-Wen Lu, Chih-Chung Chen, Ying-Wei Yen, Yu-Min Lin, Chin-Cheng Chien, Jei-Ming Chen, Chun-Wei Hsu, Chia-Lung Chang, Yi-Ching Wu, Shu-Yen Chan
  • Patent number: 8501636
    Abstract: A method for fabricating silicon dioxide layer is disclosed. The method includes the following steps. Firstly, a semiconductor substrate is provided. Next, the semiconductor substrate is cleaned with a solution containing hydrogen peroxide to form a chemical oxide layer on the semiconductor substrate. Then, the chemical oxide layer is heated in no oxygen atmosphere, such that the chemical oxide layer forms a compact layer. Then, the semiconductor substrate is heated in oxygen atmosphere to form a silicon dioxide layer between the semiconductor substrate and the compact layer.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: August 6, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Shao-Wei Wang, Yu-Ren Wang, Chien-Liang Lin, Ying-Wei Yen, Kun-Yuan Lo, Chih-Wei Yang
  • Patent number: 8501634
    Abstract: A gate structure and a method for fabricating the same are described. A substrate is provided, and a gate dielectric layer is formed on the substrate. The formation of the gate dielectric layer includes depositing a silicon nitride layer on the substrate by simultaneously introducing a nitrogen-containing gas and a silicon-containing gas. A gate is formed on the gate dielectric layer, so as to form the gate structure.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: August 6, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Shao-Wei Wang, Gin-Chen Huang, Tsuo-Wen Lu, Chien-Liang Lin, Yu-Ren Wang
  • Publication number: 20130171837
    Abstract: A semiconductor process includes the following steps. A substrate having a recess is provided. A decoupled plasma nitridation process is performed to nitride the surface of the recess for forming a nitrogen containing liner on the surface of the recess. A nitrogen containing annealing process is then performed on the nitrogen containing liner.
    Type: Application
    Filed: January 2, 2012
    Publication date: July 4, 2013
    Inventors: Te-Lin Sun, Chien-Liang Lin, Yu-Ren Wang, Ying-Wei Yen
  • Patent number: 8445363
    Abstract: A method of fabricating an epitaxial layer includes providing a substrate. The substrate is etched to form at least a recess within the substrate. A surface treatment is performed on the recess to form a Si—OH containing surface. An in-situ epitaxial process is performed to form an epitaxial layer within the recess, wherein the epitaxial process is performed in a hydrogen-free atmosphere and at a temperature lower than 800° C.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: May 21, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Tsuo-Wen Lu, I-Ming Lai, Tsung-Yu Hou, Chien-Liang Lin, Wen-Yi Teng, Shao-Wei Wang, Yu-Ren Wang, Chin-Cheng Chien
  • Patent number: 8426277
    Abstract: A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate and an oxide layer is formed on the substrate without the fin-shaped structure forming thereon. A thermal treatment process is performed to form a melting layer on at least a part of the sidewall of the fin-shaped structure.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: April 23, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chien-Liang Lin, Shih-Hung Tsai, Chun-Hsien Lin, Te-Lin Sun, Shao-Wei Wang, Ying-Wei Yen, Yu-Ren Wang
  • Publication number: 20130093064
    Abstract: A semiconductor process includes the following steps. A substrate is provided. A dielectric layer having a high dielectric constant is formed on the substrate, wherein the steps of forming the dielectric layer include: (a) a metallic oxide layer is formed; (b) an annealing process is performed to the metallic oxide layer; and the steps (a) and (b) are performed repeatedly. Otherwise, the present invention further provides a semiconductor structure formed by said semiconductor process.
    Type: Application
    Filed: October 12, 2011
    Publication date: April 18, 2013
    Inventors: Chien-Liang Lin, Shao-Wei Wang, Yu-Ren Wang, Ying-Wei Yen
  • Publication number: 20130075874
    Abstract: A semiconductor structure includes a substrate, an oxide layer, a metallic oxynitride layer and a metallic oxide layer. The oxide layer is located on the substrate. The metallic oxynitride layer is located on the oxide layer. The metallic oxide layer is located on the metallic oxynitride layer. In addition, the present invention also provides a semiconductor process for forming the semiconductor structure.
    Type: Application
    Filed: September 26, 2011
    Publication date: March 28, 2013
    Inventors: Szu-Hao Lai, Yu-Ren Wang, Po-Chun Chen, Chih-Hsun Lin, Che-Nan Tsai, Chun-Ling Lin, Chiu-Hsien Yeh, Te-Lin Sun
  • Publication number: 20130078818
    Abstract: A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate and an oxide layer is formed on the substrate without the fin-shaped structure forming thereon. A thermal treatment process is performed to form a melting layer on at least a part of the sidewall of the fin-shaped structure.
    Type: Application
    Filed: September 23, 2011
    Publication date: March 28, 2013
    Inventors: Chien-Liang Lin, Shih-Hung Tsai, Chun-Hsien Lin, Te-Lin Sun, Shao-Wei Wang, Ying-Wei Yen, Yu-Ren Wang