Abstract: A method embodiment for patterning a semiconductor device includes patterning a dummy layer over a hard mask to form one or more dummy lines. A sidewall aligned spacer is conformably formed over the one or more dummy lines and the hard mask. A first reverse material layer is formed over the sidewall aligned spacer. A first photoresist is formed and patterned over the first reverse material layer. The first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched. The one or more dummy lines are removed, and the hard mask is patterned using the sidewall aligned spacer and the first reverse material layer as a mask. A material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer.

Abstract: A system and method for a semiconductor device are provided. An embodiment comprises a dielectric layer and masking layers over the dielectric layer. A thin spacer layer is used to form spacers alongside a pattern. A reverse image of the spacer pattern is formed and an enlargement process is used to slightly widen the pattern. The widened pattern is subsequently used to pattern an underlying layer. This process may be used to form a pattern in a dielectric layer, which openings may then be filled with a conductive material.

Abstract: A method includes forming a patterned hard mask layer, with a trench formed in the patterned hard mask layer, dispensing a Bulk Co-Polymer (BCP) coating in the trench, wherein the BCP coating comprises a mix of a first material and a second material different from the first material. The method further includes treating the BCP coating with a chemical to form a first plurality of strips of the first material and a second plurality of strips of the second material, with the first plurality of strips and the second plurality of strips allocated in an alternating layout. The second plurality of strips is selectively etched, and the first plurality of strips is left in the trench.

Abstract: One or more techniques or systems for forming a pattern during semiconductor fabrication are provided herein. In some embodiments, a photo resist (PR) region is patterned and a spacer region is formed above or surrounding at least a portion of the patterned PR region. Additionally, at least some of the spacer region and the patterned PR region are removed to form one or more spacers. Additionally, a block co-polymer (BCP) is filled between the spacers. In some embodiments, the BCP comprises a first polymer and a second polymer. In some embodiments, the second polymer is removed, thus forming a pattern comprising the first polymer and the spacers. In this manner, a method for forming a pattern during semiconductor fabrication is provided, such that a width of the spacer or the first polymer is controlled.

Abstract: The present invention provides intermediates for preparing abiraterone, and processes for preparing abiraterone and intermediates thereof. The intermediates include a compound of formula (IV): wherein R represents a hydroxy-protecting group.

Abstract: A semiconductor integrated circuit (IC) with a dielectric matrix is disclosed. The dielectric matrix is located between two conductive features. The matrix includes a first nano-scale dielectric block, a second nano-scale dielectric block, and a first nano-air-gap formed by a space between the first nano-scale dielectric block and the second nano-scale dielectric block. The matrix also includes third nano-scale dielectric block and a second nano-air-gap formed by a space between the second nano-scale dielectric block and the third nano-scale dielectric block. The nano-scale dielectric blocks share a first common width, and the nano-air-gaps share a second common width. An interconnect structure integrates the dielectric matrix with the conductive features.

Abstract: A method includes forming a patterned hard mask layer, with a trench formed in the patterned hard mask layer. A Bulk Co-Polymer (BCP) coating is dispensed in the trench, wherein the BCP coating includes Poly-Styrele (PS) and Poly Methyl Metha Crylate (PMMA). An annealing is performed on the BCP coating to form a plurality of PS strips and a plurality of PMMA strips allocated in an alternating layout. The PMMA strips are selectively etched, with the PS strips left in the trench.

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a precursor. A decomposable polymer layer (DPL) is deposited between the conductive features of the precursor. The DPL is annealed to form an ordered periodic pattern of different types of polymer nanostructures. One type of polymer nanostructure is decomposed by a first selectively to form a trench. The trench is filled by a dielectric layer to form a dielectric block. The remaining types of polymer nanostructures are decomposed by a second selectively etching to form nano-air-gaps.

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a precursor. A decomposable polymer layer (DPL) is deposited between the conductive features of the precursor. The DPL is annealed to form an ordered periodic pattern of different types of polymer nanostructures. One type of polymer nanostructure is decomposed by a first selectively to form a trench. The trench is filled by a dielectric layer to form a dielectric block. The remaining types of polymer nanostructures are decomposed by a second selectively etching to form nano-air-gaps.

Abstract: One or more techniques or systems for forming a pattern during semiconductor fabrication are provided herein. In some embodiments, a photo resist (PR) region is patterned and a spacer region is formed above or surrounding at least a portion of the patterned PR region. Additionally, at least some of the spacer region and the patterned PR region are removed to form one or more spacers. Additionally, a block co-polymer (BCP) is filled between the spacers. In some embodiments, the BCP comprises a first polymer and a second polymer. In some embodiments, the second polymer is removed, thus forming a pattern comprising the first polymer and the spacers. In this manner, a method for forming a pattern during semiconductor fabrication is provided, such that a width of the spacer or the first polymer is controlled.

Abstract: A method includes forming a patterned hard mask layer, with a trench formed in the patterned hard mask layer. A Bulk Co-Polymer (BCP) coating is dispensed in the trench, wherein the BCP coating includes Poly-Styrele (PS) and Poly Methyl Metha Crylate (PMMA). An annealing is performed on the BCP coating to form a plurality of PS strips and a plurality of PMMA strips allocated in an alternating layout. The PMMA strips are selectively etched, with the PS strips left in the trench.

Abstract: A electronic device and a power supplying method thereof are provided. The device includes a system unit, an internal power supplying unit and a power controller. The internal power supplying unit is coupled to the system unit, and supplies a system voltage to the system unit. The power controller is coupled to the system unit and the internal power supplying unit, and determines a source of the external voltage according to a voltage value of the external voltage. When the power controller determines that the source of the external voltage is a mobile power supply device, the power controller provides the external voltage to the system unit, and does not charge the internal power supplying unit with the external voltage. The voltage value of the external voltage provided by the mobile power supply device is higher than the voltage value of the system voltage.

Abstract: One or more techniques or systems for forming a pattern during semiconductor fabrication are provided herein. In some embodiments, a photo resist (PR) region is patterned and a spacer region is formed above or surrounding at least a portion of the patterned PR region. Additionally, at least some of the spacer region and the patterned PR region are removed to form one or more spacers. Additionally, a block co-polymer (BCP) is filled between the spacers. In some embodiments, the BCP comprises a first polymer and a second polymer. In some embodiments, the second polymer is removed, thus forming a pattern comprising the first polymer and the spacers. In this manner, a method for forming a pattern during semiconductor fabrication is provided, such that a width of the spacer or the first polymer is controlled.

Abstract: A safety syringe has a barrel, an inner needle hub, an outer needle hub, a plunger. The barrel has a distal end and a spout. The spout is formed axially on and protrudes the distal end. The plunger is mounted in the barrel and has a mounting protrusion being formed axially on the distal end of the plunger. The outer needle hub is mounted on the spout of the barrel and has a mounting chamber formed in the outer needle hub. The inner needle hub is mounted in the mounting chamber of the outer needle hub and has multiple resilient wing sections that are mounted in the mounting protrusion. Therefore, the inner needle hub may be withdrawn without touching the needle or outer needle hub and disposed of safely.

Abstract: A multi-element optical substrate preparation method includes the steps of: a) preparing a first element having a center hole and a core positioning device defining a first element center line; b) preparing a mold having a mold cavity and a cavity center line, and then placing the first element in the mold to keep a predetermined part of the first element in contact with the mold cavity; c) calibrating the position of the core positioning device of the first element in the mold cavity subject to the reference of the cavity center line of the mold; d) filling a transparent plastic material into the mold cavity of the mold for enabling the transparent plastic material to be molded on the first element and cured into a second element so that the first element and the second element form an optical substrate; and e) opening the mold and taking the optical substrate out of the mold.

Abstract: A safety syringe has a barrel, an inner needle hub, an outer needle hub, a plunger. The barrel has a distal end and a spout. The spout is formed axially on and protrudes the distal end. The plunger is mounted in the barrel and has a mounting protrusion being formed axially on the distal end of the plunger. The outer needle hub is mounted on the spout of the barrel and has a mounting chamber formed in the outer needle hub. The inner needle hub is mounted in the mounting chamber of the outer needle hub and has multiple resilient wing sections that are mounted in the mounting protrusion. Therefore, the inner needle hub may be withdrawn without touching the needle or outer needle hub and disposed of safely.

Abstract: A multi-band planar inverted-F antenna includes a radiating unit, a ground unit and a feeding unit. The radiating unit includes a common radiating element, a high-frequency (HF) radiating element and a low-frequency (LF) radiating element. A quasi U-shaped slot is defined between the HF radiating element and the LF radiating element. The ground unit is electrically connected to one side of the common radiating element. The feeding unit includes a strip electrically connected to one side of the HF radiating element. The ground unit includes a ground point and an inverted-L short-line connected to the ground point at one end thereof. The inverted-L short-line is also electrically connected to the common radiating element at another end thereof. A loop surface current induced by the inverted-L short-line can advantageously enhance bandwidth of the multi-band planar inverted-F antenna at frequencies of interest.

Abstract: The present invention provides for a crystalline polymorph of levonorgestrel and processes for making the same.

Abstract: A multi-band planar inverted-F antenna includes a radiating unit, a ground unit and a feeding unit. The radiating unit includes a common radiating element, a high-frequency (HF) radiating element and a low-frequency (LF) radiating element. A quasi U-shaped slot is defined between the HF radiating element and the LF radiating element. The ground unit is electrically connected to one side of the common radiating element. The feeding unit includes a strip electrically connected to one side of the HF radiating element. The ground unit includes a ground point and an inverted-L short-line connected to the ground point at one end thereof. The inverted-L short-line is also electrically connected to the common radiating element at another end thereof. A loop surface current induced by the inverted-L short-line can advantageously enhance bandwidth of the multi-band planar inverted-F antenna at frequencies of interest.

Abstract: A pen of the present invention includes a barrel having a space therein, a refill bore at a front end thereof and at least an opening at a circumference thereof. A refill, which is received in the barrel, has a tip extruded out of the barrel through the refill bore. A tube is received in a gap between the barrel and the refill for reciprocation. An elastic member is received in the barrel to urge the tube outwards so that the tip of the refill is received in the tube in a normal condition. A tube driving mechanism is received in the opening of the barrel and connected to the tube to move the tube inward the barrel for exposing the tip of the refill and compressing the elastic when the tube driving mechanism is pressed. The elastic member returns the tube when the tube driving mechanism is released.