Patents by Inventor Yu-Sheng Chen

Yu-Sheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250120138
    Abstract: In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. The first semiconductor layers, the second semiconductor layer and an upper portion of the fin structure at a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, are etched. A dielectric layer is formed over the etched upper portion of the fin structure. A source/drain epitaxial layer is formed. The source/drain epitaxial layer is connected to ends of the second semiconductor wires, and a bottom of the source/drain epitaxial layer is separated from the fin structure by the dielectric layer.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Lin YANG, Chao-Ching CHENG, Tzu-Chiang CHEN, I-Sheng CHEN
  • Patent number: 12272022
    Abstract: The quality of a frame sequence is enhanced by a booster engine collaborating with a first stage circuit. The first stage circuit adjusts the quality degradation of the frame sequence when a condition in constrained resources is detected. The quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine receives the frame sequence from the first stage circuit, and generates an enhanced frame sequence based on the frame sequence for transmission to a second stage circuit.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: April 8, 2025
    Assignee: MediaTek Inc.
    Inventors: Yao-Sheng Wang, Pei-Kuei Tsung, Chiung-Fu Chen, Wai Mun Wong, Chao-Min Chang, Yu-Sheng Lin, Chiani Lu, Chih-Cheng Chen
  • Publication number: 20250111123
    Abstract: A method for checking standard cell spacing in a design includes providing a first standard cell. A cell environment of the first standard cell is determined and a first feasible distance between a first boundary of the standard cell and a boundary of a first adjacent cell based on the cell environment is determined. A second feasible distance between a second boundary of the standard cell and a boundary of a second adjacent cell based on the cell environment is determined. A feasible spacing between the first standard cell and a second standard cell is provided, and the feasible spacing is evaluated based on the first feasible distance, the second feasible distance and a cell pitch of the first standard cell. An integrated circuit is fabricated that includes the first standard cell in response on the evaluating.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 3, 2025
    Inventors: Hung-Chih Ou, Yu-Sheng Lu, Wen-Hao Chen
  • Publication number: 20250107207
    Abstract: A semiconductor structure includes a semiconductor substrate; fin active regions protruded above the semiconductor substrate; and a gate stack disposed on the fin active regions; wherein the gate stack includes a high-k dielectric material layer, and various metal layers disposed on the high-k dielectric material layer. The gate stack has an uneven profile in a sectional view with a first dimension D1 at a top surface, a second dimension D2 at a bottom surface, and a third dimension D3 at a location between the top surface and the bottom surface, and wherein each of D1 and D2 is greater than D3.
    Type: Application
    Filed: December 9, 2024
    Publication date: March 27, 2025
    Inventors: Chi-Sheng LAI, Wei-Chung SUN, Yu-Bey WU, Yuan-Ching PENG, Yu-Shan LU, Li-Ting CHEN, Shih-Yao LIN, Yu-Fan PENG, Kuei-Yu KAO, Chih-Han LIN, Jing Yi YAN, Pei-Yi LIU
  • Publication number: 20250100923
    Abstract: A glass ceramic is provided to address the challenge that bioceramics known to be used for bone defect repair often lack good hardness, proper degradability, low post-implantation stimulation to surrounding tissues and promotion of bone defect repair in combination. The glass ceramic comprises a major crystallized phase, which is either diopside or wollastonite; and a minor crystallized phase, which comprises any one or more selected from the group consisting of diopside, wollastonite, lithium disilicate, silicon dioxide, lithium metasilicate and Li2Ca2Si5O13. In the glass ceramic, the molar ratio of elemental calcium, elemental lithium and elemental silicon is 1:x:2, in which x is from 0.05 to 1. However, when the major crystallized phase is diopside, the minor crystallized phase does not comprise diopside; and when the major crystallized phase is wollastonite, the minor crystallized phase does not comprise wollastonite. The present invention also comprises a method for manufacturing the glass ceramic.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 27, 2025
    Inventors: YU-SHENG TSENG, WEN-FAN CHEN
  • Publication number: 20250092560
    Abstract: A method of growing a single crystal ingot includes growing a single crystal silicon ingot from a silicon melt in a crucible within an inner chamber, adding a volatile dopant into a feed tube, positioning the feed tube within an inner chamber at a first height relative to a surface of the melt, adjusting the feed tube within the inner chamber to a second height at a speed rate, and heating the volatile dopant to form a gaseous dopant as the feed tube is moved from the first height to the second height at the speed rate. Each of the second height and the speed rate are selected to control a vaporization rate of the volatile dopant. The method also includes introducing dopant species into the melt while growing the ingot by contacting the surface of the melt with the gaseous dopant.
    Type: Application
    Filed: November 7, 2024
    Publication date: March 20, 2025
    Inventors: Chieh HU, Hsien-Ta TSENG, Chun-Sheng WU, William Lynn LUTER, Liang-Chin CHEN, Sumeet BHAGAVAT, Carissima Marie HUDSON, Yu-Chiao Wu
  • Publication number: 20250091633
    Abstract: A pressure sensing device, comprising: a frame work; a capacitive pressure sensor layer, surrounding the frame work; a capacitive touch sensor layer; and a flexible material layer, located between the pressure sensor layer and the touch sensor layer and surrounding the capacitive pressure sensor layer. The capacitive touch sensor layer is above the flexible material layer when the capacitive pressure sensor layer is below the flexible material layer. The capacitive touch sensor layer has a first driving electrode and a first sensing electrode. The capacitive pressure sensor layer has a second driving electrode and a second sensing electrode. A 3D gesture control system and a vehicle control system applying the pressure sensing device are also disclosed. Via the pressure sensing device, the 3D gesture control system and the vehicle control system can generate control commands according to a touch or a pressure provided by a user.
    Type: Application
    Filed: December 6, 2024
    Publication date: March 20, 2025
    Applicant: PixArt Imaging Inc.
    Inventors: Chin-Hua Hu, Yu-Han Chen, Yu-Sheng Lin
  • Publication number: 20250095730
    Abstract: A memory circuit and a method for reading a memory circuit are provided. The memory circuit includes reference memory cells and operation memory cells. The method includes reading a selected reference memory cell at a first time to get a first voltage; reading the selected reference memory cell at a second time after the first time to get a second voltage; adjusting a read voltage of the memory cell to be an adjusted read voltage of the memory cell according to the voltage difference between the first voltage and the second voltage; applying the adjusted read voltage on a selected operation memory cell corresponding to the selected reference memory cell; and applying the adjusted read voltage on other selected operation memory cells in a same row of the memory array corresponding to the selected reference memory cell.
    Type: Application
    Filed: November 27, 2024
    Publication date: March 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hengyuan Lee, Yu-Sheng Chen, Xinyu BAO
  • Publication number: 20250087633
    Abstract: A device includes a package component including an interconnect structure on a first side of a substrate; metal pads on the interconnect structure; a semiconductor die connected to a second side of the substrate; a dielectric material surrounding the package component; a passivation layer extending over the package component and over the dielectric material; a first buffer layer over the passivation layer, wherein the first buffer layer extends over the package component and over the dielectric material, wherein a width of the first buffer layer is greater than a width of the package component and is less than a width of the passivation layer; and conductive connectors penetrating the passivation layer and the first buffer layer to physically contact the metal pads.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 13, 2025
    Inventors: Yu-Chia Lai, Ting Hao Kuo, Chen-Shien Chen, Chih-Sheng Li
  • Patent number: 12249369
    Abstract: A control method to operate a memory device, a control method to operate a memory system and a control system are provided. The control method includes providing a first voltage to a memory device for accessing a memory element of the memory device; obtaining an aging information of the memory device; and providing a second voltage to the memory device according to the aging information, wherein the first voltage and the second voltage are reverse biased voltages.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: March 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hengyuan Lee, Cheng-Hsien Wu, Yu-Sheng Chen, Chien-Min Lee, Xinyu Bao
  • Patent number: 12242307
    Abstract: An electronic device with movable foot pad, including a body and a foot pad module, is provided. The body has a bottom surface. The foot pad module includes a first foot pad, at least one second foot pad, and at least one rotating shaft connecting the first and second foot pads. The second foot pad is rotated relative to the first foot pad by the rotating shaft to switch the foot pad module between first and second states. An axial direction of the rotating shaft is inclined relative to the bottom surface. In the first state, the body is supported on the platform by the first and second foot pads. In the second state, the second foot pad is rotated 180 degrees relative to the first foot pad in the axial direction and protrudes from the first foot pad to support the body on the platform by the second foot pad.
    Type: Grant
    Filed: May 18, 2023
    Date of Patent: March 4, 2025
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: I-Hsuan Tsai, Chia-Wei Chen, Yu-Sheng Lai, Tzu-Chien Lai
  • Patent number: 12235210
    Abstract: A light emitting apparatus has light emitting units. The light emitting units can be respectively provided with current densities, so that the light emitted by each of the light emitting unit has a light intensity, wherein the current densities are different from each other, or partial of the current densities are different from each other. A number of the light emitting units can be larger than or equal to four, all of the four lighting frequencies of the four light emitting units are different from each other, or partial of the four lighting frequencies of the four light emitting units are identical to each other, and the light emitting apparatus and the object under test rotate relative to each other. A light emitting method, a spectrum detection method and a lighting correction method are also illustrated for increasing SNR, correcting the light intensity or the spectrum signal.
    Type: Grant
    Filed: March 14, 2024
    Date of Patent: February 25, 2025
    Assignee: MEGA CRYSTAL BIOTECHNOLOGY SINGAPORE PTE. LTD
    Inventors: Yi-Sheng Ting, Yu-Tsung Chen
  • Patent number: 12239031
    Abstract: A memory cell includes a dielectric structure, a storage element structure, and a top electrode. The storage element structure is disposed in the dielectric structure, and the storage element structure includes a first portion and a second portion. The first portion includes a first side and a second side opposite to the first side, where a width of the first side is less than a width of the second side. The second portion is connected to the second side of the first portion, where a width of the second portion is greater than the width of the first side. The top electrode is disposed on the storage element structure, where the second portion is disposed between the first portion and the top electrode.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: February 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chao Lin, Yu-Sheng Chen, Da-Ching Chiou
  • Patent number: 12231844
    Abstract: A microphone system of the invention is applicable to an electronic device comprising an adjustable mechanism that causes a change in geometry of a microphone array. The microphone system comprises the microphone array, a sensor and a beamformer. The microphone array comprises multiple microphones that detect sound and generate multiple audio signals. The sensor detects a mechanism variation of the electronic device to generate a sensing output. The beamformer is configured to perform a set of operations comprising: performing a spatial filtering operation over the multiple audio signals using a trained model based on the sensing output, one or more first sound sources in one or more desired directions and one or more second sound sources in one or more undesired directions to generate a beamformed output signal originated from the one or more first sound sources.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: February 18, 2025
    Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.
    Inventors: Hua-Jun Hong, Chih-Sheng Chen, Hsueh-Ying Lai, Yu-Pao Tsai, Tsung-Liang Chen
  • Patent number: 12232331
    Abstract: A memory device includes a first electrode, a selector layer and a plurality of first work function layers. The first work function layers are disposed between the first electrode and the selector layer, and a work function of the first work function layer increases as the first work function layer becomes closer to the selector layer.
    Type: Grant
    Filed: October 3, 2023
    Date of Patent: February 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li Chiang, Jung-Piao Chiu, Tzu-Chiang Chen, Yu-Sheng Chen, Xinyu Bao
  • Publication number: 20250054522
    Abstract: A semiconductor device includes logic circuitry including a transistor disposed over a substrate, multiple layers each including metal wiring layers and an interlayer dielectric layer, respectively, disposed over the logic circuitry, and memory arrays. The multiple layers of metal wiring include, in order closer to the substrate, first, second, third and fourth layers, and the memory arrays include lower multiple layers disposed in the third layer.
    Type: Application
    Filed: October 29, 2024
    Publication date: February 13, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li CHIANG, Yu-Sheng CHEN, Chao-Ching CHENG, Tzu-Chiang CHEN
  • Publication number: 20250050485
    Abstract: A method for an electric nail gun to drive the flywheel to transmit nailing energy, including boosting a start voltage of a battery so as to excite an electromagnet to work and then drive the flywheel loaded with nailing energy in a frictional manner to drive a nailing rod to hit the nail. Specifically, the start voltage is boosted by a voltage boost circuit and stored, and the start voltage can release electric charge to constantly excite the electromagnet to work until completion of the nailing action. Based on the present invention, the nailing quality of the electric nail gun can be enhanced.
    Type: Application
    Filed: July 29, 2024
    Publication date: February 13, 2025
    Inventors: CHIA-SHENG LIANG, I-TSUNG WU, YU-CHE LIN, WEN-CHIN CHEN
  • Patent number: 12221718
    Abstract: A method of growing a single crystal ingot includes growing a single crystal silicon ingot from a silicon melt in a crucible within an inner chamber, adding a volatile dopant into a feed tube, positioning the feed tube within an inner chamber at a first height relative to a surface of the melt, adjusting the feed tube within the inner chamber to a second height at a speed rate, and heating the volatile dopant to form a gaseous dopant as the feed tube is moved from the first height to the second height at the speed rate. Each of the second height and the speed rate are selected to control a vaporization rate of the volatile dopant. The method also includes introducing dopant species into the melt while growing the ingot by contacting the surface of the melt with the gaseous dopant.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: February 11, 2025
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Chieh Hu, Hsien-Ta Tseng, Chun-Sheng Wu, William Lynn Luter, Liang-Chin Chen, Sumeet Bhagavat, Carissima Marie Hudson, Yu-Chiao Wu
  • Patent number: D1063950
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 25, 2025
    Assignee: VIVOTEK INC.
    Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen, Shu-Jung Hsu, Tsao-Wei Hung
  • Patent number: D1067237
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: March 18, 2025
    Assignee: VIVOTEK INC.
    Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen