Abstract: Steviol glycoside blends having aqueous solubilities suitable for beverage syrup concentrations are provided herein. Methods of preparing concentrates from said blends are also provided, as are beverage syrups and beverages. Methods of improving the solubility and reducing foaming of stevia blends are also provided.

Abstract: An isocyanate electrolyte solution additive containing a sulfamide structural group has a structure of formula I: where R1 and R2 are identical or different, R1 and R2 are each independently selected from methyl, ethyl, butyl, methoxy, methanesulfonyl, ethanesulfonyl, fluorosulfonyl, trifluoromethanesulfonyl, perfluoroethylsulfonyl, benzenesulfonyl, alkyl-containing benzenesulfonyl, cyano/fluorobenzenesulfonyl and alkoxy-containing benzenesulfonyl, and R1 and R2 can be linked to form one of five-membered ring or six-membered ring.

Abstract: A pixel circuit, a driving method therefor and a display apparatus are provided. The pixel circuit includes a driving sub-circuit, a write sub-circuit, a compensation sub-circuit, a reset sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a leak-proof sub-circuit, a storage sub-circuit and a light-emitting element. The reset sub-circuit is configured to reset a fourth node under control of a signal of a light-emitting control signal terminal and reset a fifth node under control of a signal of a reset control signal terminal. The compensation sub-circuit is configured to compensate a threshold voltage of the driving sub-circuit to the fifth node under the control of a signal of a first scanning signal terminal. The leak-proof sub-circuit is configured to write a signal of the fifth node into a first node under control of a signal of a second scanning signal terminal.

Abstract: Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a gate electrode, a first electrode, a first via and a second via. The substrate has a first surface and a second surface. The first nitride semiconductor layer is disposed on the first surface of the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap exceeding that of the first nitride semiconductor layer. The gate electrode and the first electrode are disposed on the second nitride semiconductor layer. The first via extends from the second surface and is electrically connected to the first electrode. The second via extends from the second surface. The depth of the first via is different from the depth of the second via.

Abstract: A display substrate has a display area and a peripheral area surrounding the display area; the display area has a functional area and a non-functional area; the display substrate includes a base substrate, a plurality of first signal lines, a first interlayer insulating layer, a plurality of second signal lines, a conductive mesh and an auxiliary functional structure; the conductive mesh includes a plurality of first conductive structures and a plurality of second conductive structures which are arranged crosswise and electrically connected to each other; the auxiliary functional structure includes a plurality of first conductive wires and a plurality of second conductive wires which are arranged crosswise; the first conductive wire is at least a part of the first conductive structure, and each of some first conductive structures includes two first conductive wires; the second conductive wire is at least a part of the second conductive structure.

Abstract: Provided are an information determination method and device, an information adjustment method, a threshold usage method, a terminal, and a storage medium. The information determination method includes: determining a second threshold of a target subcarrier spacing according to the number of cells that meet a first set condition, the total number of downlink cells, the number of supported cells reported by a terminal, and a first threshold.

Abstract: A package includes a first package and a second package over and bonded to the first package. The first package includes a first device die, and a first encapsulant encapsulating the first device die therein. The second package includes an Independent Passive Device (IPD) die, and a second encapsulant encapsulating the IPD die therein. The package further includes a power module over and bonded to the second package.

Abstract: A semiconductor device and method that comprise a first dielectric layer over a encapsulant that encapsulates a via and a semiconductor die is provided. A redistribution layer is over the first dielectric layer, and a second dielectric layer is over the redistribution layer, and the second dielectric layer comprises a low-temperature polyimide material.

Abstract: An advantageous morphic form of Compound 1 which is also known as CFT7455 and is (S)-3-(6-(4-(morpholinomethyl)benzyl)-2-oxobenzo[cd]indol-1(2H)-yl)piperidine-2,6-dione and methods to prepare Compound 1 for therapeutic applications are provided. This invention also provides new dosage regimens for administering Compound 1.

Abstract: A feeding apparatus and a substrate processing device are provided. The feeding apparatus includes: a material conveying channel including a feeding inlet and a discharging outlet, where the feeding inlet is closer to a first end of the material conveying channel than the discharging outlet, and the discharging outlet is closer to a second end of the material conveying channel than the feeding inlet, the first end and the second end being two opposite ends of the material conveying channel; and a vibration generator disposed at the material conveying channel and configured to generate mechanical vibration to induce the mechanical vibration of the feeding apparatus, and a material entering the material conveying channel through the feeding inlet is conveyed to the discharging outlet under the action of the mechanical vibration and falls out through the discharging outlet under the action of gravity.

Abstract: A method for mass rearing of Telenomus remus includes the following steps: (1) establishing a Telenomus remus population of a Corcyra cephalonica strain; (2) collecting Corcyra cephalonica eggs laid by Corcyra cephalonica on the day, and fixing the Corcyra cephalonica eggs on a sticker; (3) inoculating female Telenomus remus of the Corcyra cephalonica strain in the step (1) into the Corcyra cephalonica eggs in the step (2); and (4) after 24 h to 48 h of a parasitism, taking parasitic Corcyra cephalonica eggs out, and feeding the parasitic Corcyra cephalonica eggs under the following conditions: a temperature: 26±1° C., a relative humidity: 65±5%, and a photoperiod: L: D=14:10, where long axes of the Corcyra cephalonica eggs in the step (2) have a length of 0.48 mm to 0.60 mm. The method of the present disclosure has great significance for the long-term control of pests of the Noctuidae family.

Abstract: A parameter adjustment method of a display module includes: setting an initial value of a light-emitting delay time and specified gray levels; based on the initial value of the light-emitting delay time, adjusting the light-emitting delay time stepwise until a value of an adjusted light-emitting delay time exceeds a preset range of the light-emitting delay time, so that values of the light-emitting delay time within the preset range of the light-emitting delay time are obtained; obtaining flicker values of the display module at the specified gray levels for each value of the light-emitting delay time; and determining a preferred value of the light-emitting delay time from the values of the light-emitting delay time according to flicker values corresponding to the values of the light-emitting delay time.

Abstract: A process for preparing a zeolite having a CHA-type framework structure, the framework structure comprising X2O3 and YO2, wherein X is a trivalent element and Y is a tetravalent element, which includes (1) preparing a synthesis mixture comprising (A) a source for X2O3, (B) a source for YO2, and (C) a source for piperidinium cations represented by formula (I) wherein R1a is selected from C1-C8 alkyl and C3-C10 cycloalkyl, R1b is selected from C2-C8 alkyl and C3-C10 cycloalkyl, and R2, R3, R4, R5 and R6 independently from each other, are H, hydroxyl or C1-C8 alkyl; and (2) subjecting the synthesis mixture to crystallization conditions to form a CHA zeolite.

Abstract: New data class generation is provided. A dimension score is generated for each respective dimension of a plurality of predefined dimensions as relating to column attributes of a data asset while performing a static reference data analysis of the data asset. The dimension score of each respective dimension is added together to obtain a total dimension score for the data asset. It is determined whether the total dimension score of the data asset is greater than a predefined minimum dimension score threshold level. The data asset is identified as new static reference data in response to determining that the total dimension score of the data asset is greater than the predefined minimum dimension score threshold level. A new data class is generated based on the new static reference data.

Abstract: A fingerprint sensor package and method are provided. Embodiments include a sensor and a sensor surface material encapsulated within the fingerprint sensor package. An array of electrodes of the sensor are electrically connected using through vias that are located either in the sensor, in connection blocks separated from the sensor, or through connection blocks, or else connected through other connections such as wire bonds. A high voltage die is attached in order to increase the sensitivity of the fingerprint sensor.

Abstract: The present invention belongs to the technical field related to additive manufacturing, and provides a multi-field composite-based additive manufacturing device and method. The device comprises a powder delivery adjustment module, a sound field control module, a microwave field/thermal field control module and a microprocessor.

Abstract: A method for developing an epoxy resin impregnated glass fiber Direct Current (DC) bushing, comprising: according to length parameters of each layer of capacitive screen or resistive screen designed depending on insulation requirements, selecting bushing design parameters, determining a winding machine program according to the bushing design parameters, and winding a core body according to the winding machine program, wherein during the core body winding process, the core body begins to be initially cured; after the core body is wound, curing the core body by an oven according to a preset oven temperature and duration; machining the cured core body according to a preset core body design drawing; after the inner wall of a flange is polished and cleaned and is heated and pretreated by the oven, injecting glue at the position of a glue injection hole of the flange for gluing the core body and the flange; sequentially assembling a collector ring, a hollow composite insulator, and a voltage-equalizing sealing cove

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: A semiconductor structure includes a die, a molding surrounding the die, and a polymer over the die and the molding. The die has a top surface. The molding has a top surface. The polymer has a first bottom surface contact the die and a second surface contacting the molding. The first bottom surface is at a level substantially same as the second bottom surface.