Patents by Inventor Yu Su

Yu Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230378323
    Abstract: A semiconductor device includes a doped region of a first conductivity type in a substrate, a source/drain region of the first conductivity in the doped region, and a gate structure overlapping a portion of the doped region. The semiconductor device further comprises a multi-layer spacer over a first sidewall of the gate structure. The multi-layer spacer comprises a first spacer layer, a second spacer layer over the first spacer layer, and a third spacer layer over the second spacer layer. The first spacer layer and the second spacer layer are in contact with the first sidewall of the gate structure.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITED
    Inventors: Feng HAN, Lei SHI, Hung-Chih TSAI, Liang-Yu SU, Hang FAN
  • Publication number: 20230361208
    Abstract: In some embodiments, the present disclosure relates to a method of forming a high electron mobility transistor (HEMT) device. The method includes forming a passivation layer over a substrate. A source contact and a drain contact are formed within the passivation layer. A part of the passivation layer is removed to form a cavity. The cavity has a lower portion formed by a first sidewall and a second sidewall of the passivation layer and an upper portion formed by the first sidewall of the passivation layer and a sidewall of the source contact. A gate structure is formed within the passivation layer between the drain contact and the cavity. A cap structure is formed within the cavity.
    Type: Application
    Filed: July 7, 2023
    Publication date: November 9, 2023
    Inventors: Ming-Cheng Lin, Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang
  • Patent number: 11811446
    Abstract: A bias circuit for a low noise amplifier of a front end interface of a radio frequency communication device including a bias generator providing a bias voltage on a bias node for the low noise amplifier, a first resistive device coupled between the bias node and an input of the low noise amplifier, a first switch coupled in parallel with the first resistive device, and mode control circuitry receiving a mode signal indicative of a mode change, in which the mode control circuitry, in response to a mode change, momentarily activates the first switch to bypass the first resistive device and momentarily increases current capacity of the bias generator. The mode control circuitry may also momentarily activate a second switch to bypass a second resistive device of the bias circuit. The mode control circuitry may increase a sink current of the bias generator in response to the mode change.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: November 7, 2023
    Assignee: Silicon Laboratories Inc.
    Inventors: Luigi Panseri, Yu Su, Mustafa H. Koroglu
  • Patent number: 11804026
    Abstract: A device for processing data sequences by means of a convolutional neural network is configured to carry out the following steps: receiving an input sequence comprising a plurality of data items captured over time using a sensor, each of said data items comprising a multi-dimensional representation of a scene, generating an output sequence representing the input sequence processed item-wise by the convolutional neural network, wherein generating the output sequence comprises: generating a grid-generation sequence based on a combination of the input sequence and an intermediate grid-generation sequence representing a past portion of the output sequence or the grid-generation sequence, generating a sampling grid on the basis of the grid-generation sequence, generating an intermediate output sequence by sampling from the past portion of the output sequence according to the sampling grid, and generating the output sequence based on a weighted combination of the intermediate output sequence and the input sequence.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: October 31, 2023
    Assignee: Aptiv Technologies Limited
    Inventors: Weimeng Zhu, Yu Su, Christian Nunn
  • Publication number: 20230324699
    Abstract: A head-mounted display device assembly and an external adjustment module are provided. The head-mounted display device assembly includes a head-mounted display device and the external adjustment module. The head-mounted display device has a first lens and a second lens corresponding to both eyes, and also has a driven mechanism. The first lens and the second lens are respectively coupled to the driven mechanism. The external adjustment module is used for assembling and electrically connecting to the head-mounted display device, and includes a driving element and a transmission element. In a coupling state, the transmission element is coupled to the driving element and the driven mechanism, and the driving element drives the driven mechanism via the transmission element to adjust a distance between the first lens and the second lens. In a separation state, at least one of the driving element and the driven mechanism is separated from the transmission element.
    Type: Application
    Filed: October 11, 2022
    Publication date: October 12, 2023
    Applicant: HTC Corporation
    Inventors: Chun-Wei Chang, Ying-Chieh Huang, Pei-Yu Su, Yen-Te Chiang, Chun-Kai Yang, Wei-Ting Hsiao, Yien-Chun Kuo
  • Patent number: 11777341
    Abstract: A wireless power receiver for wirelessly receiving power from a wireless power transmitter comprises: a power reception circuit receiving electromagnetic waves emitted from the wireless power receiver so as to output power having an alternating current waveform; a rectifier for rectifying the power, having an AC waveform, outputted from the power reception circuit into power having a direct current waveform; a DC/DC converter for converting, into a voltage of a preset level, a voltage of the power having a direct current waveform, the power being rectified by the rectifier; a charger for charging a battery by using the power having a DC waveform, converted from the DC/DC converter; an alternating current ground connected to the power reception circuit and/or the rectifier so as to receive at least a portion of the power having an alternating current waveform; and a direct current ground connected to the DC/DC converter and/or the charger so as to receive at least a portion of the power having a direct current
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: October 3, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chong-Min Lee, Yu-Su Kim, Hyung-Koo Chung, Hyo-Seok Han
  • Patent number: 11778487
    Abstract: A scene-based beam generation method for ground-to-air coverage based on convex polygon subdivision is provided and includes: obtaining a collection of base station positions by using a method of universal transverse mercator projection; constructing a three-dimensional (3D) low altitude signal coverage area; performing convex polygon subdivision on the area to be covered; and generating a beam configuration of each base station. The method realizes generation of beam configurations of base stations in the 3D low altitude signal coverage area, overcomes a problem that the existing 17 kind of scene-based beams cannot realize the coverage of 3D area, overcomes a problem of mismatch between network state information and beam configuration caused by dynamic adjustment of beam configurations. The beam configurations generated by the method does not need to obtain the number of users in real time to adjust the beam, and has a good coverage ability.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: October 3, 2023
    Assignee: XIDIAN UNIVERSITY
    Inventors: Junyu Liu, Min Sheng, Songtao Lei, Ziye Zhang, Yan Shi, Yu Su, Jiandong Li
  • Patent number: 11776463
    Abstract: A display device includes a light emitting unit, first and second capacitors, and first and second switches. The light emitting unit emits light according to a voltage level of a first node. A first terminal of the first capacitor is coupled to the first node, and a second terminal of the first capacitor is coupled to a second node. A first terminal of the second capacitor is coupled to the second node, and a second terminal of the first capacitor is coupled to the light emitting unit. A first terminal of the first switch is coupled to the first node, and a second terminal of the first switch is coupled to the light emitting unit. The second switch is configured to be turned on before the first switch is turned on, and a first terminal of the second switch is coupled to the first node.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: October 3, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Shu-Hao Huang, Hsien-Chun Wang, Sung-Yu Su
  • Publication number: 20230293514
    Abstract: Disclosed herein is an injectable depot formulation and use thereof for treating a mental disorder. The injectable depot formulation comprises cariprazine free base particles and a pharmaceutically acceptable carrier. The cariprazine free base particles have a median particle size by volume (Dv50) ranging from 0.5 ?m to 100 ?m.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 21, 2023
    Inventors: I-Hsiang LIU, Kuei-Hua CHANG, Hua-Jing JHAN, Tse-Hsien CHEN, Chia-Yu SU, Chi-Heng JIAN, Chun-Wei HSU
  • Publication number: 20230299576
    Abstract: A device is disclosed herein. The device includes a bias generator, an ESD driver, and a logic circuit. The bias generator includes a first transistor. The ESD driver includes a second transistor and a third transistor coupled to each other in series. The logic circuit is configured to generate a logic control signal. When the first transistor is turned on by a detection signal, the first transistor is turned off.
    Type: Application
    Filed: May 24, 2023
    Publication date: September 21, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Lin PENG, Yu-Ti SU, Chia-Wei HSU, Ming-Fu TSAI, Shu-Yu SU, Li-Wei CHU, Jam-Wem LEE, Chia-Jung CHANG, Hsiang-Hui CHENG
  • Patent number: 11763776
    Abstract: A display device includes a display panel and a processor. The processor is coupled to the display panel. The processor is configured to generate first output data according to first input data and a first compensation value, generate a stress reduction value and a compensation reduction value according to the first input data, calculate a final stress value according to the first output data, at least one first operating factor, and the stress reduction value, calculate a second compensation value according to the final stress value and the compensation reduction value, and output second output data according to second input data, the second compensation value, and at least one second operating factor. The display panel receives the second output data to display according to the second output data.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: September 19, 2023
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Shang-Yu Su, Feng-Ting Pai
  • Patent number: 11764288
    Abstract: A method includes forming a body region of a first conductivity type and a doped region of a second conductivity type in a semiconductor substrate; forming a gate structure the substrate, and first gate spacers respectively on first and second sides of the gate structure; depositing a second spacer layer and a third spacer layer over the gate structure; patterning the third spacer layer into third gate spacers respectively on the first and second sides of the gate structure; removing a first one of the third gate spacers from the first side of the gate structure, while leaving a second one of the third gate spacers on the second side of the gate structure; and patterning the second spacer layer into a second gate spacer by using the second one of the third gate spacers as an etching mask.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: September 19, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC CHINA COMPANY LIMITED
    Inventors: Feng Han, Lei Shi, Hung-Chih Tsai, Liang-Yu Su, Hang Fan
  • Patent number: 11749673
    Abstract: Systems and methods for protecting a device from an electrostatic discharge (ESD) event are provided. A resistor-capacitor (RC) trigger circuit and a driver circuit are provided. The RC trigger circuit is configured to provide an ESD protection signal to the driver circuit. A discharge circuit includes a first metal oxide semiconductor (MOS) transistor and a second MOS transistor connected in series between a first voltage potential and a second voltage potential. The driver circuit provides one or more signals for turning the first and second MOS transistors on and off.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: September 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shu-Yu Su, Jam-Wem Lee, Wun-Jie Lin
  • Patent number: 11749163
    Abstract: The invention provides a color calibration device, a color calibration method and a calibration table generation method. The color calibration device includes a calibration table circuit, a ratio circuit and an image processing circuit. The calibration table circuit provides a selected calibration table including a plurality of zone calibration parameters. Each of the zone calibration parameters corresponds to a corresponding zone among a plurality of zones of a display panel. The ratio circuit calculates a subpixel calibration parameter corresponding to a current subpixel according to at least one of the zone calibration parameters in the selected calibration table. The image processing circuit calibrates original subpixel data of the current subpixel according to the subpixel calibration parameter to generate calibrated subpixel data of the current subpixel.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: September 5, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventors: Wan-Nung Tsung, Jun-Yu Yang, Shang-Yu Su, Feng-Ting Pai
  • Patent number: 11742419
    Abstract: In some embodiments, the present disclosure relates to a semiconductor device. The semiconductor device includes a channel layer disposed over a base substrate, and an active layer disposed on the channel layer. A source contact and a drain contact are over the active layer and are laterally spaced apart from one another along a first direction. A gate electrode is arranged on the active layer between the source contact and the drain contact. A passivation layer is arranged on the active layer and laterally surrounds the source contact, the drain contact, and the gate electrode. A conductive structure is electrically coupled to the source contact and is disposed laterally between the gate electrode and the source contact. The conductive structure extends along an upper surface and a sidewall of the passivation layer.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: August 29, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Cheng Lin, Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang
  • Patent number: 11729921
    Abstract: A disclosed electronic device includes a housing having an opening, a roll mounted in the housing, a flexible display wound on the roll and being extendable and retractable through the opening based on a rotation direction of the roll, and a roll guide configured to guide the roll to move in a direction capable of constantly maintaining a proceeding direction of the flexible display toward the opening in the housing, based on a variation in a wound length of the flexible display on the roll.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: August 15, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-sun Lee, Yu-su Kim, Toshikazu Takayanagi
  • Patent number: 11710962
    Abstract: A device is disclosed herein. The device includes a bias generator, an ESD driver, and a logic circuit. The bias generator includes a first transistor. The ESD driver includes a second transistor and a third transistor coupled to each other in series. The logic circuit is configured to generate a logic control signal. A first terminal of the first transistor is configured to receive a reference voltage signal, a control terminal of the first transistor is configured to receive a detection signal in response to an ESD event being detected, a second terminal of the first transistor is coupled to a control terminal of the third transistor, and a control terminal of the second transistor is configured to receive the logic control signal.
    Type: Grant
    Filed: May 29, 2022
    Date of Patent: July 25, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Lin Peng, Yu-Ti Su, Chia-Wei Hsu, Ming-Fu Tsai, Shu-Yu Su, Li-Wei Chu, Jam-Wem Lee, Chia-Jung Chang, Hsiang-Hui Cheng
  • Publication number: 20230222961
    Abstract: A driving circuit includes a first transistor, a capacitor, a second transistor, and a driving transistor. The first transistor is configured to provide a data signal according to a first scan signal. The capacitor is coupled to the first transistor, and the capacitor includes a first terminal and a second terminal. The second transistor is coupled to the first transistor, and the second transistor is configured to provide a start signal according to the data signal. The driving transistor is coupled to the second transistor, and the driving transistor is configured to output a driving signal according to the start signal.
    Type: Application
    Filed: August 12, 2022
    Publication date: July 13, 2023
    Inventors: Rong-Fu LIN, June-Woo LEE, Sung-Yu SU
  • Publication number: 20230222975
    Abstract: A display device and a driving method thereof are provided. The display device includes a display panel, a controller, and a driver. The display panel includes a plurality of light-emitting elements. The controller receives characteristic information of the light-emitting elements, and obtains a first relationship curve between current density information and luminous efficiency information according to the characteristic information. The controller obtains a second relationship curve between duty cycle information and accumulated current consumption information or accumulated power consumption information according to the first relationship curve. The controller finds a selected duty cycle corresponding to a maximum luminous efficiency according to the second relationship curve. The driver activates the light-emitting elements according to the selected duty cycle.
    Type: Application
    Filed: November 8, 2022
    Publication date: July 13, 2023
    Applicant: AUO Corporation
    Inventors: June Woo Lee, Yang-En Wu, Sung-Yu Su, Yu-Chieh Kuo
  • Publication number: 20230217549
    Abstract: Disclosed are an electrothermal film structure, an electrothermal film heating device and a method for manufacturing an electrothermal film. The electrothermal film structure includes a supporting layer, a meshed conductive circuit layer and a transparent optical layer. The meshed conductive circuit layer provided on the supporting layer includes several micron-level conductive circuits distributed in a mesh, and the transparent optical layer is provided on the meshed conductive circuit layer.
    Type: Application
    Filed: November 18, 2022
    Publication date: July 6, 2023
    Applicant: Micron Optoelectronics Co., Ltd.
    Inventors: Wei SU, Shourong HU, Guoliang ZHANG, Yu SU