Abstract: The present disclosure provides a backlight module including a plurality of light-emitting elements and a light guide plate, in which the light guide plate includes a light-emitting surface, a bottom surface opposite to the light-emitting surface, and a light-incident side connecting the light-emitting surface and the bottom surface. The light-emitting elements are disposed at the light-incident side along a first direction, and the light-emitting surface includes a first region near the light-incident side. The light guide plate includes a plurality of columns extending along the first direction and disposed in the first region of the light-emitting surface and a plurality of microstructure groups, in which each microstructure group includes a plurality of microstructures arranged along a second direction different from the first direction, and each microstructure connects the adjacent two of the columns.

Abstract: An electrical connector includes: an insulative housing having a mating slot; a contact module received in the insulative housing; and a metallic outer shell enclosing the insulative housing and having a latching portion spaced apart from a side wall of the insulative housing, wherein the metallic outer shell includes a pair of bulging portions flanking the latching portion to define, together with the side wall of the insulative housing, an engaging groove, and the metallic outer shell includes a pair of end walls and a pair of side portions between the end walls and the bulging portions, respectively, to define, together with the side wall of the insulative housing, a pair of side grooves.

Abstract: A semiconductor memory device is provided in the present invention, including a substrate, word lines in the substrate, bit lines over the word lines, partition structures between the bit lines and right above the word lines, storage node contacts in spaces defined by the bit lines and the partition structures and electrically connecting with the substrate, wherein a portion of the storage node contact protruding from top surfaces of the bit lines and the partition structures is contact pad, and contact pad isolation structures on the partition structures and between the contact pads, wherein the contact pad isolation structure includes outer silicon nitride layers and inner silicon oxide layers.

Abstract: A semiconductor structure includes a first transistor having a first source/drain (S/D) feature and a first gate; a second transistor having a second S/D feature and a second gate; a multi-layer interconnection disposed over the first and the second transistors; a signal interconnection under the first and the second transistors; and a power rail under the signal interconnection and electrically isolated from the signal interconnection, wherein the signal interconnection electrically connects one of the first S/D feature and the first gate to one of the second S/D feature and the second gate.

Abstract: An electronic device is provided. The electronic device includes a substrate, a first gate circuit, a second gate circuit, a signal line, and a shielding layer. The substrate includes a display area and a peripheral area. The first gate circuit is disposed in the peripheral area. The second gate circuit is disposed in the peripheral area. The signal line is coupled between the first gate circuit and the second gate circuit. The signal line includes a specific line segment, and the specific line segment overlaps the display area. The shielding layer is disposed in the display area. The shielding layer overlaps the specific line segment.

Abstract: Disclosed herein is an extensible memory subsystem comprising a dual in-line memory module (DIMM) that includes a dynamic random-access memory (DRAM) having a basic memory space, a DIMM memory controller coupled to the DRAM, a memory interface configured to couple the DIMM to a DIMM connector of a computing device, and a first extension interface configured to couple the DIMM to a first remote memory module having a first remote memory space, wherein the DIMM memory controller is configured to map a DIMM memory space comprising the basic memory space of the DRAM and the first remote memory space of the first remote memory module, the DIMM memory space being accessible by the computing device upon the DIMM being coupled to the computing device via the memory interface, and a first remote memory module coupled to the DIMM via the first extension interface of the DIMM.

Abstract: A semiconductor device with dummy and active pixel structures and a method of fabricating the same are disclosed. The semiconductor device includes a first pixel region with a first pixel structure, a second pixel region, surrounding the first pixel region, includes a second pixel structure adjacent to the first pixel structure and electrically isolated from the first pixel structure, and a contact pad region with a pad structure disposed adjacent to the second pixel region. The first pixel structure includes a first epitaxial structure disposed within a substrate and a first capping layer disposed on the first epitaxial structure. The second pixel structure includes a second epitaxial structure disposed within the substrate and a second capping layer disposed on the second epitaxial structure. Top surfaces of the first and second epitaxial structures are substantially coplanar with each other. The first and second epitaxial structures includes a same semiconductor material.

Abstract: A method for forming an underfill structure and semiconductor packages including the underfill structure are disclosed. In an embodiment, the semiconductor package may include a package including an integrated circuit die; an interposer bonded to the integrated circuit die by a plurality of die connectors; and an encapsulant surrounding the integrated circuit die. The semiconductor package may further include a package substrate bonded to the interposer by a plurality of conductive connectors; a first underfill between the package and the package substrate, the first underfill having a first coefficient of thermal expansion (CTE); and a second underfill surrounding the first underfill, the second underfill having a second CTE less than the first CTE.

Abstract: A circuit board assembly for electronic devices includes a circuit board having a first surface and a second surface opposite the first surface, and a heat sink carrier disposed on the first surface of the circuit board. The heat sink carrier includes at least one clamp portion. The assembly also includes a heat sink. The heat sink is positioned in the at least one clamp portion of the heat sink carrier to transfer heat from one or more electronic devices to the heat sink via the heat sink carrier.

Abstract: An optical element is provided. The optical device includes a carrier, a first receiver, and a second receiver. The first receiver is disposed on the carrier and configured to receive a first light. The second receiver is disposed on the carrier and configured to receive a second light. The first light and the second light have different frequency bands.

Abstract: A distance measuring device includes a pulsed laser source, a light receiving unit and a computing module. The pulsed laser source emits a laser pulse to a target in accordance with a predetermined period. The light receiving unit has a photon receiving type of light receiving element that receives incident light and outputs a binary pulse, and the binary pulse is used to indicate whether a photon receiving event occurs. The computing module is configured to receive the binary pulse and determine whether an inter-period coincidence event occurs, and the inter-period coincidence event is defined by detecting a plurality of photon receiving events exceeding a predetermined count, on relative positions in a predetermined period number of the predetermined periods. If the calculation module determines that the inter-period coincidence event occurs, a distance of the target is calculated according to time information related to the inter-period coincidence event.

Abstract: The present document describes an apparatus for reducing fabric dimpling in electronic devices and associated methods. The apparatus is used during assembly to prevent fabric, which is stretched over a perforated part (e.g., speaker housing), from dimpling into the holes (e.g., perforations) of the perforated part. The apparatus includes protrusions (e.g., pins), which act as a negative of the holes in the perforated part, to support the fabric as it is stretched over the perforated part. In particular, the protrusions are inserted through the perforations via an interior surface of the perforated part such that the protrusions are “proud” (slightly projecting from a surface) with respect to an exterior surface of the perforated part. The proudness of the protrusions may vary based on a degree of curvature of the perforated part at a location corresponding to a respective protrusion.

Abstract: The present disclosure provides an operating method of a system for analyzing brain tissue based on computerized tomographic imaging, and the operation method includes steps as follows. A computed tomography image of a subject is aligned to a predetermined standard brain space image, to obtain a first normalized test computed tomography image. A voxel contrast of the first normalized test computed tomography image is enhanced to obtain an enhanced first normalized test computed tomography image. The enhanced first normalized test computed tomography image is aligned to an average computed tomographic image of a control group to obtain a second normalized test computed tomography image. An analysis based on the second normalized test computed tomography image and a plurality of computerized tomographic images of the control group is performed to obtain a t-score map.

Abstract: The present document describes an apparatus for reducing fabric dimpling in electronic devices and associated methods. The apparatus is used during assembly to prevent fabric, which is stretched over a perforated part (e.g., speaker housing), from dimpling into the holes (e.g., perforations) of the perforated part. The apparatus includes protrusions (e.g., pins), which act as a negative of the holes in the perforated part, to support the fabric as it is stretched over the perforated part. In particular, the protrusions are inserted through the perforations via an interior surface of the perforated part such that the protrusions are “proud” (slightly projecting from a surface) with respect to an exterior surface of the perforated part. The proudness of the protrusions may vary based on a degree of curvature of the perforated part at a location corresponding to a respective protrusion.

Abstract: The present document describes an apparatus for reducing fabric dimpling in electronic devices and associated methods. The apparatus is used during assembly to prevent fabric, which is stretched over a perforated part (e.g., speaker housing), from dimpling into the holes (e.g., perforations) of the perforated part. The apparatus includes protrusions (e.g., pins), which act as a negative of the holes in the perforated part, to support the fabric as it is stretched over the perforated part. In particular, the protrusions are inserted through the perforations via an interior surface of the perforated part such that the protrusions are “proud” (slightly projecting from a surface) with respect to an exterior surface of the perforated part. The proudness of the protrusions may vary based on a degree of curvature of the perforated part at a location corresponding to a respective protrusion.

Abstract: An antenna assembly includes a base, a lower shell, a heat-dissipating support, an antenna body, and an upper shell. The base includes a base body and a connecting portion connected to each other. The lower shell includes a pivotal base. The pivotal base is located at a first end of the lower shell, and a second end of the lower shell is connected to the connecting portion. The heat-dissipating support includes a bottom portion, a fixed portion, and an extension portion connected in sequence, and the bottom portion is pivotally disposed on the pivotal base. The antenna body includes an adapter board and a first antenna connected to each other. The adapter board includes a fixed end fixed to the extension portion. The upper shell includes an accommodation space configured to accommodate the heat-dissipating support and the antenna body, and the fixed portion is fixed to the upper shell.

Abstract: A circuit board assembly for electronic devices includes a circuit board having a first surface and a second surface opposite the first surface, and a heat sink carrier disposed on the first surface of the circuit board. The heat sink carrier includes at least one clamp portion. The assembly also includes a heat sink. The heat sink is positioned in the at least one clamp portion of the heat sink carrier to transfer heat from one or more electronic devices to the heat sink via the heat sink carrier.

Abstract: A method for forming an underfill structure and semiconductor packages including the underfill structure are disclosed. In an embodiment, the semiconductor package may include a package including an integrated circuit die; an interposer bonded to the integrated circuit die by a plurality of die connectors; and an encapsulant surrounding the integrated circuit die. The semiconductor package may further include a package substrate bonded to the interposer by a plurality of conductive connectors; a first underfill between the package and the package substrate, the first underfill having a first coefficient of thermal expansion (CTE); and a second underfill surrounding the first underfill, the second underfill having a second CTE less than the first CTE.

Abstract: A circuit board assembly for electronic devices includes a circuit board having a first surface and a second surface opposite the first surface, and a heat sink carrier disposed on the first surface of the circuit board. The heat sink carrier includes at least one clamp portion. The assembly also includes a heat sink. The heat sink is positioned in the at least one clamp portion of the heat sink carrier to transfer heat from one or more electronic devices to the heat sink via the heat sink carrier.

Abstract: A semiconductor device with dummy and active pixel structures and a method of fabricating the same are disclosed. The semiconductor device includes a first pixel region with a first pixel structure, a second pixel region, surrounding the first pixel region, includes a second pixel structure adjacent to the first pixel structure and electrically isolated from the first pixel structure, and a contact pad region with a pad structure disposed adjacent to the second pixel region. The first pixel structure includes a first epitaxial structure disposed within a substrate and a first capping layer disposed on the first epitaxial structure. The second pixel structure includes a second epitaxial structure disposed within the substrate and a second capping layer disposed on the second epitaxial structure. Top surfaces of the first and second epitaxial structures are substantially coplanar with each other. The first and second epitaxial structures includes a same semiconductor material.