Patents by Inventor Yu Wu

Yu Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103244
    Abstract: An anti-twist structure of voice coil motor includes a base, a lens housing, an elastic sheet, a magnet, and a yoke member. The lens housing has a margin wall, and the margin wall has a first protrusion and a contact portion. The elastic sheet has a hollowed slot, and the first protrusion pass through the hollowed slot, so that the elastic sheet is disposed on a portion of the margin wall and on the contact portion. The yoke member has an upper wall and a side wall. The side wall is disposed at one side of the upper wall and the side wall extends outward in a direction not parallel to the upper wall. The yoke member surrounds the lens housing, the elastic sheet, and the magnet. The lens housing has a deflectable angle relative to a horizontal reference line.
    Type: Application
    Filed: December 7, 2023
    Publication date: March 28, 2024
    Applicant: Lanto Electronic Limited
    Inventors: Wen-Yen Huang, Meng-Ting Lin, Fu-Yuan Wu, Shang-Yu Hsu, Bing-Bing Ma, Jie Du
  • Publication number: 20240107467
    Abstract: Methods, systems, and devices for wireless communications are described. A network entity may transmit a set of spatially multiplexed synchronization signals in a same symbol period. The set of spatially multiplexed synchronization signals may indicate a parameter, such as a cell identifier, for the network entity. The network entity may select a sequence for each synchronization signal of the set. A user equipment (UE) may monitor for the set of spatially multiplexed synchronization signals during the same symbol period. The UE may differentiate each synchronization signal based on a respective sequence used to transmit each synchronization signal. The UE may determine that the set of spatially multiplexed synchronization signals were transmitted by the network entity using multiple antenna ports. The UE may determine the parameter for the network entity based on receiving the set of spatially multiplexed synchronization signals.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Yi Huang, Hung Dinh Ly, Peter Gaal, Jing Jiang, Yu Zhang, Lei Xiao, Yongle Wu
  • Publication number: 20240105119
    Abstract: A pixel circuit, a driving method therefor and a display apparatus are provided. The pixel circuit includes a driving sub-circuit, a write sub-circuit, a compensation sub-circuit, a reset sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a leak-proof sub-circuit, a storage sub-circuit and a light-emitting element. The reset sub-circuit is configured to reset a fourth node under control of a signal of a light-emitting control signal terminal and reset a fifth node under control of a signal of a reset control signal terminal. The compensation sub-circuit is configured to compensate a threshold voltage of the driving sub-circuit to the fifth node under the control of a signal of a first scanning signal terminal. The leak-proof sub-circuit is configured to write a signal of the fifth node into a first node under control of a signal of a second scanning signal terminal.
    Type: Application
    Filed: April 23, 2021
    Publication date: March 28, 2024
    Inventors: Libin LIU, Li WANG, Guangliang SHANG, Yu FENG, Long HAN, Baoyun WU, Shiming SHI
  • Publication number: 20240104352
    Abstract: Provided are improved end-to-end self-supervised pre-training frameworks that leverage a combination of contrastive and masked modeling loss terms. In particular, the present disclosure provides framework that combines contrastive learning and masked modeling, where the former trains the model to discretize input data (e.g., continuous signals such as continuous speech signals) into a finite set of discriminative tokens, and the latter trains the model to learn contextualized representations via solving a masked prediction task consuming the discretized tokens. In contrast to certain existing masked modeling-based pre-training frameworks which rely on an iterative re-clustering and re-training process or other existing frameworks which concatenate two separately trained modules, the proposed framework can enable a model to be optimized in an end-to-end fashion by solving the two self-supervised tasks (the contrastive task and masked modeling) simultaneously.
    Type: Application
    Filed: July 28, 2022
    Publication date: March 28, 2024
    Inventors: Yu Zhang, Yu-An Chung, Wei Han, Chung-Cheng Chiu, Weikeng Qin, Ruoming Pang, Yonghui Wu
  • Publication number: 20240104746
    Abstract: The present invention discloses a vessel tracking and monitoring system and operating method thereof. Specifically, the vessel tracking and monitoring system comprises at least one camera, a processing module and a storage module. On the other hand, the processing module may keep the water object which is detected and recognized by the at least one camera in the center area of a monitoring screen. Therefore, the present invention may track and recognize the type of the at least one water object, assisting areas such as ports in managing and tracking water object arrivals and departures under various environmental conditions.
    Type: Application
    Filed: December 15, 2022
    Publication date: March 28, 2024
    Inventors: CHIA-YU WU, YAN-SHENG SONG, YU-TING PENG, CHIEN-HUNG LIU
  • Publication number: 20240099796
    Abstract: A flexible tube includes a first connecting portion and a second connecting section. The second connecting section and the first connecting section are integrally connected to each other. The first connecting section has a first end surface, and the second connecting section has a second end surface, wherein there is an acute angle between the first end surface and the second end surface.
    Type: Application
    Filed: November 23, 2022
    Publication date: March 28, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hao-Yan WU, Chin-Chi HSIAO, Chien-Yu WU, Shu HUANG
  • Patent number: 11938156
    Abstract: An isolated and purified lactic acid bacteria is provided, which is Lactobacillus paracasei PS23 (PS23) and its applications in delaying aging process, improving immunomodulatory activity, reducing, preventing or treating allergic and inflammation, preventing or treating a chronic disorder and/or (vi) preventing and/or treating a mood disorder or a neurological condition.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: March 26, 2024
    Assignee: BENED BIOMEDICAL CO., LTD.
    Inventors: Ying-Chieh Tsai, Hui-Yu Huang, Chien-Chen Wu, Jyh-Shing Hsu
  • Patent number: 11941821
    Abstract: An image sleep analysis method and system thereof are disclosed. During sleep duration, a plurality of visible-light images of a body are obtained. Positions of image differences are determined by comparing the visible-light images. A plurality of features of the visible-light images are identified and positions of the features are determined. According to the positions of the image differences and features, the motion intensities of the features are determined. Therefore, a variation of the motion intensities is analyzed and recorded to provide accurate sleep quality.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: March 26, 2024
    Assignee: YUN YUN AI BABY CAMERA CO., LTD.
    Inventors: Bo-Zong Wu, Meng-Ta Chiang, Chia-Yu Chen, Shih-Yun Shen
  • Patent number: 11939238
    Abstract: The present disclosure provides an apparatus and a method for hydrate-based wastewater treatment and cold storage. The apparatus for hydrate-based wastewater treatment and cold storage includes a water chilling unit, a hydrate-based cold storage tank, an airflow disturbance device, a water layer positioning system, a spraying system, a suction filtration system, a heat exchange system, and a system monitoring device. The water chilling unit provides a secondary refrigerant at a low temperature. The secondary refrigerant flows through an evaporator coil in the hydrate-based cold storage tank for heat exchange. The airflow disturbance device induces hydrate nucleation. The water layer positioning system positions a contact surface between a water layer and a hydrate former after hydrate decomposition to facilitate drawing and separation of the treated upper water layer. The spraying system and the suction filtration system enhance the solid-liquid separation efficiency to improve the removal rate of pollutants.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: March 26, 2024
    Assignee: DALIAN UNIVERSITY OF TECHNOLOGY
    Inventors: Lunxiang Zhang, Yongchen Song, Xiaodong Wu, Jiazhu Bao, Chuanxiao Cheng, Zheng Ling, Jie Wang, Fan Wang, Yu Liu, Lei Yang, Mingjun Yang, Yanghui Li, Peng Wu
  • Patent number: 11939664
    Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Chun Hsieh, Tsung-Yu Tsai, Hsing-Yuan Huang, Chih-Chang Wu, Szu-Hua Wu, Chin-Szu Lee
  • Patent number: 11942585
    Abstract: An optoelectronic package structure and a method of manufacturing an optoelectronic package structure are provided. The optoelectronic package structure includes a photonic component. The photonic component has an electrical connection region, a blocking region and a region for accommodating a device. The blocking region is located between the electrical connection region and the region for accommodating a device.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: March 26, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Hsuan Wu, Chang-Yu Lin, Yu-Sheng Huang
  • Patent number: 11940701
    Abstract: A writing panel includes an array substrate, a flexible substrate disposed opposite to the array substrate, a liquid crystal layer disposed between the array substrate and the flexible substrate, and a plurality of spacers each in a shape of a column disposed on a surface of the array substrate proximate to the liquid crystal layer. The array substrate includes a base and a pixel driving circuit layer disposed on the base, and the pixel driving circuit layer includes a plurality of thin film transistors and a plurality of signal lines. An orthographic projection of each spacer on the base is non-overlapping with orthographic projections of the plurality of thin film transistors and the plurality of signal lines on the base.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: March 26, 2024
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaojuan Wu, Jiaxing Wang, Yang Ge, Yu Zhao, Jian Wang, Hao Yan
  • Patent number: 11943065
    Abstract: In one configuration, multiple TRPs, or base stations such a next generation node B (gNB) base stations send different transport blocks (TBs) to a user equipment (UE) at the same time or at different times. In another configuration, multiple base stations may send the same data at the same time to a UE. When the same data is being sent by multiple base stations to a UE, the UE must be notified by some mechanism. Disclosed herein are multiple mechanism for notifying the UE that multiple base stations will be transmitting toe same data at the same time. When there is a backhaul between a TRP and another, each TRP can choose to send the same data stream to increase the reliability of the transmission when, for example, the UE receives at a low signal-to-noise ratio (SNR).
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: March 26, 2024
    Assignee: ZTE Corporation
    Inventors: Chuangxin Jiang, Zhaohua Lu, Yu Ngok Li, Shujuan Zhang, Zhen He, Huahua Xiao, Xinquan Ye, Rongchen Sun, Hao Wu
  • Patent number: 11942130
    Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
  • Patent number: 11942563
    Abstract: A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle.
    Type: Grant
    Filed: June 1, 2023
    Date of Patent: March 26, 2024
    Assignee: XINTEC INC.
    Inventors: Chia-Sheng Lin, Hui-Hsien Wu, Jian-Hong Chen, Tsang-Yu Liu, Kuei-Wei Chen
  • Publication number: 20240096388
    Abstract: A memory cell includes a read word line extending in a first direction, a write transistor, and a read transistor coupled to the write transistor. The read transistor includes a ferroelectric layer, a drain terminal of the read transistor directly connected to the read word line, and a source terminal of the read transistor coupled to a first node. The write transistor is configured to adjust a polarization state of the read transistor, the polarization state corresponding to a stored data value of the memory cell.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Inventors: Bo-Feng YOUNG, Sai-Hooi YEONG, Chao-I WU, Chih-Yu CHANG, Yu-Ming LIN
  • Publication number: 20240098004
    Abstract: A packet forwarding method and apparatus, and a communication network, related to the field of communication technologies. In the solutions provided, a controller may obtain a correspondence between an application-aware identifier of a service flow and a network service required for transmitting the service flow, and deliver the correspondence to a network device. Further, when identifying the service flow as a service flow indicated by the application-aware identifier, the network device may directly forward a packet of the service flow by using the corresponding network service. The controller may establish and deliver the correspondence between the application-aware identifier and the network service, so that the network device can directly forward the service packet of the service flow based on the correspondence. Therefore, flexibility of forwarding the service packet is effectively improved.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Shuping PENG, Hongjie YANG, Tianran ZHOU, Peng WU, Zhenbin LI, Yu ZHOU
  • Publication number: 20240094141
    Abstract: The present disclosure provides a method for processing defect information of a product, which includes the following steps of: acquiring defect information on a current film layer and defect information on historical film layers; determining whether defect information exists at a target location of the historical film layer if defect information exists at a target location of the current film layer; if defect information exists for a corresponding location to the target location in at least one of the historical film layers, deleting the defect information detected at the target location in the current film layer; and if no defect information exists for the target location in any of the historical film layers, retaining the defect information detected at the target location in the current film layer.
    Type: Application
    Filed: April 30, 2021
    Publication date: March 21, 2024
    Inventors: Haijin WANG, Chuan WANG, Tian LAN, Jianmin WU, Yu FENG, Hong WANG, Yu WANG, Fan ZHANG, Jiawei REN, Jing XUE, Jianfeng ZENG
  • Publication number: 20240097567
    Abstract: A conversion control circuit is configured to generate a PWM (pulse width modulation) signal to control a power switch for switching an inductor to convert an input voltage to an output voltage. The steps of generating the PWM signal includes: enabling the PWM signal at a rising edge of a clock signal to turn on the power switch; disabling the PWM signal to turn off the power switch when an on-time exceeds a predetermined minimum on-time and the output voltage has reached an output level; triggering a next rising edge of the clock signal when the off-time exceeds a predetermined minimum off-time, the output voltage has not reached the output level, and a present cycle period of the clock signal has reached a predetermined cycle period.
    Type: Application
    Filed: August 22, 2023
    Publication date: March 21, 2024
    Inventors: Hung-Yu Cheng, Wan-Hsuan Yang, Chi-Hsun Wu
  • Publication number: 20240096941
    Abstract: A semiconductor structure includes a substrate with a first surface and a second surface opposite to the first surface, a first and a second shallow trench isolations disposed in the substrate and on the second surface, a deep trench isolation structure in the substrate and coupled to the first shallow trench isolation, a first dielectric layer disposed on the first surface and coupled to the deep trench isolation structure, a second dielectric layer disposed over the first dielectric layer and coupled to the deep trench isolation structure, a third dielectric layer comprising a horizontal portion disposed over the second dielectric layer and a vertical portion coupled to the horizontal portion, and a through substrate via structure penetrating the substrate from the first surface to the second surface and penetrating the second shallow trench isolation.
    Type: Application
    Filed: January 11, 2023
    Publication date: March 21, 2024
    Inventors: SHIH-JUNG TU, PO-WEI LIU, TSUNG-YU YANG, YUN-CHI WU, CHIEN HUNG LIU