Patents by Inventor Yu Yi

Yu Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968908
    Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
  • Patent number: 11967591
    Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hao Chen, Fong-Yuan Chang, Po-Hsiang Huang, Ching-Yi Lin, Jyh Chwen Frank Lee
  • Patent number: 11966077
    Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: April 23, 2024
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Chien-Lung Chen, Chieh-Ting Lin, Yu-Yi Hsu, Hui-Wen Chen, Bo-Jiun Chen, Shih-Tai Chuang
  • Publication number: 20240128375
    Abstract: A method includes forming first and second semiconductor fins and a gate structure over a substrate; forming a first and second source/drain epitaxy structures over the first and second semiconductor fins; forming an interlayer dielectric (ILD) layer over the first and second source/drain epitaxy structures; etching the gate structure and the ILD layer to form a trench; performing a first surface treatment to modify surfaces of a top portion and a bottom portion of the trench to NH-terminated; performing a second surface treatment to modify the surfaces of the top portion of the trench to N-terminated, while leaving the surfaces of the bottom portion of the trench being NH-terminated; and depositing a first dielectric layer in the trench, wherein the first dielectric layer has a higher deposition rate on the surfaces of the bottom portion of the trench than on the surfaces of the bottom portion of the trench.
    Type: Application
    Filed: March 16, 2023
    Publication date: April 18, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Yi CHANG, Yu Ying CHEN, Zhen-Cheng WU, Chi On CHUI
  • Publication number: 20240128876
    Abstract: A switching control circuit for use in controlling a resonant flyback power converter generates a first driving signal and a second driving signal. The first driving signal is configured to turn on the first transistor to generate a first current to magnetize a transformer and charge a resonant capacitor. The transformer and charge a resonant capacitor are connected in series. The second driving signal is configured to turn on the second transistor to generate a second current to discharge the resonant capacitor. During a power-on period of the resonant flyback power converter, the second driving signal includes a plurality of short-pulses configured to turn on the second transistor for discharging the resonant capacitor. A pulse-width of the short-pulses of the second driving signal is short to an extent that the second current does not exceed a current limit threshold.
    Type: Application
    Filed: June 15, 2023
    Publication date: April 18, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Fu-Ciao Syu, Chia-Hsien Yang, Hsin-Yi Wu
  • Publication number: 20240128414
    Abstract: A light-emitting device is provided. The light-emitting device includes a light-emitting unit and a light-conversion structure disposed on the light-emitting unit, wherein the light-conversion structure includes a quantum dot layer and an etching blocking layer disposed on one of the surfaces of the quantum dot layer.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 18, 2024
    Inventors: Shiou-Yi KUO, Chin-Hung LUNG, Yu-Chun LEE, Hung-Chun TONG
  • Patent number: 11959956
    Abstract: A circuit check method and an electronic apparatus applicable to a to-be-tested circuit are provided. The to-be-tested circuit has one or more first nodes related to a gate voltage of one or more transistor devices and a plurality of second nodes. The circuit check method includes: setting endpoint voltages of a plurality of input interface ports of the to-be-tested circuit; obtaining a first node voltage of the first node according to a conduction path of the to-be-tested circuit and the gate voltage of the transistor device; obtaining a second node voltage of each second node according to the conduction path, the endpoint voltages, and the first node voltage; and performing circuit static check on the to-be-tested circuit by applying the first node voltage and the second node voltage.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: April 16, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yun-Jing Lin, Meng-Jung Lee, Yu-Lan Lo, Shu-Yi Kao
  • Publication number: 20240115151
    Abstract: A physiological signal measurement system, a physiological signal measurement method, and a mobile device protective case are provided. The physiological signal measurement system includes a first electrode, a second electrode, a reference electrode, an impedance front-end circuit module and a dynamic signal matching module. The first electrode, the second electrode and the reference electrode are used to obtain a first sensing signal and a second sensing signal. The impedance front-end circuit module is used to detect a first impedance of the first electrode and a second impedance of the second electrode, and obtain an original differential signal according to the first sensing signal and the second sensing signal. The dynamic signal matching module is used to obtain a calibration sequence according to the first impedance, the second impedance and the original differential signal, and obtain a compensated calibration sequence according to the calibration sequence and the original differential signal.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 11, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yun-Yi HUANG, Yu-Chiao TSAI, Chun LIU, Heng-Yin CHEN
  • Publication number: 20240120846
    Abstract: A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. During a DCM (discontinuous conduction mode) operation, the second driving signal includes a resonant pulse for demagnetizing the transformer and a ZVS (zero voltage switching) pulse for achieving ZVS of the first transistor. The resonant pulse is skipped when the output voltage is lower than a low-voltage threshold.
    Type: Application
    Filed: April 14, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Hsin-Yi Wu
  • Publication number: 20240120410
    Abstract: A semiconductor structure includes a semiconductor epitaxial layer, a first semiconductor well, a second semiconductor well, a source doped region, a gate structure and a drain structure. The semiconductor epitaxial layer includes a first side and a second side opposite to the first side. The first semiconductor well is located on the first side of the semiconductor epitaxial layer. The second semiconductor well is located on the second side of the semiconductor epitaxial layer. The source doped region is located in the first semiconductor well. The gate structure overlaps the first semiconductor well and the source doped region on the first side of the semiconductor epitaxial layer. The drain structure includes a semiconductor substrate. The second side of the semiconductor epitaxial layer outside the second semiconductor well includes a connecting surface. The connecting surface of the semiconductor epitaxial layer is connected to the semiconductor substrate.
    Type: Application
    Filed: February 16, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Tsu LEE, Yan-Ru CHEN, Chao-Yi CHANG, Kuang-Hao CHIANG
  • Publication number: 20240120845
    Abstract: A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. The second driving signal includes a resonant pulse having a resonant pulse width and a ZVS pulse during the DCM operation. The resonant pulse is configured to demagnetize the transformer. The resonant pulse has a first minimum resonant period for a first level of the output load and a second minimum resonant period for a second level of the output load. The first level is higher than the second level and the second minimum resonant period is shorter than the first minimum resonant period.
    Type: Application
    Filed: April 14, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Hsin-Yi Wu
  • Publication number: 20240119200
    Abstract: A method of building a characteristic model includes: acquiring raw electrical data from a measurement system outside one or more processing units; acquiring operational state-related data from an information collector inside the one or more processing units; performing a data annealing process on the raw electrical data and the operational state-related data to obtain and purified electrical data and purified operational state-related data; and performing a machine learning (ML)-based process to build the characteristic model based on the purified electrical data and the purified operational state-related data.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 11, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yu-Jen Chen, Chien-Chih Wang, Wen-Wen Hsieh, Ying-Yi Teng
  • Publication number: 20240122055
    Abstract: The present invention relates to an organic semiconducting compound and organic optoelectronic components using the same. The organic semiconducting compound own a novel chemical structure. By using the organic semiconducting compound to prepare organic optoelectronic compounds, environmentally friendly non-halogen solvent can be used. In addition, the photoresponsivity and detectivity are excellent in the near-infrared region.
    Type: Application
    Filed: September 15, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Tang Hsiao, Fang-Ning Li, Chuang-Yi Liao
  • Patent number: 11957051
    Abstract: An organic semiconductor mixture and an organic optoelectronic device containing the same are provided. A n-type organic semiconductor compound in the organic semiconductor mixture has a novel chemical structure so that the mixture has good thermal stability and property difference during batch production is also minimized. The organic semiconductor mixture is applied to organic optoelectronic devices such as organic photovoltaic devices for providing good energy conversion efficiency while in use.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: April 9, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Chia-Hua Tsai, Chuang-Yi Liao, Wei-Long Li, Yu-Tang Hsiao
  • Patent number: 11957064
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20240109337
    Abstract: A label printing and attaching system includes a label printing device and a label attaching device. The label printing device has an ink tape supply mechanism for supplying an ink tape with a label pattern. A label tape supply mechanism of the label printing device is adapted to supply a label tape that includes a carrier tape and blank label paper adhered to the carrier tape. The label printing device further includes a heat transfer machine adapted to heat transfer the label pattern on the ink tape onto the blank label paper of the label tape to obtain a desired label. The label attaching device has a label picker adapted to pick up the label with the printed label pattern from the label tape, and a moving device adapted to move the label picker to place the picked label with the printed label pattern onto a product.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Applicants: Tyco Electronics (Dongguan) Ltd., TE Connectivity Solutions GmbH, Tyco Electronics (Shanghai) Co., Ltd.
    Inventors: Zongjie (Jason) Tao, Hongzhou (Andy) Shen, Dandan (Emily) Zhang, Roberto Francisco-Yi Lu, Guoqiang Liu, Ziqiang Xiong, Kai Fu, Xueyun Zhu, Yi Li, Xuyan Yu
  • Publication number: 20240111133
    Abstract: An imaging lens assembly module includes a lens carrier, a rotatable component, an imaging surface and a holder portion. At least one lens element of the imaging lens assembly module is disposed on the lens carrier, and the lens carrier includes an assembling structure. The rotatable component includes a blade set and a rotating element. The blade set includes rotatable blades surrounding an optical axis to form a through hole. The rotating element is connected to the blade set. The imaging surface is located on an image side of the lens carrier. The holder portion is configured to keep a fixed distance between the lens carrier and the imaging surface. The blade set and the rotating element are disposed on the assembling structure, and the blade set and the rotating element rotate relatively to the assembling structure, so that the dimension of the through hole is variable.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 4, 2024
    Inventors: Yu-Tzu CHANG, Hsiu-Yi HSIAO, Ming-Ta CHOU, Te-Sheng TSENG
  • Publication number: 20240112323
    Abstract: A method for detecting defects on a wafer including the steps of obtaining a reference image of a chip pattern formed on a reference wafer, using a computer algorithm to analyze the reference image to produce a division map for the chip pattern; setting respective thresholds for divisions of the division map, obtaining a comparison data between a test image of the chip pattern formed on a test wafer and the reference image, using the division map and the thresholds to examine the comparison data to identify a defect in the test image.
    Type: Application
    Filed: November 17, 2022
    Publication date: April 4, 2024
    Applicant: United Semiconductor (Xiamen) Co., Ltd.
    Inventors: Yu Peng Hong, QINGRONG CHEN, Kai Ping Huang, Chin-Chun Huang, WEN YI TAN
  • Publication number: 20240113222
    Abstract: Some embodiments relate to a thin film transistor comprising an active layer over a substrate. An insulator is stacked with the active layer. A gate electrode structure is stacked with the insulator and includes a gate material layer having a first work function and a first interfacial layer. The first interfacial layer is directly between the insulator and the gate material layer, wherein the gate electrode structure has a second work function that is different from the first work function.
    Type: Application
    Filed: January 3, 2023
    Publication date: April 4, 2024
    Inventors: Yan-Yi Chen, Wu-Wei Tsai, Yu-Ming Hsiang, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin
  • Publication number: 20240110776
    Abstract: A detection device adapted to verify or determine a welding quality includes a housing, a moving assembly, a mounting bracket, and a rotating assembly. The moving assembly is movably installed on the housing and is adapted to be moved up and down in a vertical direction. The mounting bracket is fixed to the housing. The rotating assembly includes a rotating member rotatably connected to the mounting bracket and movably connected to the moving assembly, and a contact probe fixed to the rotating member. The contact probe is adapted to make sliding contact with a second component welded on a first component and to push the moving assembly to move in the vertical direction through the rotating member.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 4, 2024
    Applicants: Tyco Electronics (Dongguan) Ltd., TE Connectivity Solutions GmbH, Tyco Electronics (Shanghai) Co., Ltd.
    Inventors: Lei (Alex) Zhou, Dandan (Emily) Zhang, Roberto Francisco-Yi Lu, Xuyan Yu, Haoquan Yao, Hongzhou (Andy) Shen, Yi Li