Patents by Inventor Yu Yi

Yu Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240115151
    Abstract: A physiological signal measurement system, a physiological signal measurement method, and a mobile device protective case are provided. The physiological signal measurement system includes a first electrode, a second electrode, a reference electrode, an impedance front-end circuit module and a dynamic signal matching module. The first electrode, the second electrode and the reference electrode are used to obtain a first sensing signal and a second sensing signal. The impedance front-end circuit module is used to detect a first impedance of the first electrode and a second impedance of the second electrode, and obtain an original differential signal according to the first sensing signal and the second sensing signal. The dynamic signal matching module is used to obtain a calibration sequence according to the first impedance, the second impedance and the original differential signal, and obtain a compensated calibration sequence according to the calibration sequence and the original differential signal.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 11, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yun-Yi HUANG, Yu-Chiao TSAI, Chun LIU, Heng-Yin CHEN
  • Publication number: 20240119200
    Abstract: A method of building a characteristic model includes: acquiring raw electrical data from a measurement system outside one or more processing units; acquiring operational state-related data from an information collector inside the one or more processing units; performing a data annealing process on the raw electrical data and the operational state-related data to obtain and purified electrical data and purified operational state-related data; and performing a machine learning (ML)-based process to build the characteristic model based on the purified electrical data and the purified operational state-related data.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 11, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yu-Jen Chen, Chien-Chih Wang, Wen-Wen Hsieh, Ying-Yi Teng
  • Publication number: 20240122055
    Abstract: The present invention relates to an organic semiconducting compound and organic optoelectronic components using the same. The organic semiconducting compound own a novel chemical structure. By using the organic semiconducting compound to prepare organic optoelectronic compounds, environmentally friendly non-halogen solvent can be used. In addition, the photoresponsivity and detectivity are excellent in the near-infrared region.
    Type: Application
    Filed: September 15, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Tang Hsiao, Fang-Ning Li, Chuang-Yi Liao
  • Patent number: 11957051
    Abstract: An organic semiconductor mixture and an organic optoelectronic device containing the same are provided. A n-type organic semiconductor compound in the organic semiconductor mixture has a novel chemical structure so that the mixture has good thermal stability and property difference during batch production is also minimized. The organic semiconductor mixture is applied to organic optoelectronic devices such as organic photovoltaic devices for providing good energy conversion efficiency while in use.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: April 9, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Chia-Hua Tsai, Chuang-Yi Liao, Wei-Long Li, Yu-Tang Hsiao
  • Patent number: 11957064
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20240111133
    Abstract: An imaging lens assembly module includes a lens carrier, a rotatable component, an imaging surface and a holder portion. At least one lens element of the imaging lens assembly module is disposed on the lens carrier, and the lens carrier includes an assembling structure. The rotatable component includes a blade set and a rotating element. The blade set includes rotatable blades surrounding an optical axis to form a through hole. The rotating element is connected to the blade set. The imaging surface is located on an image side of the lens carrier. The holder portion is configured to keep a fixed distance between the lens carrier and the imaging surface. The blade set and the rotating element are disposed on the assembling structure, and the blade set and the rotating element rotate relatively to the assembling structure, so that the dimension of the through hole is variable.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 4, 2024
    Inventors: Yu-Tzu CHANG, Hsiu-Yi HSIAO, Ming-Ta CHOU, Te-Sheng TSENG
  • Publication number: 20240113071
    Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
  • Publication number: 20240113222
    Abstract: Some embodiments relate to a thin film transistor comprising an active layer over a substrate. An insulator is stacked with the active layer. A gate electrode structure is stacked with the insulator and includes a gate material layer having a first work function and a first interfacial layer. The first interfacial layer is directly between the insulator and the gate material layer, wherein the gate electrode structure has a second work function that is different from the first work function.
    Type: Application
    Filed: January 3, 2023
    Publication date: April 4, 2024
    Inventors: Yan-Yi Chen, Wu-Wei Tsai, Yu-Ming Hsiang, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin
  • Publication number: 20240109337
    Abstract: A label printing and attaching system includes a label printing device and a label attaching device. The label printing device has an ink tape supply mechanism for supplying an ink tape with a label pattern. A label tape supply mechanism of the label printing device is adapted to supply a label tape that includes a carrier tape and blank label paper adhered to the carrier tape. The label printing device further includes a heat transfer machine adapted to heat transfer the label pattern on the ink tape onto the blank label paper of the label tape to obtain a desired label. The label attaching device has a label picker adapted to pick up the label with the printed label pattern from the label tape, and a moving device adapted to move the label picker to place the picked label with the printed label pattern onto a product.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Applicants: Tyco Electronics (Dongguan) Ltd., TE Connectivity Solutions GmbH, Tyco Electronics (Shanghai) Co., Ltd.
    Inventors: Zongjie (Jason) Tao, Hongzhou (Andy) Shen, Dandan (Emily) Zhang, Roberto Francisco-Yi Lu, Guoqiang Liu, Ziqiang Xiong, Kai Fu, Xueyun Zhu, Yi Li, Xuyan Yu
  • Publication number: 20240113225
    Abstract: A semiconductor device includes a gate, a semiconductor structure, a gate insulating layer, a first source/drain feature and a second source/drain feature. The gate insulating layer is located between the gate and the semiconductor structure. The semiconductor structure includes at least one first metal oxide layer, a first oxide layer, and at least one second metal oxide layer. The first oxide layer is located between the first metal oxide layer and the second metal oxide layer. The first source/drain feature and the second source/drain feature are electrically connected with the semiconductor structure.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wu-Wei Tsai, Yan-Yi Chen, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin
  • Publication number: 20240110776
    Abstract: A detection device adapted to verify or determine a welding quality includes a housing, a moving assembly, a mounting bracket, and a rotating assembly. The moving assembly is movably installed on the housing and is adapted to be moved up and down in a vertical direction. The mounting bracket is fixed to the housing. The rotating assembly includes a rotating member rotatably connected to the mounting bracket and movably connected to the moving assembly, and a contact probe fixed to the rotating member. The contact probe is adapted to make sliding contact with a second component welded on a first component and to push the moving assembly to move in the vertical direction through the rotating member.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 4, 2024
    Applicants: Tyco Electronics (Dongguan) Ltd., TE Connectivity Solutions GmbH, Tyco Electronics (Shanghai) Co., Ltd.
    Inventors: Lei (Alex) Zhou, Dandan (Emily) Zhang, Roberto Francisco-Yi Lu, Xuyan Yu, Haoquan Yao, Hongzhou (Andy) Shen, Yi Li
  • Publication number: 20240112323
    Abstract: A method for detecting defects on a wafer including the steps of obtaining a reference image of a chip pattern formed on a reference wafer, using a computer algorithm to analyze the reference image to produce a division map for the chip pattern; setting respective thresholds for divisions of the division map, obtaining a comparison data between a test image of the chip pattern formed on a test wafer and the reference image, using the division map and the thresholds to examine the comparison data to identify a defect in the test image.
    Type: Application
    Filed: November 17, 2022
    Publication date: April 4, 2024
    Applicant: United Semiconductor (Xiamen) Co., Ltd.
    Inventors: Yu Peng Hong, QINGRONG CHEN, Kai Ping Huang, Chin-Chun Huang, WEN YI TAN
  • Publication number: 20240113221
    Abstract: A fin field effect transistor (FinFET) device structure is provided. The FinFET device structure includes a plurality of fin structures above a substrate, an isolation structure over the substrate and between the fin structures, and a gate structure formed over the fin structure. The FinFET device structure includes a source/drain (S/D) structure over the fin structure, and the S/D structure is adjacent to the gate structure. The FinFET device structure also includes a metal silicide layer over the S/D structure, and the metal silicide layer is in contact with the isolation structure.
    Type: Application
    Filed: November 28, 2023
    Publication date: April 4, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Hsiung TSAI, Shahaji B. MORE, Cheng-Yi PENG, Yu-Ming LIN, Kuo-Feng YU, Ziwei FANG
  • Patent number: 11948837
    Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Fu Yeh, Chin-Lung Chung, Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Ming-Han Lee
  • Publication number: 20240105550
    Abstract: A device includes an integrated circuit die attached to a substrate; a lid attached to the integrated circuit die; a sealant on the lid; a spacer structure attached to the substrate adjacent the integrated circuit die; and a cooling cover attached to the spacer structure, wherein the cooling cover extends over the lid, wherein the cooling cover attached to the lid by the sealant. In an embodiment, the device includes a ring structure on the substrate, wherein the ring structure is between the spacer structure and the integrated circuit die.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 28, 2024
    Inventors: Tung-Liang Shao, Yu-Sheng Huang, Hung-Yi Kuo, Chen-Hua Yu
  • Publication number: 20240107879
    Abstract: An organic optoelectronic device comprises a first electrode, an active layer and a second electrode. An active layer material of the active layer comprises a near-infrared organic small molecule with vinyl groups which includes a structure of formula I: Wherein o and p are independently selected from any integer from 0 to 2, and o+p>0. Ar1 is an electron-withdrawing group with a unilateral fused ring structure. Ar2 is a monocyclic or polycyclic structure containing ketone and an electron-withdrawing group, and has a double bond to bond other groups. R1 is different from R2. The active layer material of the organic optoelectronic device comprises an organic small molecule with an asymmetric carbon chain, and has adjustable material solubility, arrangement and conductivity. The present invention also provides an active layer material comprising organic small molecules with asymmetric carbon chains and with symmetrical carbon chains independently, which improve production efficiency.
    Type: Application
    Filed: August 9, 2023
    Publication date: March 28, 2024
    Inventors: Yu-Tang Hsiao, Chuang-Yi Liao, YEU-RU LEE
  • Patent number: 11942549
    Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wan-Yi Kao, Yu-Cheng Shiau, Chunyao Wang, Chih-Tang Peng, Yung-Cheng Lu, Chi On Chui
  • Patent number: 11943936
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first transistor, a first resistive random access memory (RRAM) resistor, and a second RRAM resistor. The first resistor includes a first resistive material layer, a first electrode shared by the second resistor, and a second electrode. The second resistor includes the first electrode, a second resistive material layer, and a third electrode. The first electrode is electrically coupled to the first transistor.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Der Chih, May-Be Chen, Yun-Sheng Chen, Jonathan Tsung-Yung Chang, Wen Zhang Lin, Chrong Jung Lin, Ya-Chin King, Chieh Lee, Wang-Yi Lee
  • Patent number: 11944017
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Chien Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Patent number: D1019609
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: March 26, 2024
    Assignee: Hefei Tuwa Technology Co., Ltd.
    Inventors: Yu Tian, Lei Xie, Liang Zhang, Jun Yi