Patents by Inventor Yu YING

Yu YING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12343389
    Abstract: The invention relates to activated Streptococcus pneumoniae serotype 10A, 22F or 33F polysaccharides and processes for their preparation. The invention also relates to immunogenic conjugates comprising Streptococcus pneumoniae serotype 10A, 22F or 33F polysaccharides covalently linked to a carrier protein, processes for their preparation and immunogenic compositions and vaccines comprising them.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: July 1, 2025
    Assignee: Pfizer Inc.
    Inventors: Jianxin Gu, Rajesh Kumar Kainthan, Jin-Hwan Kim, Avvari Krishna Prasad, Yu-Ying Yang
  • Patent number: 12310990
    Abstract: The present disclosure provides a method for treating arthritis by using a stem cell preparation. The stem cell preparation of the present disclosure can effectively delay cartilage degeneration caused by arthritis, and it is confirmed by whole blood analysis and blood biochemical analysis that the stem cell preparation in the form of three-dimensional stem cell spheres provides a safe treatment for arthritis. The present disclosure also provides a method for preparing the stem cell preparation.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: May 27, 2025
    Assignee: GWO XI STEM CELL APPLIED TECHNOLOGY CO., LTD.
    Inventors: Feng-Huei Lin, Che-Yung Kuan, Yu-Ying Lin, Ching-Yun Chen, Zhi-Yu Chen, I-Hsuan Yang, Ming-Hsi Chuang, Po-Cheng Lin, Chia-Hsin Lee, Kai-Ling Zhang, Pei-Syuan Chao, Wan-Sin Syu, Chun-Hung Chen, Ting-Ju Wang
  • Patent number: 12315785
    Abstract: A semiconductor device package includes a carrier, a first conductive post and a first adhesive layer. The first conductive post is disposed on the carrier. The first conductive post includes a lower surface facing the carrier, an upper surface opposite to the lower surface and a lateral surface extended between the upper surface and the lower surface. The first adhesive layer surrounds a portion of the lateral surface of the first conductive post. The first adhesive layer comprises conductive particles and an adhesive. The first conductive post has a height measured from the upper surface to the lower surface and a width. The height is greater than the width.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: May 27, 2025
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Yu-Ying Lee
  • Publication number: 20250138623
    Abstract: The present invention relates to a system for network-on-chip power management. The system comprising a primary network-on-chip comprises multiple components, each component having a power controller, characterized by a secondary network-on-chip comprises a secondary network-on-chip master node and a plurality of secondary network-on-chip nodes connected thereto, the plurality of secondary network-on-chip nodes associated to the components of the primary network-on-chip for power managing individual and link components of the primary network-on-chip, and a power management unit connected to the secondary network-on-chip master node, configured to polling status registers of the components of the primary network-on-chip for accessing power states of each component, accessing routing information of the components of the primary network-on-chip and sending request to the secondary network-on-chip nodes for powering on or off the associated components of the primary network-chip through the power controller.
    Type: Application
    Filed: December 29, 2023
    Publication date: May 1, 2025
    Applicant: SKYECHIP SDN BHD
    Inventors: Chee Hak TEH, Yu Ying ONG, Soon Chieh LIM, MUHAMAD AIDIL BIN JAZMI, Yeong Tat LIEW, Weng Li LEOW
  • Patent number: 12268784
    Abstract: A method of preparing polylactic acid (PLA) microsphere and polylactic-co-glycolic acid (PLGA) microsphere is provided, including the following steps. A first solution is provided, including polylactic acid or polylactic-co-glycolic acid and an organic solvent. A second solution is provided, including polyvinyl alcohol, sodium carboxymethyl cellulose and an aqueous solution. The first solution is added to the second solution and, at the same time, the second solution is agitated until polylactic acid is solidified to form a plurality of polylactic acid microspheres, or until polylactic-co-glycolic acid is solidified to form a plurality of polylactic-co-glycolic acid microspheres. The polylactic acid microspheres or polylactic-co-glycolic acid microspheres are collected.
    Type: Grant
    Filed: December 27, 2023
    Date of Patent: April 8, 2025
    Assignees: Taipei Medical University, Panion & BF Biotech Inc.
    Inventors: Ming-Thau Sheu, Yu-Ying Hsu, Yu-De Su, Yu-Hsuan Liu, Pu-Sheng Wei
  • Publication number: 20250107031
    Abstract: The present disclosure provides an adapter bracket, which includes a first portion, a second portion and a third portion. The first portion includes a protruding portion extending from a first bottom surface of the first portion in a direction perpendicular to the first bottom surface. The second portion, has an elevation with respect to the first bottom surface of the first portion. The second portion comprising a first hole. The third portion extends between the first portion and the second portion.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 27, 2025
    Inventors: YAW-TZORNG TSORNG, TUNG-HSIEN WU, YU-YING TSENG, YEN-LIN LIU
  • Publication number: 20250097102
    Abstract: Some embodiments of the invention provide a method for implementing an edge device that handles data traffic between a logical network and an external network. The method monitors resource usage of a node pool that includes multiple nodes that each executes a respective set of pods. Each of the pods is for performing a respective set of data message processing operations for at least one of multiple logical routers. The method determines that a particular node in the node pool has insufficient resources for the particular node's respective set of pods to adequately perform their respective sets of data message processing operations. Based on the determination, the method automatically provides additional resources to the node pool by instantiating at least one additional node in the node pool.
    Type: Application
    Filed: November 27, 2024
    Publication date: March 20, 2025
    Inventors: Yong Wang, Cheng-Chun Tu, Sreeram Kumar Ravinoothala, Yu Ying
  • Publication number: 20250092151
    Abstract: Provided herein are tetravalent antibodies that specifically bind to human PSGL-1. Unlike bivalent antibodies, these tetravalent antibodies contain a dimer of two monomers, with each monomer comprising two light chain variable (VL) domains and two heavy chain variable (VH) domains. This format allows for cross-linker/FcR-expressing cell-independent tetravalent antibodies against PSGL-1 that show enhanced efficacy as compared to bivalent PSGL-1 antibodies. These tetravalent antibodies can be used in a variety of diagnostic and therapeutic methods, including without limitation treating T-cell mediated inflammatory diseases, transplantations, and transfusions.
    Type: Application
    Filed: November 26, 2024
    Publication date: March 20, 2025
    Inventors: Rong-Hwa LIN, Shih-Yao LIN, Yu-Ying TSAI
  • Publication number: 20250088449
    Abstract: Some embodiments provide a method for a data message processing device that includes multiple network interfaces associated with at least two different non-uniform memory access (NUMA) nodes. The method receives a data message at a first network interface associated with a particular one of the NUMA nodes. Based on processing of the data message, the method identifies multiple output options for the data message. Each of the output options has an equal forwarding cost and each output option is associated with a respective one of the NUMA nodes. The method selects an output option for the data message that is associated with the particular NUMA node to avoid cross-NUMA node processing of the data message.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Inventors: Xinhua Hong, Jochen Behrens, Yu Ying, Pankaj Gupta
  • Publication number: 20250080630
    Abstract: Some embodiments provide a method for configuring a logical router implemented in a Kubernetes cluster. The method receives configuration data specifying a service rule for the logical router. The service rule requires processing of L5-L7 headers of data messages sent to the logical router. Based on the service rule, the method defines (i) a redirection rule specifying a set of data messages to which the service rule applies based on L2-L4 header values and (ii) an L5-L7 processing rule for application of the service rule. the method provides the redirection rule to a first set of Pods in the cluster and the L5-L7 processing rule to a second set of Pods in the cluster.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 6, 2025
    Inventors: Abhishek Goliya, Yu Ying, Yong Wang
  • Publication number: 20250080411
    Abstract: Some embodiments provide a method for configuring logical routers of a logical network. The logical routers are implemented in a Kubernetes cluster as a first set of Pods that each perform logical forwarding operations for the logical routers and a second set of Pods that each perform L7 service operations for a respective logical router. From a Kubernetes control plane component, the method receives a notification that the first set requires scaling to include an additional Pod. The first-set Pods process data messages between the logical network and external networks. Within the network management system, the method defines at least one new interface for processing data messages between the logical network and external networks. The method configures the at least one interface on the additional Pod to communicate with external physical routers to receive traffic from the external networks and send traffic to the external networks.
    Type: Application
    Filed: June 24, 2024
    Publication date: March 6, 2025
    Inventors: Abhishek Goliya, Yu Ying, Yong Wang
  • Publication number: 20250077249
    Abstract: Some embodiments provide a method for configuring a logical network in a Kubernetes cluster, at a network management system external to the Kubernetes cluster. The method receives a definition of a logical router for the logical network. The logical router definition specifies a set of one or more L7 services to be performed on data messages processed by the logical router. Via a control plane of the Kubernetes cluster, the method defines (i) a first CR instance associated with a first CRD for implementing logical forwarding for the logical router and (ii) for each L7 service, a separate CR instance associated with a second CRD for implementing the L7 service.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 6, 2025
    Inventors: Abhishek Goliya, Yu Ying, Yong Wang
  • Publication number: 20250058324
    Abstract: An automated molecular operating system includes at least one centrifuge tube carrying module, a transport module, a plurality of temperature control modules, a capping module, a magnetic field module and an automated processing module. The automated processing module is electrically connected to the transport module, the temperature control modules, the capping module and the magnetic field module, and controls the transport module to move the centrifuge tube carrying module, so that a centrifuge tube contained in the centrifuge tube carrying module makes a reaction in the temperature control modules, and the magnetic field module or the capping module is provided to the centrifuge tube according to requirements, such that a specimen in the centrifuge tube can be automatically subjected to nucleic acid extraction, nucleic acid amplification, primer labeling, reverse transcription or a combination thereof, thereby reducing manual operation errors and increasing the ease of operation.
    Type: Application
    Filed: November 17, 2023
    Publication date: February 20, 2025
    Inventors: Yi-Fang CHEN, Suz-Kai HSIUNG, Chun-Wei HUANG, Yin-Lin LI, Yu-Ying WU
  • Patent number: 12232278
    Abstract: A bracket module and a computing device including the bracket module are disclosed. The bracket module includes a housing structure. The housing structure includes a plurality of slots. Each slot is configured to accept a device inserted therein. The housing structure is configured for attachment in a chassis of the computing device. The bracket module further includes a tray structure. The tray structure includes a fixed end connected to the housing structure and a free end opposite from the fixed end. The tray structure is configured to rotate relative to the housing structure about the fixed end. The bracket module further includes at least one fastener configured to engage the tray structure with the housing structure in an open position.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: February 18, 2025
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yaw-Tzorng Tsorng, Tung-Hsien Wu, Yu-Ying Tseng, Hsiang-Pu Ni
  • Publication number: 20250053721
    Abstract: A method to derive the location and size of oxide spacing area is provided in the present invention, including steps of dividing a tested region into a plurality of grid units, each grid unit consists of a plurality of sub-grid units, calculating a pattern density difference, a minimum row/column pattern density and a row/column pattern density difference of every grid unit based on layout data, and determining a grid unit as where an oxide spacing area locates at when its pattern density difference is greater than a first predetermined value, its minimum row/column pattern density is less than a second predetermined value and its row/column pattern density difference is greater than a third predetermined value.
    Type: Application
    Filed: October 10, 2023
    Publication date: February 13, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Zih-Wun Peng, Chih-Yueh Li, Ya-Ching Cheng, Yu-Ying Hu, Da-Ching Liao, Po-Jen Hsiao
  • Publication number: 20250039088
    Abstract: Some embodiments provide a method for implementing a logical router of a logical network at a first Pod executing on a first node of a Kubernetes cluster to implement data message forwarding for the logical router. The method receives a data message for processing by the logical router. The method determines that the data message requires layer 7 (L7) service processing at the logical router. The method selects a second Pod from multiple Pods that perform L7 service for the logical router. Each of the Pods executes on a different node of the cluster. The method forwards the data message to the second Pod via a layer 2 (L2) construct that connects the first and second Pods.
    Type: Application
    Filed: July 24, 2023
    Publication date: January 30, 2025
    Inventors: Yu Ying, Yong Wang, Pankaj Gupta, Sreeram Kumar Ravinoothala
  • Publication number: 20250036437
    Abstract: Some embodiments provide a method for configuring a first Pod in a container cluster to perform layer 7 (L7) services for a logical router. At a second Pod that performs logical forwarding operations for the logical router, the method receives configuration data for the logical router from a network management system that defines a logical network for which the logical router routes data messages and performs L7 services. The method provides a set of Pod definition data to a cluster controller to create the first Pod. After creation of the first Pod, the method provides to the first Pod (i) networking information to enable a connection between the first and second Pods and (ii) configuration data defining the L7 services for the first Pod to perform the L7 services on data traffic sent from the second Pod to the first Pod.
    Type: Application
    Filed: July 24, 2023
    Publication date: January 30, 2025
    Applicant: VMware, Inc.
    Inventors: Yu Ying, Pankaj Gupta, Kai-Wei Fan, Stephen Tan, Sreeram Kumar Ravinoothala, Yong Wang
  • Tie
    Patent number: 12210924
    Abstract: A tie includes an RFID device and a body encapsulating the RFID device by overmolding. The body includes a strap member, a head member, and a protection member connected between the strap member and the head member. The strap member has a plurality of engaging teeth. The RFID device is embedded in the protection member. The head member has a through hole. A hole wall of the through hole is provided with a one-way pawl. When winding the body around an object, the protection member can get a better protection since the protection member is located on an inner side between the head member and the strap member without protruding outward. Because the protection member and the head member are closer to a surface of the object, the extent to which the protection member protrudes outwards is reduced, thereby facilitating the RFID device to be sensed more easily.
    Type: Grant
    Filed: October 10, 2023
    Date of Patent: January 28, 2025
    Assignees: YOKE INDUSTRIAL CORP., ASIA SMART TAG CO., LTD.
    Inventors: Rong-Der Hong, Lien-Feng Lin, Yu-Ying Lin
  • Patent number: 12213308
    Abstract: A memory structure and a method of manufacturing the same are provided. The method includes forming a gate structure and a source/drain region in a substrate, in which the source/drain region is next to the gate structure. A dry etching process is performed to form a trench in the source/drain region. A wet etching process is performed to expand the trench to form an expanded trench, in which the expanded trench has a polygonal cross section profile. A bit line contact is formed in the expanded trench.
    Type: Grant
    Filed: February 19, 2024
    Date of Patent: January 28, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Yu-Ying Lin
  • Patent number: 12210633
    Abstract: A memory controller for improving data integrity and providing data security. The memory controller including a transmit data path to transmit write data to a memory device, the transmit data path comprising a scrambling component, wherein the scrambling component includes a scrambling logic and an exclusive OR logic, wherein the write data is divided into a first portion and a second portion, wherein input of the scrambling logic comprises the first portion of the write data and an address associated with the write data to generate a pseudo-random output, and wherein input of the exclusive OR logic comprises the second portion of the write data, the pseudo-random output and a fixed seed corresponding to the first portion of the write data to generate a scrambled data.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: January 28, 2025
    Assignee: SKYECHIP SDN BHD
    Inventors: Yu Ying Ong, Muhamad Aidil Bin Jazmi, Soon Chieh Lim, Chee Hak Teh