Abstract: Some implementations described herein provide techniques and apparatuses for an integrated circuit device including a trench capacitor structure that has a merged region. A material filling the merged region is different than a material that is included in electrode layers of the trench capacitor structure. Furthermore, the material filling the merged region includes a coefficient of thermal expansion and a modulus of elasticity that, in combination with the architecture of the trench capacitor structure, reduce thermally induced stresses and/or strains within the integrated circuit device relative to another integrated circuit device having a trench capacitor structure including a merged region and electrode layers of a same material.

Abstract: The present disclosure describes a structure with a conductive plate and a method for forming the structure. The structure includes a gate structure disposed on a diffusion region of a substrate, a protective layer in contact with the diffusion region and covering a sidewall of the gate structure and a portion of a top surface of the gate structure, and a first insulating layer in contact with the gate structure and the protective layer. The structure further includes a conductive plate in contact with the first insulating layer, where a first portion of the conductive plate laterally extends over a horizontal portion of the protective layer, and where a second portion of the conductive plate extends over a sidewall portion of the protective layer covering the sidewall of the gate structure. The structure further includes a second insulating layer in contact with the conductive plate.

Abstract: A semiconductor device includes a substrate, an interconnect, a memory cell, and a plurality of first barrier structures. The interconnect is disposed over the substrate. The memory cell is disposed in the interconnect within a memory region of the substrate, where the memory cell includes a transistor and a capacitor. The transistor includes a gate, source/drain elements respectively standing at two opposite sides of the gate, and a channel disposed between the source/drain elements and overlapped with the gate. The capacitor is disposed over the transistor and electrically coupled to one of the source/drain elements. The plurality of first barrier structures line sidewalls and bottom surfaces of the source/drain elements, and each include a first barrier layer and a second barrier layer disposed between the source/drain elements and the first barrier layer, where a first absorption interface is disposed between the first barrier layer and the second barrier layer.

Abstract: A memory device and method of forming the same are provided. The memory device includes a first memory cell disposed over a substrate. The first memory cell includes a transistor and a data storage structure coupled to the transistor. The transistor includes a gate pillar structure, a channel layer laterally wrapping around the gate pillar structure, a source electrode surrounding the channel layer, and a drain electrode surrounding the channel layer. The drain electrode is separated from the source electrode a dielectric layer therebetween. The data storage structure includes a data storage layer surrounding the channel layer and sandwiched between a first electrode and a second electrode. The drain electrode of the transistor and the first electrode of the data storage structure share a common conductive layer.

Abstract: A method (of manufacturing a memory device) includes forming active regions extending in a first direction; over the active regions, doing as follows including, forming gate structures extending in a second direction perpendicular to the first direction, and forming contact-to-source/drain structures (MD structures) which extend in the second direction and are interspersed among corresponding ones of the gate structures; forming via-to-gate/MD (VGD) structures over corresponding ones of the gate structures and the MD structures; in a first metallization layer over the VGD structures, forming first front-side segments extending in the first direction and including one or more front-side routing (FRTE) segments; under the active regions, forming buried segment-to-source/drain structures (BVD structures); and in a first buried metallization layer under the BVD structures, forming first back-side segments extending in the first direction and including one or more first back-side power grid (BPG) segments.

Abstract: An immersion cooling system includes a work tank, a buffer tank, and a communication control assembly. The work tank has a work-tank gas-phase region and a work-tank liquid-phase region. The buffer tank has a buffer-tank gas-phase region and a buffer-tank liquid-phase region. The communication control assembly includes a first pipeline, a first pump, a second pipeline, and a second valve. In response to that the first pump is actuated, through the first pipeline, a fluid of the work-tank liquid-phase region is transported to the buffer-tank liquid-phase region, or a fluid of the buffer-tank liquid-phase region is transported to the work-tank liquid-phase region. In response to that the second valve is actuated, through the second pipeline, the work-tank gas-phase region is selectively in communication with the buffer-tank gas-phase region.

Abstract: This application provides information sending and receiving methods and apparatuses, and belongs to the field of communications technologies. This application provides a new PPDU format. A long training sequence in the new PPDU format is orthogonal to a legacy long training sequence or orthogonal to a high throughput long training sequence. By using this long training sequence, a format of a PPDU can be automatically detected, so as to further process the PPDU according to a network standard corresponding to the format of the PPDU. In addition, when a target long training field is read, the format of the PPDU can be detected, thereby saving time for detecting the format of the PPDU, improving efficiency of detecting the format of the PPDU, and completing a task of detecting the format of the PPDU as early as possible.

Abstract: Systems and methods for time-series forecasting via multi-modal augmentation and fusion. Time-series data and modality data can be decomposed into seasonal and trend representations with trend-seasonal decomposition. Using an encoder transformer model, time-series data embeddings and modality data embeddings can be concatenated from the seasonal representations and the trend representations to obtain crossed representations. Using the encoder transformer model, the modality data embeddings and the time-series data embeddings can be processed separately to obtain singular representations. The crossed representations and the singular representations can be augmented through joint trend-seasonal decomposition to obtain augmented seasonal data and augmented trend data. Using a decoder, augmented seasonal data and augmented trend data can be fused to obtain fused augmented data.

Abstract: A method of determining interaction information, an electronic device and a storage medium are provided, which relates to a field of artificial intelligence technology, in particular to a large model, a generative model, an NLP, an intelligent search and other fields. An implementation is to determine a plurality of questioning dimensions according to query information of a subject and historical query information, where each questioning dimension includes a dimension name and a plurality of options; determine a target questioning dimension from the plurality of questioning dimensions according to evaluation values of the plurality of questioning dimensions and whether semantic information of the plurality of questioning dimensions are consistent with semantic information of a query result associated with the query information; and determine the interaction information according to the dimension name and the plurality of options in the target questioning dimension.

Abstract: A bracket structure, a bracket module, and a wall mount module are proposed. The bracket structure includes a board and two sideboards. The two sideboards are connected to two sides of the board respectively. A virtual connection line is extended between the two sideboards. A gap is between the virtual connection line and a first surface of the board. The two sideboards include a first sideboard and a second sideboard. The first sideboard includes an extension part, and a groove is formed between the extension part and the board. The second sideboard includes a fastening part. Thus, the bracket structure of the present disclosure can be applied to various types of wall mount supports.

Abstract: A data management server manages a database storing confidential data, and stores public information and first secret information in a trust zone. A client terminal holds the public information and second secret information. The data management server generates a first public key by using the public information and the first secret information; and transmits the first public key. The client terminal generates the user secret key by using the public information, the second secret information, and the first public key; generates a second public key by using the public information and the second secret information; and transmits the second public key. The data management server generates the user secret key in the trust zone by using the public information, the first secret information, and the second public key; and generate, in the trust zone, key management data for managing the user secret key; and record the key management data.

Abstract: A training method, an inference method, a device, an apparatus, and a medium for a deep learning model are provided. A first model includes a plurality of first parameters, a second model comprises a plurality of second parameters, which is initialized to parameter values of a plurality of target parameters selected from the plurality of first parameters. The training method includes: determining a target loss for both the first model and the second model; adjusting parameter values, including: in response to determining that the target loss indicates that the parameter values of at least part of the target parameters need to be adjusted, synchronously adjusting the parameter values of the corresponding second parameters; and in response to determining that the target loss indicates that the parameter values of at least part of the second parameters need to be adjusted, synchronously adjusting the parameter values of the corresponding target parameters.

Abstract: Methods, systems, and devices for wireless communication are described. A first wireless communications device may receive, from a second wireless communications device, a signal that is indicative of a phase-change pattern applied to communications between the first wireless communications device and the second wireless communication device by a reconfigurable intelligent surface reflecting the communications. The first device may determine the phase-change pattern from the signal. The first device may transmit a message to the second wireless communications device, wherein at least one of a content or a transmission property of the message is based at least in part on the phase-change pattern.

Abstract: The present disclosure provides a system for signal optimization adjustment based on different heat source information. The system includes a plurality of heat source measurers, a first system chip, a second system chip, an electrical interconnection, and a bit error risk evaluator. The first system chip includes a signal transmitter, and the second system chip includes a signal receiver. The second system chip provides an electrical characteristic state of the signal receiver, and a signal adjustment information of the signal transmitter and/or the signal receiver. The bit error risk evaluator performs a signal optimization adjustment for an electrical characteristic of the signal receiver according to the electrical characteristic state. The present disclosure further provides a method for signal optimization adjustment.

Abstract: Receiving a first signaling, the first signaling configuring a first timer; an expiration of the first timer determining that there is a connection problem; starting the first timer, a value of the first timer depending on a first condition; when the first condition is met, a value of the first timer being a first value; when the first condition is not met, a value of the first timer being a second value; herein, the meaning of the phrase that an expiration of the first timer determines that there is a connection problem is: an expiration of the first timer triggers entering RRC_IDLE state, or an expiration of the first timer triggers an RRC connection re-establishment, or RRC reports connection failure to higher layers. The present application enables a more appropriate determination of whether there is a problem with the connection.

Abstract: A target cell statistical method, apparatus and system are provided. A cell image of a blood specimen is acquired by a cell image analysis apparatus. The blood specimen is derived from a blood sample to be tested. A number of target cells and a number of reference cells in the cell image are automatically identified by the cell image analysis apparatus. A number of reference cells in the blood sample to be tested is acquired by the cell image analysis apparatus, and a number of target cells in the blood sample to be tested is calculated by the cell image analysis apparatus, based on the number of target cells and the number of reference cells in the cell image and the number of reference cells in the blood sample to be tested.

Abstract: An electronic device, including a substrate. The substrate includes a plurality of driver units converting a data signal into a driving signal, a plurality of functional elements driven by the driver units, and a plurality of switches coupling to the driver units and the functional elements. The switch is enabled via a prompt signal to activate the driving signal to the functional elements. The driving signal is transmitted from the driver unit to the functional element by switches enabling.

Abstract: A semiconductor device includes a substrate, a stiffener ring over the substrate, and an adhesive ring between the substrate and the stiffener ring. The adhesive ring includes a first part, a second part and a third part disposed between the first part and the second part. The first part and the second part have a first thickness, and the third part has a second thickness greater than the first thickness. The third part of the adhesive ring is covered by the stiffener ring.

Abstract: A battery module, including a positive electrode current collector, a negative electrode current collector, and a plurality of solid-state battery cells are disclosed. The plurality of solid-state battery cells are stacked between the positive electrode current collector and the negative electrode current collector. Adjacent ones of the solid-state battery cells are electrically connected through a current collector coating layer. The solid-state battery cells at both ends are electrically connected to the positive electrode current collector and the negative electrode current collector respectively. A method for preparing the battery module, a battery pack and an electrical apparatus are disclosed. The battery module has low production cost and a simple production process.

Abstract: A semiconductor device including a first semiconductor die, a second semiconductor die, an insulating encapsulation and a warpage control pattern is provided. The first semiconductor die includes an active surface and a rear surface opposite to the active surface. The second semiconductor die is disposed on the active surface of the first semiconductor die. The insulating encapsulation is disposed on the active surface of the first semiconductor die and laterally encapsulates the second semiconductor die. The warpage control pattern is disposed on and partially covers the rear surface of the first semiconductor die.