Patents by Inventor Yuan An

Yuan An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for wafer bonding
    Patent number: 11851325
    Abstract: Methods for improving wafer bonding performance are disclosed herein. In some embodiments, a method for bonding a pair of semiconductor substrates is disclosed. The method includes: processing at least one of the pair of semiconductor substrates, and bonding the pair of semiconductor substrates together. Each of the pair of semiconductor substrates is processed by: performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP). One of the at least one CVD is performed after all CMP performed before bonding.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Wei Chang, Ya-Jen Sheuh, Ren-Dou Lee, Yi-Chih Chang, Yi-Hsun Chiu, Yuan-Hsin Chi
  • Display substrate and driving method conducive to reduce total number of gate scan lines narrowing bezel of display substate
    Patent number: 11854509
    Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a plurality of sub-pixels, a plurality of groups of gate scan signal lines, and a plurality of groups of data lines. Each group of gate scan signal lines includes at least one gate scan signal line, each group of data lines includes n data lines, and the plurality of sub-pixels are arranged in an array; and n is greater than or equal to 2. A group of gate scan signal lines is electrically connected to n rows of sub-pixels. A column of sub-pixels is electrically connected to a group of data lines, and includes a plurality of groups of sub-pixels. Each group of sub-pixels includes n sub-pixels. The n sub-pixels are respectively electrically connected to n data lines in the group of data lines to which this column of sub-pixels is electrically connected.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: December 26, 2023
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Can Yuan, Yongqian Li, Zhidong Yuan
  • Data flow redirection method and system, network device, and control device
    Patent number: 11855887
    Abstract: A data flow redirection method to overcome a disadvantage that a quantity of adjustable data flows is relatively small due to limited space of a flow specification forwarding table. The method includes receiving, by a network device, a control message sent by a control device, where the control message carries redirection routing information of a data flow and a redirection routing indication, the redirection routing indication instructing to convert the redirection routing information of the data flow into a forwarding entry in a target forwarding table, and tablespace of the target forwarding table is greater than tablespace of a flow specification forwarding table of the network device, and converting, by the network device, the redirection routing information of the data flow into the forwarding entry in the target forwarding table according to the redirection routing indication.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: December 26, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Haibo Wang, Shunwan Zhuang, Yuan Rao, Ruiqing Cao
  • Semiconductor device including metal insulator metal capacitor and method of making
    Patent number: 11855126
    Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a circuit layer over the substrate. The semiconductor device further includes a test line electrically connected to the circuit layer. The semiconductor device further includes a capacitor on the substrate. The capacitor includes a first conductor, wherein the first conductor is on a portion of the substrate exposed by the circuit layer. The capacitor further includes an insulator surrounding the first conductor.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yan-Jhih Huang, Chun-Yuan Hsu, Chien-Chung Chen, Yung-Hsieh Lin
  • Touch panel and touch panel operation method thereof
    Patent number: 11853504
    Abstract: A touch panel and a touch panel operation method are disposed. The touch panel includes a flexible element and a controller. The flexible element includes a plurality of sensing electrodes. In a stacked state, a first portion of the flexible element overlaps a second portion of the flexible element. The controller for receiving an active touch signal from the plurality of sensing electrodes in the second portion of the flexible element and a non-active touch signal from the plurality of the sensing electrodes in the first portion of the flexible element. In the stacked state, the controller allows the active touch signal subject to a subsequent process.
    Type: Grant
    Filed: December 13, 2022
    Date of Patent: December 26, 2023
    Assignee: InnoLux Corporation
    Inventors: Yuan-Lin Wu, Tsung-Han Tsai
  • Vertical interconnect features and methods of forming
    Patent number: 11855154
    Abstract: Vertical interconnect structures and methods of forming are provided. The vertical interconnect structures may be formed by partially filling a first opening through one or more dielectric layers with layers of conductive materials. A second opening is formed in a dielectric layer such that a depth of the first opening after partially filling with the layers of conductive materials is close to a depth of the second opening. The remaining portion of the first opening and the second opening may then be simultaneously filled.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Yu Huang, Shih-Che Lin, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang, Feng-Yu Chang, Rueijer Lin, Chen-Yuan Kao
  • Visual mode image comparison
    Patent number: 11854287
    Abstract: A method, a computer program product, and a computer system compare images for content consistency. The method includes receiving a first image including a first document and a second image including a second document. The method includes performing a visual classification analysis on the first image and the second image. The visual classification analysis generates an overlap of the first image with the second image. The method includes determining whether a region of the overlap is indicative of a content inconsistency. As a result of the region of the overlap being indicative of a content inconsistency, the method includes performing a character recognition analysis on a first area of the first image and a second area of the second image corresponding to the region of the overlap to verify the content inconsistency.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: December 26, 2023
    Assignee: International Business Machines Corporation
    Inventors: Li Juan Gao, Zhong Fang Yuan, Tong Liu, Ming Xia Shi, Ming Jin Chen
  • High-throughput optical sectioning imaging method and imaging system
    Patent number: 11852794
    Abstract: A high-throughput optical sectioning imaging method and imaging system. The method includes: modulating a light beam into a modulated light beam capable of being focused on a focal plane of an objective lens and being defocused on a defocusing plane of the objective lens, the modulated light beam having incompletely identical modulated intensities on the focal plane of the objective lens; imaging, in different rows of pixels, a sample under illumination of the modulated light beam to obtain sample images in the different rows of pixels; obtaining focal plane images of sample images in the different rows of pixels by demodulation of the sample images according to a demodulation algorithm. The system includes a light beam modulation module, an imaging module and a demodulation module.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: December 26, 2023
    Assignee: HUST-SUZHOU INSTITUTE FOR BRAINSMATICS
    Inventors: Qingming Luo, Jing Yuan, Qiuyuan Zhong, Rui Jin, Hui Gong
  • Semiconductor structure and method for forming thereof
    Patent number: 11854969
    Abstract: A semiconductor structure and a method for forming the semiconductor structure are disclosed. The method includes the following operations. A first integrated circuit component having a fuse structure is received. A second integrated circuit component having an inductor is received. The second integrated circuit component is bonded to the first integrated circuit component. The inductor is electrically connected to the fuse structure, wherein the inductor is electrically connected to a ground through the fuse structure.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jen-Yuan Chang, Chia-Ping Lai
  • Germanium hump reduction
    Patent number: 11854819
    Abstract: The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hao Fu, Hung-Ju Chou, Che-Lun Chang, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Nung-Che Cheng, Chunyao Wang
  • Fatigue-free bipolar loop treatment to reduce imprint effect in piezoelectric device
    Patent number: 11856862
    Abstract: In some embodiments, the present disclosure relates to a method in which a first set of one or more voltage pulses is applied to a piezoelectric device over a first time period. During the first time period, the method determines whether a performance parameter of the piezoelectric device has a first value that deviates from a reference value by more than a predetermined value. Based on whether the first value deviates from the reference value by more than the predetermined value, the method selectively applies a second set of one or more voltage pulses to the piezoelectric device over a second time period. The second time period is after the first time period and the second set of one or more voltage pulses differs in magnitude and/or polarity from the first set of one or more voltage pulses.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Yuan Shih, Shih-Fen Huang, You-Ru Lin, Yan-Jie Liao
  • Process detection system for rack and server in rack
    Patent number: 11853180
    Abstract: A process detection system for rack and server in rack is disclosed. In the system, a detection device performs a server process detection of L10 stage on servers in a rack, and performs a rack process detection of L11 stage; when the detection device detects that a server in the rack fails in a server process during the server process detection of L10 stage or that the rack fails in a rack process during the rack process detection of L11 stage, the server is repaired, or replaced by a backup server. Before the detection flow is performed continuously, the server process detection of L10 stage is performed on the repaired server, or the backup server not performing the server process detection of L10 stage yet, and then. The detection flow can be performed continuously on the backup server which has performed the server process detection of L10 stage.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: December 26, 2023
    Assignees: Inventec (Pudong) Technology, Corporation Inventec Corporation
    Inventors: Yuan Bai, Fu-Cheng Liu
  • Semiconductor devices and methods of manufacturing thereof
    Patent number: 11855179
    Abstract: A semiconductor device is described. An isolation region is disposed on the substrate. A plurality of channels extend through the isolation region from the substrate. The channels including an active channel and an inactive channel. A dummy fin is disposed on the isolation region and between the active channel and the inactive channel. An active gate is disposed over the active channel and the inactive channel, and contacts the isolation region. A dielectric material extends through the active gate and contacts a top of the dummy fin. The inactive channel is a closest inactive channel to the dielectric material. A long axis of the active channel extends in a first direction. A long axis of the active gate extends in a second direction. The active channel extends in a third direction from the substrate. The dielectric material is closer to the inactive channel than to the active channel.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Ya-Yi Tsai, Shu-Uei Jang, Chih-Han Lin, Shu-Yuan Ku
  • Image sensor device and method
    Patent number: 11855109
    Abstract: A system and method for forming pixels in an image sensor is provided. In an embodiment, a semiconductor device includes an image sensor including a first pixel region and a second pixel region in a substrate, the first pixel region being adjacent to the second pixel region. A first anti-reflection coating is over the first pixel region, the first anti-reflection coating reducing reflection for a first wavelength range of incident light. A second anti-reflection coating is over the second pixel region, the second anti-reflection coating reducing reflection for a second wavelength range of incident light that is different from the first wavelength range.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Yen-Chang Chu, Yeur-Luen Tu, Cheng-Yuan Tsai
  • Systems and methods for simultaneous multi-slice magnetic resonance imaging
    Patent number: 11852707
    Abstract: The present disclosure provides a system for SMS MRI. During each of a plurality of frames, the system may cause an MRI scanner to apply a plurality of PE steps to each of a plurality of slice locations of a subject to acquire echo signals. A phase modulation magnetic field gradient may be applied during each of at least some of the PE steps in the frame. For each frame, the system may reconstruct an aliasing image representative of the slice locations in the frame based on the corresponding echo signals. The system may also generate a plurality of reference slice images based on the aliasing images. The system may further reconstruct at least one slice image based on the aliasing images and the reference slice images. Each of the slice image may be representative of one of the slice locations in one of the frames.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: December 26, 2023
    Assignee: SHANGHAI UNITED IMAGING HEALTHCARE CO., LTD.
    Inventors: Yuan Zheng, Lele Zhao, Jian Xu, Weiguo Zhang
  • Semiconductor device having 2D channel layer
    Patent number: 11855150
    Abstract: A device includes a substrate, a channel layer, a barrier layer, a gate electrode, and source/drain contacts. The channel layer is made of transition metal dichalcogenide. The barrier layer is over the channel layer. The gate electrode is over the barrier layer. The source/drain contacts are on opposite sides of the gate electrode and over the barrier layer.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: December 26, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Yun-Yuan Wang, Chih-Hsiang Hsiao, I-Chih Ni, Chih-I Wu
  • Three-dimensional device structure including substrate-embedded integrated passive device and methods for making the same
    Patent number: 11855130
    Abstract: A three-dimensional device structure includes a die including a semiconductor substrate, an interconnect structure disposed on the semiconductor substrate, a through silicon via (TSV) structure that extends through the semiconductor substrate and electrically contacts a metal feature of the interconnect structure, and an integrated passive device (IPD) embedded in the semiconductor substrate and electrically connected to the TSV structure.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jen-Yuan Chang, Chien-Chang Lee, Chia-Ping Lai, Tzu-Chung Tsai
  • Color filter substrate and method for manufacturing the same, display device
    Patent number: 11856831
    Abstract: The present disclosure provides a color filter substrate and a method for manufacturing the same, and a display device, and the color filter substrate includes a base substrate, a black matrix and a color filter layer located on the base substrate, a quantum dot layer located on a side of the color filter layer away from the base substrate, a barrier layer located on a side of the black matrix away from the base substrate, and a first inorganic layer, and the first inorganic layer at least includes: a first portion located between the color filter layer and the quantum dot layer; a second portion located on the base substrate and between the quantum dot layer and the barrier layer; and a third portion located on a side of the barrier layer away from the base substrate.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: December 26, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Kai Sui, Xiaolei Zhang, Zhongyuan Sun, Yuan Jia, Dapeng Xue, Lubin Shi
  • Holder for portable electronic device
    Patent number: D1009015
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: December 26, 2023
    Assignee: GETAC HOLDINGS CORPORATION
    Inventors: Chun-Hsing Li, Ssu-Yuan Wu
  • Container for wireless stethoscope
    Patent number: D1009261
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: December 26, 2023
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chia-Yuan Chang, Jung-Wen Chang, Kao-Yu Hsu