Abstract: A non-binding-mark sock is provided, including a sock sole and a straight sock leg connected to each other, where the upper portion of the straight sock leg is an opening end. An inner surface of the straight sock leg has at least one transverse annular convex portion near the opening end, where the transverse annular convex portion is sewn by a thread, a plurality of convex points are formed on an inner surface of the transverse annular convex portion along the thread, and the convex points protrude from the inner surface of the straight sock leg.

Abstract: A method includes forming a first semiconductor fin in a substrate, forming a metal gate structure over the first semiconductor fin, removing a portion of the metal gate structure to form a first recess in the metal gate structure that is laterally separated from the first semiconductor fin by a first distance, wherein the first distance is determined according to a first desired threshold voltage associated with the first semiconductor fin, and filling the recess with a dielectric material.

Abstract: Disclosed herein is a hyaluronan conjugate, which includes a hyaluronic acid (HA), a sex hormone, and a linker for coupling one of the disaccharide units of the HA and the sex hormone. Also disclosed herein are the uses of the hyaluronan conjugate in treating or preventing neurodegenerative diseases.

Abstract: A method and structure for providing a pre-deposition treatment (e.g., of a work-function layer) to accomplish work function tuning. In various embodiments, a gate dielectric layer is formed over a substrate and a work-function metal layer is deposited over the gate dielectric layer. Thereafter, a fluorine-based treatment of the work-function metal layer is performed, where the fluorine-based treatment removes an oxidized layer from a top surface of the work-function metal layer to form a treated work-function metal layer. In some embodiments, after performing the fluorine-based treatment, another metal layer is deposited over the treated work-function metal layer.

Abstract: A method includes forming a dummy gate structure over a semiconductor fin, forming a dielectric layer on opposing sides of the dummy gate structure, and removing the dummy gate structure to form a recess in the dielectric layer. The method further includes forming a gate dielectric layer and at least one conductive layer successively over sidewalls and a bottom of the recess, and treating the gate dielectric layer and the at least one conductive layer with a chemical containing fluoride (F).

Abstract: An automatic wire arranging device includes a controller, at least one driving device electrically connected with the controller, a first wire clamping jig connected with the at least one driving device, a second wire clamping jig disposed to the first wire clamping jig, at least one charge-coupled device camera connected with the controller, and at least one puncher pin connected with the at least one driving device. The first wire clamping jig opens a plurality of first clamping slots. Each of the plurality of the first clamping slots opens a through-hole. The second wire clamping jig opens a plurality of second clamping slots. The at least one puncher pin is capable of penetrating through the through-hole and pushing against a core wire to be away from one of the plurality of the first clamping slots and be blocked in one of the plurality of the second clamping slots.

Abstract: A ferroelectric memory is provided. The ferroelectric memory includes a first electrode, a second electrode opposite to the first electrode, at least one ferroelectric layer disposed between the first electrode and the second electrode, and at least one antiferroelectric layer disposed between the first electrode and the second electrode, wherein the antiferroelectric layer is in contact with the ferroelectric layer.

Abstract: A method includes forming a gate dielectric comprising a portion extending on a semiconductor region, forming a barrier layer comprising a portion extending over the portion of the gate dielectric, forming a work function tuning layer comprising a portion over the portion of the barrier layer, doping a doping element into the work function tuning layer, removing the portion of the work function tuning layer, thinning the portion of the barrier layer, and forming a work function layer over the portion of the barrier layer.

Abstract: A display device is provided. The display device includes a display panel, a flexible circuit board, an integrated circuit, and a conductive layer. The flexible circuit board is electrically connected with the display panel and includes a plurality of conductive wires. The integrated circuit is disposed on the flexible circuit board and has a plurality of bumps. The conductive layer is disposed between the integrated circuit and the flexible circuit board and covers a periphery of the integrated circuit. In addition, the conductive layer includes an adhesive and a plurality of conductive particles distributed in the adhesive. Moreover, the bumps are electrically connected with the conductive wires through the conductive particles.

Abstract: A chip package comprises an interposer; an FPGA IC chip over the interposer, wherein the FPGA IC chip comprises a programmable logic block configured to perform a logic operation on its inputs, wherein the programmable logic block comprises a look-up table configured to be provided with multiple resulting values of the logic operation on multiple combinations of the inputs of the programmable logic block respectively, wherein the programmable logic block is configured to select, in accordance with one of the combinations of its inputs, one from the resulting values into its output, and multiple non-volatile memory cells configured to save the resulting values respectively; multiple first metal bumps between the interposer and the FPGA IC chip; and an underfill between the interposer and the FPGA IC chip, wherein the underfill encloses the first metal bumps.

Abstract: The present disclosure provides a semiconductor device with a profiled work-function metal gate electrode. The semiconductor structure includes a metal gate structure formed in an opening of an insulating layer. The metal gate structure includes a gate dielectric layer, a barrier layer, a work-function metal layer between the gate dielectric layer and the barrier layer and a work-function adjustment layer over the barrier layer, wherein the work-function metal has an ordered grain orientation. The present disclosure also provides a method of making a semiconductor device with a profiled work-function metal gate electrode.

Abstract: Semiconductor devices and methods of manufacturing semiconductor devices are provided. In embodiments a treatment process is utilized in order to introduce silicon into a p-metal work function layer. By introducing silicon into the p-metal work function layer, subsequently deposited layers which may comprise diffusable materials such as aluminum can be prevented from diffusing through the p-metal work function layer and affect the operation of the device.

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.

Abstract: A display device is provided. The display device includes a substrate having a first surface and a second surface opposite to the first surface, a plurality of light-emitting units disposed on the first surface of the substrate, and a plurality of conductive structures extending into the substrate from the second surface of the substrate. The plurality of conductive structures are electrically connected to the plurality of light-emitting units.

Abstract: A field-programmable-gate-array (FPGA) IC chip includes multiple first non-volatile memory cells in the FPGA IC chip, wherein the first non-volatile memory cells are configured to save multiple resulting values for a look-up table (LUT) of a programmable logic block of the FPGA IC chip, wherein the programmable logic block is configured to select, in accordance with its inputs, one from the resulting values into its output; and multiple second non-volatile memory cells in the FPGA IC chip, wherein the second non-volatile memory cells are configured to save multiple programming codes configured to control a switch of the FPGA IC chip.

Abstract: A beverage container including a main body, a cover and a sucking unit is provided. The main body includes an interior space for containing a beverage and a top wall having an inner rim which defines an opening communicated with the interior space. The cover removably seals the opening. The sucking unit is mounted within the main body adjacent to the opening and includes a partition wall extending into the interior space to define a channel which fluidly communicates the opening with the interior space. The sucking unit is configured to enable a person to suck up the beverage contained in the interior space through the channel and the opening after removal of the cover.

Abstract: In this invention, a high-accuracy jaw motion tracking system and method using the same are disclosed. The jaw motion tracking system of the invention mainly comprises an eyewear facebow static positioning device, a lower jaw dynamic tracking device and a stereo-vision charge-coupled device (CCD) and can provide information regarding the locations and relative movement of lower and upper jaws. The eyewear facebow static positioning device has several passive and active reflective markers. The lower jaw dynamic tracking device equips with a plural of lightweight light emitting devices. Using OpenCV-based self-developed algorithm and post-iterative compensator, the disclosed system can record the dynamical jaw movement with a high accuracy. The disclosed jaw motion tracking system and related method have minimal occlusal disturbance and provide smooth motion-tracking performance. The disclosed system can be used in clinical dentistry.

Abstract: A method includes forming a first semiconductor fin in a substrate, forming a metal gate structure over the first semiconductor fin, removing a portion of the metal gate structure to form a first recess in the metal gate structure that is laterally separated from the first semiconductor fin by a first distance, wherein the first distance is determined according to a first desired threshold voltage associated with the first semiconductor fin, and filling the recess with a dielectric material.

Abstract: A method for controlling a rotational speed of a motor of a fan is provided in the present application, applicable to an air cleaner and including: calculating a suitable rotational speed range according to a space size of a use environment and a filter gauze type of the air cleaner; calculating a suitable rotational speed according to air quality sensed by a sensor or air quality information; subsequently, adjusting a rotational speed offset according to a relatively high or a relatively low rotational speed preferred by a user; checking whether a range at present is a timing enhancement range; determining that the rotational speed is not higher than a noise upper limit rotational speed; and setting a rotational speed of a motor of a fan.