Patents by Inventor Yuan-Ping Tseng

Yuan-Ping Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR WAFER DESIGNED TO AVOID PROBED MARKS WHILE TESTING
    Publication number: 20020180026
    Abstract: A semiconductor wafer is disclosed for avoiding probed marks while testing. The wafer has a plurality of metal interconnects, each metal interconnect connecting underlying bonding pad, corresponding contact pad and test pad. Each contact pad being outer electrical connection terminal is connected in series by a metal interconnect between test pad and bonding pad, so that the section of the metal interconnect between bonding pad and contact pad enable be tested during probing the test pad. Furthermore, there is no probing mark on the contact pad.
    Type: Application
    Filed: June 5, 2001
    Publication date: December 5, 2002
    Applicant: ChipMOS TECHNOLOGIES INC.
    Inventors: An-Hong Liu, Yuan-Ping Tseng
  • Manufacturing process of semiconductor devices
    Patent number: 6395622
    Abstract: A manufacturing process of semiconductor devices comprises providing at least a wafer, bumping the wafer, testing the wafer, laser repairing, and dicing.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: May 28, 2002
    Assignee: Chipmos Technologies Inc.
    Inventors: An-Hong Liu, Yuan-Ping Tseng