Patents by Inventor Yuan Shen

Yuan Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080084756
    Abstract: A method of performing a power on sequence for a flash memory includes applying device voltage to the flash memory and loading nonvolatile memory data and nonvolatile memory complementary data to a read data register and a read complementary data register, respectively. The nonvolatile memory data and the nonvolatile memory complementary data are compared with the read data register and the read complementary data register during the power on sequence, e.g., after initial power up or power on reset (POR). When the comparison determines a mismatch, the loading of the nonvolatile memory data and the nonvolatile memory complementary data to the read data register and the read complementary data register, respectively, is repeated.
    Type: Application
    Filed: October 5, 2006
    Publication date: April 10, 2008
    Applicant: Macronix International Co., Ltd.
    Inventors: Jian-Yuan Shen, Chi-Ling Chu, Chou-Ying Yang
  • Publication number: 20080084759
    Abstract: A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is for outputting a bias voltage to the comparator, and the comparator outputs a bit value according to comparison of the bias voltage and the reference voltage. The memory cell is connected to the bias unit via a first switch. The cycling cell is connected to the bias unit via a second switch. The compensation cell is connected to the bias unit via a third switch. The control unit is for controlling the cycling cell and the compensation cell according to the bit value.
    Type: Application
    Filed: November 28, 2007
    Publication date: April 10, 2008
    Inventors: Chi-Ling Chu, Hsien-Wen Hsu, Jian-Yuan Shen
  • Patent number: 7342844
    Abstract: A method of performing a power on sequence for a flash memory includes applying device voltage to the flash memory and performing an error bit check on at least one memory cell in the flash memory during initial power up. The at least one memory cell in the flash memory is read only after the error bit check determines that the device voltage is stable. The data read from the at least one memory cell is loaded to an information register.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: March 11, 2008
    Assignee: Macronix International Co., Ltd.
    Inventors: Jian-Yuan Shen, Chi-Ling Chu, Chou-Ying Yang
  • Publication number: 20080031070
    Abstract: A method of performing a power on sequence for a flash memory includes applying device voltage to the flash memory and performing an error bit check on at least one memory cell in the flash memory during initial power up. The at least one memory cell in the flash memory is read only after the error bit check determines that the device voltage is stable. The data read from the at least one memory cell is loaded to an information register.
    Type: Application
    Filed: August 3, 2006
    Publication date: February 7, 2008
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Jian-Yuan Shen, Chi-Ling Chu, Chou-Ying Yang
  • Publication number: 20080014686
    Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 17, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen
  • Patent number: 7310261
    Abstract: A nitride read-only memory (NROM) device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is for outputting a bias voltage to the comparator, and the comparator outputs a bit value according to comparison of the bias voltage and the reference voltage. The memory cell is connected to the bias unit via a first switch. The cycling cell is connected to the bias unit via a second switch. The compensation cell is connected to the bias unit via a third switch. The control unit is for controlling the cycling cell and the compensation cell according to the bit value.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: December 18, 2007
    Assignee: Macronix International Co., Ltd.
    Inventors: Chi-Ling Chu, Hsien-Wen Hsu, Jian-Yuan Shen
  • Patent number: 7262999
    Abstract: An ultra cycling nitride read only memory (NROM) device is coupled to a NROM array such that both bits of the ultra cycling NROM device will be erased when all NROM devices of the NROM array are erased. The ultra cycling NROM device is then programmed at its right bit. A threshold voltage difference will be obtained for the ultra cycling NROM device for the un-programmed left bit. Next, a cycling number is obtained based on the threshold voltage difference for the ultra cycling NROM device. A threshold voltage shift can be found based on the cycling number for the NROM array. Finally, an erase voltage will be calculated according to the threshold voltage shift for the NROM array. If the NROM array is programmed again, the erase voltage will be applied to un-programmed NROM devices of the NROM array to further reduce the threshold voltages.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: August 28, 2007
    Assignee: Macronix International Co., Ltd.
    Inventors: Jian-Yuan Shen, Hsien-Wen Hsu, Chi-Ling Chu
  • Publication number: 20070084355
    Abstract: An improved structure of a container for making tea or coffee is essentially comprised of a body, a bottom lid and a separation container; the body containing an accommodation space with an opening at one end or two opening respectively on both ends, and the opening being covered by the bottom lid; the bottom lid being having a locking unit; an inner thread being provided on the inner wall of the bottom lid, a sealing member being disposed between the locking unit and the inner wall of the bottom lid; and the separation container containing a space having one end disposed with a connection part incorporated to the locking unit from the bottom lid to secure the separation container.
    Type: Application
    Filed: October 18, 2005
    Publication date: April 19, 2007
    Inventor: Tzu Yuan Shen
  • Publication number: 20070008506
    Abstract: A projector apparatus has an electrically conductive housing that includes a lower housing part and an upper housing part coupled to the lower housing part for covering the lower housing part, an internal projector module mounted in the housing, a first grounding component provided between the internal projector module and the upper housing part so as to establish a first grounding path between the internal projector module and the housing, and a second grounding component provided between the internal projector module and the lower housing part so as to establish a second grounding path between the internal projector module and the housing.
    Type: Application
    Filed: June 23, 2006
    Publication date: January 11, 2007
    Applicant: Coretronic Corporation
    Inventors: Chi-Yu Meng, Chin-Long Tien, Jung-Chi Chen, Ying-Yuan Shen
  • Publication number: 20060268617
    Abstract: A nitride read-only memory (NROM) device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is for outputting a bias voltage to the comparator, and the comparator outputs a bit value according to comparison of the bias voltage and the reference voltage. The memory cell is connected to the bias unit via a first switch. The cycling cell is connected to the bias unit via a second switch. The compensation cell is connected to the bias unit via a third switch. The control unit is for controlling the cycling cell and the compensation cell according to the bit value.
    Type: Application
    Filed: May 26, 2006
    Publication date: November 30, 2006
    Inventors: Chi-Ling Chu, Hsien-Wen Hsu, Jian-Yuan Shen
  • Publication number: 20060109718
    Abstract: An ultra cycling nitride read only memory (NROM) device is coupled to a NROM array such that both bits of the ultra cycling NROM device will be erased when all NROM devices of the NROM array are erased. The ultra cycling NROM device is then programmed at its right bit. A threshold voltage difference will be obtained for the ultra cycling NROM device for the un-programmed left bit. Next, a cycling number is obtained based on the threshold voltage difference for the ultra cycling NROM device. A threshold voltage shift can be found based on the cycling number for the NROM array. Finally, an erase voltage will be calculated according to the threshold voltage shift for the NROM array. If the NROM array is programmed again, the erase voltage will be applied to un-programmed NROM devices of the NROM array to further reduce the threshold voltages.
    Type: Application
    Filed: November 24, 2004
    Publication date: May 25, 2006
    Inventors: Jian-Yuan Shen, Hsien-Wen Hsu, Chi-Ling Chu
  • Cup
    Publication number: 20060045936
    Abstract: A cup for a user to directly drink the beverage in the cup. The cup includes a main body and an isolating member disposed in the main body for dividing the interior of the cup into two isolated spaces. The isolating member serves to stop the beverage material, while permitting the beverage to flow through the isolating member from one isolated space to the other.
    Type: Application
    Filed: August 24, 2004
    Publication date: March 2, 2006
    Inventor: Tzu-Yuan Shen
  • Publication number: 20050256009
    Abstract: This invention provides a laser trimming method for tuning the frequency of a spiral resonator, and for improving the characteristics of a high temperature superconductor filter comprised of high temperature superconductor spiral resonators, by tuning the individual high temperature superconductor spiral resonators. This invention also provides a method for tuning the resonance frequency of a high temperature superconductor planar coil. This invention also provides a laser ablation process for creating high temperature superconductor circuit elements.
    Type: Application
    Filed: November 18, 2004
    Publication date: November 17, 2005
    Inventors: Robby Alvarez, Calixto Estrada, Jiunn-Sheng Guo, Paul Martin, James McCambridge, Robert Rossi, Zhi-Yuan Shen
  • Publication number: 20050228780
    Abstract: A method and apparatus for generating search results including searching by subdomain and providing sponsored results by subdomain is provided. A search system according to embodiments of the present invention analyzes search queries to determine if they are to be routed to subdomains and presents results include sponsored hits sponsored on a subdomain by subdomain basis.
    Type: Application
    Filed: April 5, 2004
    Publication date: October 13, 2005
    Applicant: Yahoo! Inc.
    Inventors: Ali Diab, Scott Gatz, Shyam Kapur, David Ku, Chuck Kung, Phu Hoang, Qi Lu, Lynne Pogue, Yuan Shen, Norman Shi, Thai Tran, Eckart Walther, Jeff Weiner
  • Patent number: 6901847
    Abstract: A container has a body having a receiving space therein and a first opening and a second opening at opposite sides of the receiving space. The first opening has a diameter smaller than that of the second opening. A first cap is detachably secured to the body to close the first opening. On an interior side of the first cap has a first inner threaded section, a pad, which is made of a soft material for waterproof, a disk having a post and an aperture and a second inner threaded section. A filter cup is detachably mounted in the received space of the body adjacent to the second opening. The filter cup has an opening facing the second opening of the body and a protrusion on an exterior surface thereof to position the filter cup at the second opening of the body.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: June 7, 2005
    Inventor: Tzu Yuan Shen
  • Patent number: 6786137
    Abstract: A container for making tea includes a body having a receiving space defined therein, and extending therethrough to define a first opening in a top and a second opening in a bottom. A resilient pad is attached to the top of the body for closing the first opening. A seam is centrally defined in the resilient pad for exhausting expanding hot air in the body. A cap is detachably mounted to the top of the body to hold the resilient pad in place. The cap has a through hole centrally defined therein and aligning with the seam in the resilient pad. A filter cup is inversely received in the receiving space corresponding to the second opening for containing tea leaves. A cover is detachably mounted to the bottom of the body for closing the second opening and holding the filter cup in place.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: September 7, 2004
    Inventor: Tzu-Yuan Shen
  • Patent number: 6751489
    Abstract: High temperature superconductor mini-filters and mini-multiplexers utilize self-resonant spiral resonators and have very small size and very low cross-talk between adjacent channels.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: June 15, 2004
    Assignee: E. I. du Pont de Nemours and Company
    Inventor: Zhi-Yuan Shen
  • Patent number: 6711912
    Abstract: This invention relates generally to cryogenic devices and, more particularly, to cryogenic devices of very small size based on superconducting elements, low thermal transmission interconnects and low dissipated power semiconductor.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: March 30, 2004
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Daniel B. Laubacher, Zhi-Yuan Shen, Philip Shek Wah Pang, Alan Lauder, Dean Face
  • Patent number: 6688127
    Abstract: This invention relates generally to cryogenic devices and, more particularly, to cryogenic devices of very small size based on superconducting elements, low thermal transmission interconnects and low dissipated power semiconductor
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: February 10, 2004
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Daniel B. Laubacher, Zhi-Yuan Shen, Philip Shek Wah Pang, Alan Lauder
  • Patent number: D560097
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: January 22, 2008
    Inventor: Tzu Yuan Shen