Abstract: A method for fabricating on-chip spacers for a TFT panel exposes a photoresist layer on top of the TFT panel using two exposure processes, one through the bottom of the TFT and the other through a mask over the TFT panel. The exposure process through the bottom exposes all photoresist covering windows on the TFT panel and leaves all photoresist corresponding to an opaque grid corresponding a TFT driving circuit. A second exposure process through a mask above the photoresist leaves part of the photoresist in the opaque grid unexposed. The exposed photoresist is removed leaving on-chip spacers only on the opaque grid. Therefore, the on-chip spacers can not affect the display quality and can be easily formed on a high dpi TFT panel.

Abstract: A method of forming a thin film transistor on a transparent plate. A silicon layer having an active area is provided. A first ion implantation is performed to form a deeper doped region in the silicon layer. A second ion implantation is performed to form a shallower doped region in part of the silicon layer. A transistor structure is formed on the silicon layer located at the active area. A glass plate is formed on the transistor structures. An annealing process whose temperature is about 200° C.˜600° C. is performed to peel the silicon layer from the deeper doped region and the shallower doped region, and to form a silicon thin film adhered to the transistor structure. Thus, the silicon thin film transistor can be formed on the glass plate without a high temperature process.

Abstract: A method of forming a thin film transistor on a transparent plate. A silicon layer having an active area is provided. A first ion implantation is performed to form a deeper doped region in the silicon layer. A second ion implantation is performed to form a shallower doped region in part of the silicon layer. A transistor structure is formed on the silicon layer located at the active area. A glass plate is formed on the transistor structure. An annealing process whose temperature is about 200° C.˜600° C. is performed to peel the silicon layer from the deeper doped region and the shallower doped region, and to form a silicon thin film adhered to the transistor structure. Thus, the silicon thin film transistor can be formed on the glass plate without a high temperature process.

Abstract: A method of forming a thin film transistor on a transparent plate. A silicon layer having an active area is provided. A first ion implantation is performed to form a deeper doped region in the silicon layer. A second ion implantation is performed to form a shallower doped region in part of the silicon layer. A transistor structure is formed on the silicon layer located at the active area. A glass plate is formed on the transistor structure. An annealing process whose temperature is about 200° C.˜600° C. is performed to peel the silicon layer from the deeper doped region and the shallower doped region, and to form a silicon thin film adhered to the transistor structure. Thus, the silicon thin film transistor can be formed on the glass plate without a high temperature process.

Abstract: A method for fabricating on-chip spacers for a TFT panel exposes a photoresist layer on top of the TFT panel using two exposure processes, one through the bottom of the TFT and the other through a mask over the TFT panel. The exposure process through the bottom exposes all photoresist covering windows on the TFT panel and leaves all photoresist corresponding to an opaque grid corresponding a TFT driving circuit. A second exposure process through a mask above the photoresist leaves part of the photoresist in the opaque grid unexposed. The exposed photoresist is removed leaving on-chip spacers only on the opaque grid. Therefore, the on-chip spacers can not affect the display quality and can be easily formed on a high dpi TFT panel.

Abstract: A method of forming a thin film transistor on a transparent plate. A silicon layer having an active area is provided. A first ion implantation is performed to form a deeper doped region in the silicon layer. A second ion implantation is performed to form a shallower doped region in part of the silicon layer. A transistor structure is formed on the silicon layer located at the active area. A glass plate is formed on the transistor structures. An annealing process whose temperature is about 200° C.˜600° C. is performed to peel the silicon layer from the deeper doped region and the shallower doped region, and to form a silicon thin film adhered to the transistor structure. Thus, the silicon thin film transistor can be formed on the glass plate without a high temperature process.

Abstract: A reflective type thin film transistor display device and methods for fabricating the same is disclosed. The fabrication process includes a first substrate, multiple layers of thin film transistor built on the top layer over the substrate, multiple layers of metal reflector on the periphery of the thin film transistor, and a second substrate, wherein the metal reflector and the thin film transistor are transferred onto the second substrate by a back-end fabrication process to cause the thin film transistor to be exposed on the back end. The metal reflector is formed in between oxide layers and coated with aluminum material on the back side. Since the back side of the reflective display device is not subjected to any etching process or oxidation at high temperature, it is fully flat for a reflective surface after turning over by the back-end fabrication process.

Abstract: A method for fabricating multilayer storage capacitors of an LCD panel is disclosed. For a two-layer storage capacitor, the structure includes a thin film transistor region over a first substrate, a pixel electrode disposed on the periphery of the thin film transistor region, and a plurality of oxide layers. The oxide layers have data lines and gate lines, wherein the crossover of each gate line and data line corresponds to the position of a pixel electrode. An oxide layer can be added between the pixel electrode and the first substrate for creating a three-layer storage capacitor, wherein the shielding layer or semiconductor active layer is connected to the gate line. Having a small interlayer gap between the transparent electrode layer and the first metal layer and no cross talk, the capacitance of the storage capacitor can be considerably increased.

Abstract: The present invention makes it possible to transfer thin film devices such as integrated semiconductor and optical components from a first substrate onto a second substrate through a thermal process at high temperature, without degradation of device performance. Other devices can be fabricated thereafter on the other side of the second substrate. Since the semiconductor and optical components can be transferred onto the second substrate in a single-step thermal process, in comparison with prior art the number of transfer substrates needed in the fabrication process can be effectively reduced, thus simplifying the fabrication process and realizing cost reduction.

Abstract: The present invention makes it possible to transfer thin film devices such as integrated semiconductor and optical components from a first substrate onto a second substrate through a thermal process at high temperature, without degradation of device performance. Other devices can be fabricated thereafter on the other side of the second substrate. Since the semiconductor and optical components can be transferred onto the second substrate in a single-step thermal process, in comparison with prior art the number of transfer substrates needed in the fabrication process can be effectively reduced, thus simplifying the fabrication process and realizing cost reduction.

Abstract: A panel is implemented by a method from bottom to top includes a display panel, an optical element film formed on the display panel and a semiconductor element film formed on the optical element film. The method discloses that the semiconductor element film is first formed on a temporary substrate and then the optical element film is further formed on the semiconductor element film. When the display panel is bonded on the optical element film the temporary substrate is removed from the semiconductor element film. Therefore, the semiconductor element film and the optical element film are integrated the same display panel.

Abstract: A method of forming a thin film transistor on a transparent plate. A silicon layer having an active area is provided. A first ion implantation is performed to form a deeper doped region in the silicon layer. A second ion implantation is performed to form a shallower doped region in part of the silicon layer. A transistor structure is formed on the silicon layer located at the active area. A glass plate is formed on the transistor structure. An annealing process whose temperature is about 200° C.˜600° C. is performed to peel the silicon layer from the deeper doped region and the shallower doped region, and to form a silicon thin film adhered to the transistor structure. Thus, the silicon thin film transistor can be formed on the glass plate without a high temperature process.

Abstract: A full-color LED display includes red, green and blue LED elements. A first substrate is used to form red and green LED elements which are then covered by a first passivation layer. A second substrate is bonded to the passviation layer and polished as a thin substrate layer. A blue LED element is fabricated on the thin substrate layer. The three LED elements are then covered by a second passivation layer to construct a full-color LED device. A full-color, high resolution and high brightness LED display is formed by a plurality of full-color LED devices arranged in rows and columns in a matrix form.

Abstract: A method for manufacturing thin film transistor panels in order to obviate the lowstability of conventional laser annealing processes, and the resultant low quality of the produced polycrystal silicon thin film. According to the method of the invention, form a transparent insulator on the front surface of a silicon substrate. Form a thin film transistor structure and transparent electrode on the upper surface of the transparent insulator. Bond a transparent substrate onto the front surface of the silicon substrate. After that, remove a portion of the silicon substrate by polishing or etching the back of the silicon substrate to obtained a transparent thin film transistor panel. The transparent electrode can also be formed on the bottom surface of the transparent insulator. Also, the transparent substrate can be bonded onto the back of the silicon substrate. Then reduce the thickness of the silicon substrate to generate a crystal silicon thin film.

Abstract: A method of forming a flexible thin film transistor (TFT) display device. A metal foil serving as a flexible metal substrate of a display device is provided, wherein the metal foil is an aluminum alloy foil, a titanium foil or a titanium alloy foil. The thickness of the metal foil is 0.05˜0.8 mm. An insulation layer is formed on the flexible metal substrate. A thin film transistor (TFT) array is formed on the insulation layer. In addition, the aluminum alloy foil can include magnesium of 0.01˜1% wt and/or silicon of 0.01˜1% wt and the titanium alloy foil can include aluminum of 0.01˜20% wt and/or molybdenum of 0.01˜20% wt.

Abstract: A polysilicon thin film transistor with a self-aligned LDD structure has a polysilicon layer formed on a transparent insulating substrate. The polysilicon layer consists of a channel region, an LDD structure on two sides of the channel region, and a source/drain region on two sides of the LDD structure. A gate insulating layer is formed on the polysilicon layer, a first metal layer is patterned on the gate insulating layer to cover the channel region, and a second metal layer is patterned on the first metal layer to cover the channel region.

Abstract: A manufacturing method of a thin film transistor (TFT) having low serial impedance is described. The method uses a back-side exposure and uses the active area as a hard mask; therefore, photomask usage may be reduced. On the other hand, a Si-Ge layer is used to react with the conductive layer deposited thereon after for forming a Ge-salicide layer. The method may reduce the required temperature of forming a Ge-salicide layer and the serial impedance.

Abstract: A method of forming a thin film transistor (TFT) on a plastic sheet. An etching stop layer is formed on a glass substrate. A buffer layer is formed on the etching stop layer. At least one TFT structure is formed on part of the buffer layer. A passivation layer is formed on the TFT structure and the buffer layer. A plastic layer is formed on the passivation layer. The glass substrate and the etching stop layer are removed. Thus, the invention can transfer the TFT structure from the glass plate to the plastic sheet without damage from the process temperature of the TFT.

Abstract: A method of forming a thin film transistor on a transparent plate. A silicon layer having an active area is provided. A first ion implantation is performed to form a deeper doped region in the silicon layer. A second ion implantation is performed to form a shallower doped region in part of the silicon layer. A transistor structure is formed on the silicon layer located at the active area. A glass plate is formed on the transistor structure. An annealing process whose temperature is about 200° C.˜600° C. is performed to peel the silicon layer from the deeper doped region and the shallower doped region, and to form a silicon thin film adhered to the transistor structure. Thus, the silicon thin film transistor can be formed on the glass plate without a high temperature process.

Abstract: A manufacturing method of a thin film transistor (TFT) having low serial impedance is described. The method uses a back-side exposure and uses the active area as a hard mask; therefore, photomask usage may be reduced. On the other hand, a Si—Ge layer is used to react with the conductive layer deposited thereon after for forming a Ge-salicide layer. The method may reduce the required temperature of forming a Ge-salicide layer and the serial impedance.