Patents by Inventor Yuan Wang

Yuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230240344
    Abstract: The present invention relates to a sweetener liquid for preventing and relieving intestinal sugar alcohol intolerance. The sweetener liquid per 100ml includes 0.01 to 0.04 g of low-esterification pectin, 0.01 g to 0.1 g of ?-carrageenan, 0.01 g to 0.3 g of locust bean gum, 30 g to 60 g of xylitol, 5 g to 15 g of maltitol and 1 g to 10 g of sorbitol and remaining water; the low-esterification pectin is a pectin concentrate including, based on parts by weight, 15 parts of calcium citrate, 60 parts of low-molecular-weight pectin, 85 parts of ethylene glycol, 5 parts of carboxymethyl cellulose sodium and 30 parts of sodium citrate; the low-molecular-weight pectin includes a low-sugar fruit juice and a lemon juice; the sweetener liquid has a pH of 5-6.5 and a viscosity of 0.1 to 25 mPa•S. The present invention further provides a method of preparing a sweetener liquid and an application thereof.
    Type: Application
    Filed: November 30, 2021
    Publication date: August 3, 2023
    Inventors: Qile Zuo, Feifei Han, Xuan Zhu, Xinping Cheng, Mian Li, Lihua Shi, Wenyao Zhang, Yuan Wang
  • Publication number: 20230238240
    Abstract: A method for fabricating a semiconductor device is provided. The method includes depositing a gate dielectric layer over a semiconductor substrate; depositing a work function layer over the gate dielectric layer by an atomic layer deposition (ALD) process, wherein the work function layer comprises a metal element and a nonmetal element, and the ALD process comprises a plurality of cycles. Each of the cycles comprises: introducing a precursor gas comprising the metal element to a chamber to form a precursor surface layer on the semiconductor substrate in the chamber; purging a remaining portion of the precursor gas away from the chamber; performing a reactive-gas plasma treatment using a reactive-gas plasma comprising the nonmetal element to convert the precursor surface layer into a monolayer of the work function layer; purging a remaining portion of the reactive-gas plasma away from the chamber, and performing an inert-gas plasma treatment in the chamber.
    Type: Application
    Filed: May 4, 2022
    Publication date: July 27, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chun-Yuan WANG, Miin-Jang CHEN
  • Publication number: 20230236967
    Abstract: A memory device, for executing an anneal computation with first state and a second state. The memory device includes a first memory array, a second memory array, a control circuit, a sensing circuit and a processing circuit. the control circuit selects a first horizontal row of memory units from the first memory array, and selects a second horizontal row of memory units from the second memory array. The sensing circuit computes a local energy value of the first state according to the current generated by the memory units of the first horizontal row, and computes a local energy value of the second state according to the current generated by the memory units of the second horizontal row. The processing circuit updates the first state and/or the second state according to the local energy value of the first state and the local energy value of the second state.
    Type: Application
    Filed: April 18, 2022
    Publication date: July 27, 2023
    Inventors: Yun-Yuan WANG, Cheng-Hsien LU, Ming-Hsiu LEE
  • Publication number: 20230218721
    Abstract: An incretin analogue, a preparation method therefor, and the use thereof. The incretin analogue has a GLP-1R/GIPR/GCGR agonist activity, is a triple agonist, and can be used for lowering blood glucose, reducing fat and reducing weight.
    Type: Application
    Filed: February 26, 2021
    Publication date: July 13, 2023
    Applicants: ZHEJIANG DOER BIOLOGICS CO., LTD., ZHEJIANG HEZE PHARMACEUTICAL TECHNOLOGY CO., LTD.
    Inventors: YANSHAN HUANG, YONGLU CHEN, WENWEN DUAN, XIAOFANG WEN, YUANYUAN LIU, YUAN WANG, SHIMEI SHENG, YING LIU, SHENG NI, MINGYUE ZHU, CHEN FANG, PENG SUN
  • Publication number: 20230223710
    Abstract: An antenna structure includes a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, a fifth radiation element, and a dielectric substrate. The first radiation element has a feeding point. The second radiation element is coupled to the first radiation element. The third radiation element is coupled to a first grounding point. The third radiation element is further coupled through the fourth radiation element to a second grounding point. The fifth radiation element is coupled to the third radiation element and the fourth radiation element. The fifth radiation element is adjacent to the second radiation element. The first radiation element and the second radiation element are at least partially surrounded by the third radiation element, the fourth radiation element, and the fifth radiation element.
    Type: Application
    Filed: February 22, 2022
    Publication date: July 13, 2023
    Inventors: Chun-I CHEN, Chun-Yuan WANG, Yu-Chen ZHAO, Chung-Ting HUNG
  • Publication number: 20230215896
    Abstract: A sensor package structure is provided. The sensor package structure includes a substrate, a sensor chip, a ring-shaped wall, and a light-permeable layer. The substrate has a first surface and a second surface that is opposite to the first surface. The first surface of the substrate has a chip-bonding region and a connection region that surrounds the chip-bonding region, and the substrate has a plurality of protrusions arranged in the connection region. The sensor chip is disposed on the chip-bonding region of the substrate and is electrically coupled to the substrate. The ring-shaped wall is formed on the connection region of the substrate, and the protrusions of the substrate are embedded in and gaplessly connected to the ring-shaped wall. The light-permeable layer is disposed on the ring-shaped wall, and the light-permeable layer, the ring-shaped wall, and the substrate jointly define an enclosed space therein.
    Type: Application
    Filed: April 14, 2022
    Publication date: July 6, 2023
    Inventors: CHIEN-CHEN LEE, LI-CHUN HUNG, CHIEN-YUAN WANG
  • Publication number: 20230215962
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Application
    Filed: February 23, 2023
    Publication date: July 6, 2023
    Inventors: Shih-Yuan WANG, Shih-Ping WANG
  • Publication number: 20230193215
    Abstract: The present invention relates to the field of genetic engineering, particularly to a glucose oxidase mutant having improved thermal stability, gene and application thereof. The present invention provides several glucose oxidase GOD mutants with high catalytic efficiency and improved thermal stability, which breaks the barrier of low enzyme activity and poor stability and is suited well to meet the requirements of application to the fields of food, medicine, feed and textile industry, and has a very broad application prospect.
    Type: Application
    Filed: November 13, 2019
    Publication date: June 22, 2023
    Inventors: Bin YAO, Tao Tu, Xiao JIANG, Huiying LUO, Xiaoyun SU, Huoqing HUANG, Yaru WANG, Yingguo BAI, Yuan WANG, Xia SHI, Jie ZHANG
  • Publication number: 20230197744
    Abstract: A sensor package structure includes a substrate, a sensor chip disposed on the substrate, a light-curing layer disposed on the sensor chip, a light-permeable layer disposed on the light-curing layer, a shielding layer being ring-shaped and disposed on an inner surface of the light-permeable layer, and a package body that is formed on the substrate. A projection region defined by orthogonally projecting the shielding layer onto a top surface of the sensor chip surrounds a sensing region of the sensor chip. A portion of the shielding layer in contact with the light-curing layer defines a ring-shaped arrangement region that has at last one light-permeable slot. The sensor chip, the light-curing layer, the light-permeable layer, and the shielding layer are embedded in the package body that exposes at least part of the light-permeable layer.
    Type: Application
    Filed: June 29, 2022
    Publication date: June 22, 2023
    Inventors: CHIA-SHUAI CHANG, CHIEN-CHEN LEE, CHIEN-YUAN WANG, YI-CHIH LEE, LI-CHUN HUNG
  • Patent number: 11683748
    Abstract: Embodiments of this application provide a network slice selection method. The method includes: A first network device obtains user characteristic information of a current user of a first terminal, where the user characteristic information includes one or more pieces of single network slice selection assistance information S-NSSAI corresponding to the current user. The first network device determines, based on the user characteristic information, allowed NSSAI corresponding to the first terminal, where the allowed NSSAI includes the one or more pieces of S-NSSAI; or when the first network device does not support serving a network slice indicated in the one or more pieces of S-NSSAI, the first network device determines, based on the one or more pieces of S-NSSAI, a second network device that supports serving the network slice indicated in the one or more pieces of S-NSSAI.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: June 20, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Yuan Wang
  • Patent number: 11680255
    Abstract: The present invention relates to the field of genetic engineering, particularly to a glucoamylase TIGa15, gene and application thereof. Said glucoamylase comprises the amino acid sequence of SEQ ID NO:1 or SEQ ID NO:2 and has the excellent enzymic properties, which can be applied to feed, food, and medicine industries, can be industrially produce with the genetic engineering technics.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: June 20, 2023
    Inventors: Huiying Luo, Bin Yao, Yujie Guo, Tao Tu, Yuan Wang, Huoqing Huang, Yingguo Bai, Xiaoyun Su, Yaru Wang, Kun Meng
  • Publication number: 20230189102
    Abstract: A communication method and apparatus are disclosed. The method includes a first terminal device determines a candidate relay device, where the candidate relay device includes at least one relay device, and sends a first message to a second terminal device, where the first message is used to request to change a relay device, and the first message includes an identifier of the candidate relay device. In the foregoing manner, the first terminal device may determine the candidate relay device, and send the first message to the second terminal device, so that the second terminal device can determine a second relay device from the candidate relay device based on the first message. In this way, a relay device between the first terminal device and the second terminal device can be changed from a first relay device to the second relay device.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 15, 2023
    Inventors: Shengfeng Xu, Yanmei Yang, Yuan Wang
  • Publication number: 20230187543
    Abstract: A method for manufacturing a semiconductor device includes forming a gate trench over a semiconductor fin, the gate trench including an upper portion and a lower portion. The method includes sequentially forming one or more work function layers, a capping layer, and a glue layer over the gate trench. The glue layer includes a first sub-layer and a second sub-layer that have respective different etching rates with respect to an etching solution. The method includes removing the second sub-layer while leaving a first portion of the first sub-layer filled in the lower portion of the gate trench.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 15, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jian-Jou Lian, Tzu Ang Chiang, Ming-Hsi Yeh, Chun-Neng Lin, Po-Yuan Wang, Chieh-Wei Chen
  • Publication number: 20230188393
    Abstract: Methods, a network node, a wireless device, and computer readable storage medium for 16-QAM based communication are disclosed. A method includes: determining a resource allocation for 16-QAM based communication for the wireless device; and indicating, to the wireless device, a TBS and/or a number of allocated time-domain resources that are associated with the determined resource allocation using a TBS index and a time-domain resource index, wherein the TBS index and the time-domain resource index are determined in accordance with a table for allocating transport blocks and/or number of allocated time-domain resources for the 16-QAM based communication.
    Type: Application
    Filed: April 22, 2021
    Publication date: June 15, 2023
    Inventors: Gerardo Agni MEDINA ACOSTA, Liping ZHANG, Jie CHEN, Yuan WANG
  • Patent number: 11673136
    Abstract: The present disclosure provides chips, devices and methods for sequencing a biomolecule. The biomolecule may be DNA, RNA. a protein, or a peptide. The chip comprises a substrate; a first and second fluid chamber; fluid channels connecting the first and second fluid chamber; a first and second electrode disposed on opposing sides of the central fluid channel and having a nanogap therebetween, wherein the width of the nanogap is modulated by confined electrochemical deposition; and a passivation layer disposed on top of the first and second electrodes and the fluid channel.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: June 13, 2023
    Assignee: Arizona Board of Regents on Behalf of Arizona State University
    Inventors: Quan Qing, Yuan Wang, Joshua Sadar
  • Publication number: 20230178451
    Abstract: A method of manufacturing an electronic package is provided, in which a package module including a routing structure is stacked on a carrier structure via a plurality of conductive elements, a heat dissipation member covers a part of a surface of the routing structure, and an electronic module is disposed on another part of the surface of the routing structure, so that the routing structure is formed with at least one heat dissipation pad bonded to the heat dissipation member, such that the heat energy of the electronic module and the package module can be dissipated via the heat dissipation pad and the heat dissipation member.
    Type: Application
    Filed: September 14, 2022
    Publication date: June 8, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hsin-Jou Lin, Lung-Yuan Wang, Feng Kao, Chiu-Ling Chen
  • Publication number: 20230178757
    Abstract: The invention pertains to the field of catalysts. Disclosed is a method for preparing an oxygen reduction catalyst employing graphite of a negative electrode of a waste battery. The method comprises the following steps: (1) recovering graphite slag from a waste battery, then performing heat treatment on the graphite slag; (2) performing ball-milling and mixing on the treated graphite slag, an iron salt, and a nitrogenous organic compound to acquire a catalyst precursor; (3) performing carbonization treatment on the catalyst precursor in an inert gas atmosphere to acquire a carbon-based mixture comprising iron and nitrogen; and (4) dissolving the carbon-based mixture comprising iron and nitrogen in an acid solution, performing filtration and drying, performing carbonization treatment again in an inert gas atmosphere, so as to acquire an oxygen reduction catalyst employing graphite of a negative electrode of a waste battery.
    Type: Application
    Filed: April 21, 2021
    Publication date: June 8, 2023
    Inventors: Ke Zou, Dingshan Ruan, Changdong Li, Yuan Wang, Fengmei Wang, Lin Wu
  • Publication number: 20230179393
    Abstract: A node synchronization method, includes: receiving a synchronization message by a first synchronization node in a network; determining whether to update a first local time of the first synchronization node according to the synchronization message by the first synchronization node; updating the first local time according to a synchronization time of the synchronization message by the first synchronization node when determining to update the first local time; and updating the synchronization time of the received synchronization message with the current first local time and forwarding the updated synchronization message by the first synchronization node.
    Type: Application
    Filed: June 17, 2022
    Publication date: June 8, 2023
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Xiao-Dan Xu, Li-Bin Yang, Ping Yan, Jun-Mei Xu, Xu-Liang Shen, Si-Yuan Wang
  • Publication number: 20230170361
    Abstract: The optical device includes a first photodiode, a second photodiode, and a hybrid absorber. The hybrid absorber is disposed above the first photodiode and the second photodiode. The hybrid absorber includes a color filter layer and a plurality of metal-insulator-metal structures. The color filter layer includes a first color filter disposed on the first photodiode and a second color filter disposed on the second photodiode, in which the first color filter is different from the second color filter. The plurality of metal-insulator-metal structures are disposed above the first photodiode and free of disposed above the second photodiode.
    Type: Application
    Filed: March 29, 2022
    Publication date: June 1, 2023
    Inventors: Kai-Hao CHANG, An-Li KUO, Chun-Yuan WANG, Shin-Hong KUO, Po-Hsiang WANG, Zong-Ru TU, Yu-Chi CHANG, Chih-Ming WANG
  • Patent number: 11664623
    Abstract: A plug connector includes: an insulative housing having a front mating end and a rear terminating end; a conductive module received in the insulative housing and exposed to the front mating end; a rod mounted to the insulative housing; a latch mounted to the insulative housing, the latch including a securing portion, a latching portion movable between a latched position and a released position, and an operating portion operable by the rod to move the latching portion to the released position; and a pulling tab connected to the rod, wherein the insulative housing includes a pair of grooves and the rod is slidable in the pair of grooves by the pulling tab to operate the operating portion of the latch to move the latching portion to the released position.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 30, 2023
    Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Yang-Yang Yu, Cai-Yuan Wang, Zhi-Yong Zhou, Ying-Xing Ma, Chien-Hsun Huang