Abstract: The present invention relates to a Biochemical-Level Automatic-screening Smart droplet-TO-micro-hydrogels chip (BLASTO-chip) system for sperm selection. The BLASTO-chip technology advances sperm selection from the primitive morphology level to a more sophisticated biochemical level, and it will not only provide a powerful tool to patients who have fertility problems but also work as a platform for further development of more advanced sperm selection technologies. The present invention also provides a method for improving the success rate of in vitro fertilization in a patient with asthenospermia.

Abstract: A semiconductor processing tool includes: a process chamber into which a semiconductor wafer is loaded; a support for securing the wafer loaded into the chamber tool; an inlet which introduces a first gas into the chamber for processing the wafer; and an exhaust system that exhausts gas from the chamber. The exhaust system includes: a first line coupled to the chamber to exhaust gas from the chamber; and a pump to draw gas through the first line from the chamber. The tool further includes a heating module having: a second line coupled to the first and a supply of a second gas, the second gas being flowed through the second line from the supply into the first line; and a heating element contained in the second line, the heating element heating the second gas in the second line before the second gas is flowed into the first line.

Abstract: The present disclosure relates to a system for mounting a display on a wall. The system may include at least one hanger assembly arranged in a vertical direction. The hanger assembly includes a hook assembly configured to engage a wall panel and a movable hanger configured to slidably engage with the hook assembly such that the movable hanger slides in a vertical direction. The system may further include an adjustment assembly having at least one adjustment component and an adjustment actuator. The adjustment component includes an abutment surface configured to slidably engage with a support surface of the hook assembly. The adjustment actuator engages the at least one adjustment component such that the adjustment actuator translates in a direction transverse to the vertical direction to drive the adjustment component to also translate in the transverse direction relative to the movable hanger and the movable hanger to translate in the vertical direction.

Abstract: A method of forming a semiconductor device includes forming a first semiconductor strip protruding above a first region of a substrate and a second semiconductor strip protruding above a second region of the substrate, forming an isolation region between the first semiconductor strip and the second semiconductor strip, forming a gate stack over and along sidewalls of the first semiconductor strip and the second semiconductor strip, etching a trench extending into the gate stack and isolation regions, the trench exposing the first region of the substrate and the second region of the substrate, forming a dielectric layer on sidewalls and a bottom surface of the trench and filling a conductive material over the dielectric layer and in the trench to form a contact, where the contact extends below a bottommost surface of the isolation region.

Abstract: The present invention relates to a system and a method for mobile landing of an unmanned vehicle.

Abstract: A semiconductor memory device and a writing method thereof. The semiconductor memory device includes a memory control circuit and a memory array. The memory array includes a target memory bank. The target memory bank includes a target memory cell and a sense amplifier circuit. The sense amplifier circuit is coupled to the target memory cell via a bit line, receives a data signal within a first voltage value range from the memory control circuit, and generates a bit line signal within a second voltage value range on the bit line according to the data signal. The second voltage value range is greater than the first voltage value range.

Abstract: An epitaxial structure includes a substrate and a dielectric layer. The dielectric layer is on the substrate. The substrate comprises a single crystal metal or a single crystal 2D material. The dielectric layer is in physical contact with the substrate. The dielectric layer comprises a non-perovskite structure with defined grain orientation with ferroelectric (FE) phase or antiferroelectric (AFE) phase.

Abstract: Embodiments are directed to a container storage system in remote pods. A worker node virtual machine determines that a volume is available for attachment to the worker node virtual machine. An intermediary software of the worker node virtual machine causes a pod container storage interface to attach the volume to a pod virtual machine. in response to attaching the volume to the pod virtual machine, the intermediary software of the worker node virtual machine causes the pod container storage interface to mount the volume to the pod virtual machine such that the volume is available for use by the pod virtual machine.

Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.

Abstract: This application provides a cell detection method, device and system as well as a processor and a controller. The cell detection method may include: obtaining target detection data of a target cell; and determining a detection result of the target cell based on the target detection data and standard data. The cell detection method improves the detection efficiency and detection effect of the cells.

Abstract: A chip package structure includes a substrate, a chip, a light-permeable element, and an adhesive element. The chip is disposed on the substrate. The light-permeable element is disposed above the chip. The adhesive element is connected between the chip and the light-permeable element. The adhesive element surrounds the chip for formation of an accommodating space, and the chip is located in the accommodating space. The adhesive element includes two material layers having complementary visible light absorption spectra, such that the adhesive element is capable of being used to absorb full visible spectrum light.

Abstract: The present disclosure provides a private network and edge application provisioning management system and a method thereof, which provides a construction of enterprise private cloud platform and a process of management standardization, so that a dedicated cloud operating environment can be provided for enterprise customers, and special software application services can further be established and managed. A remote registration mechanism, an enterprise private network establishment mechanism, and an edge application activation mechanism be proposed in the present disclosure. In this way, edge computing capabilities in the enterprise private network environment can be provided, which can not only reduce application service latency time, but also network transmission does not need to go through the Internet, thus having the advantages of avoiding data leakage and improving security. The present disclosure also provides a computer-readable medium for executing the method of the present disclosure.

Abstract: Microstructure enhanced photodector arrangements uses a CMOS image sensor (CIS) wafer of crystalline Si and a CMOS Logic Processor (CLP) wafer stacked on each other for electrical interaction. The wafers can be fabricated separately and stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays are enhanced with microstructure holes. Avalanche photodiodes, single photon avalanche photodiodes and phototransistors can be laterally and/or vertically doped. Photodetectors/photosensors can have slanted sidewalls for improved optical confinement and reduced crosstalk.

Abstract: An antenna structure includes a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, a fifth radiation element, and a nonconductive support element. The first radiation element has a feeding point. The second radiation element is coupled to the first radiation element. The third radiation element is coupled to a ground voltage and adjacent to the first radiation element. The fourth radiation element is coupled to the first radiation element. The fifth radiation element is coupled to the ground voltage and adjacent to the second radiation element. The first radiation element, the second radiation element, the third radiation element, and the fourth radiation element are at least partially surrounded by the fifth radiation element. The first radiation element, the second radiation element, the third radiation element, the fourth radiation element, and the fifth radiation element are disposed on the nonconductive support element.

Abstract: The application provides a memory device and an operation method thereof. The memory device includes: a memory array, for processing model computation having a plurality of input values and a plurality of interact coefficients; and at least one calculation unit. In receiving the input values, a first part and a second part of the memory cells generate a first part and a second part of the common source currents, respectively. The first part of the memory cells is electrically isolated from the second part of the memory cells based on a diagonal of the memory array. The at least one calculation unit calculates a first part and a second part of a local field energy of the model computation based on the first part and the second part of the common source currents.

Abstract: This application provides a rotation mechanism, a supporting apparatus, and a foldable screen terminal, and relates to the field of electronic device technologies, so as to balance a lifting stroke of the lifting member and a thickness of the foldable screen terminal in an unfolded state. The rotation mechanism includes a lifting member, a shaft cover, a first swing arm, a second swing arm, a forcing structure, and a first supporting member. The lifting member includes a lamination surface. The shaft cover is located on a side that is of the lifting member and that is away from the lamination surface. The first swing arm and the second swing arm are respectively located on two opposite sides of the lifting member, and the first swing arm and the second swing arm can swing between an unfolded position and a folded position relative to the shaft cover.

Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

Abstract: A plate breakage detection method and apparatus, an electronic device and a storage medium. The method includes acquiring breakage detection information; and determining, according to the breakage detection information, whether a breakage occurs in a battery plate, where the breakage detection information includes speed information of a plate press roller.

Abstract: A semiconductor device includes a semiconductor fin. The semiconductor device includes a metal gate disposed over the semiconductor fin. The semiconductor device includes a gate dielectric layer disposed between the semiconductor fin and the metal gate. The semiconductor device includes first spacers sandwiching the metal gate. The first spacers have a first top surface and the gate dielectric layer has a second top surface, and the first top surface and a first portion of the second top surface are coplanar with each other. The semiconductor device includes second spacers further sandwiching the first spacers. The second spacers have a third top surface above the first top surface and the second top surface. The semiconductor device includes a gate electrode disposed over the metal gate.