Patents by Inventor Yuan Wu

Yuan Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145952
    Abstract: A gold finger connector and a memory storage device are disclosed. The gold finger connector includes: a connector body, a pin carrier, a plurality of first pins, a plurality of second pins, and at least one signal shielding structure. The pin carrier is protruded out of the connector body. The first pins are disposed on a first surface of the pin carrier. The second pins are disposed on the first surface and at least partially staggered with the first pins. The at least one signal shielding structure is disposed on the pin carrier and configured to conduct at least one target pin in the second pins to at least one ground layer.
    Type: Application
    Filed: December 1, 2022
    Publication date: May 2, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Zong-Sian Ye, Yang-Tse Hung, Jin-Jia Chang, Bo-Yuan Wu
  • Publication number: 20240145292
    Abstract: A single wafer spin cleaning apparatus with soaking, cleaning, and etching functions in accordance with the present invention includes a spin driver device, a wafer spin chuck, and a wafer support disk. The wafer spin chuck is driven by the spin driver device to spin. The wafer support disk is annular and surrounds the wafer spin chuck, can act relative to the wafer spin chuck to a wafer support position or a wafer disengagement position, and includes a soaking trough. The wafer support disk at the wafer support position can support a wafer such that the wafer is soaked in processing liquid injected in the soaking trough for implementing a high efficient cleaning or etching process.
    Type: Application
    Filed: February 2, 2023
    Publication date: May 2, 2024
    Inventors: Li-tso HUANG, Hsiu-kai CHANG, Chin-yuan WU, Ming-che HSU
  • Publication number: 20240140842
    Abstract: The present disclosure provides an MABR-based method for treating rare earth mine tailwater, comprising: introducing rare earth mine tailwater into a sedimentation pond and simultaneously injecting pig farm breeding tailwater into the sedimentation pond, and fully mixing the two in the sedimentation pond for solid particulate sedimentation; performing pH adjustment, MABR enhancement treatment, percolation treatment with a percolation dam, and ecological purification with an ecological purification pond; and overflowing and discharging the rare earth mine tailwater purified by the ecological purification pond to a natural water body.
    Type: Application
    Filed: July 3, 2023
    Publication date: May 2, 2024
    Inventors: YUAN ZHANG, HONGHAO XIE, XINFEI ZHANG, JIANHUI ZHAN, YULIANG WU, ZHIFENG YANG
  • Publication number: 20240139337
    Abstract: The present disclosure relates to a method for treating a cancer and/or cancer metastasis in a subject comprising administering to the subject irinotecan loaded in a mesoporous silica nanoparticle. The present disclosure also provides a conjugate comprising an agent loaded in a mesoporous silica nanoparticle (MSN) defining at least one pore and having at least one functional group on a sidewall of the at least one pore.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 2, 2024
    Inventors: Cheng-Hsun WU, SI-HAN WU, YI-PING CHEN, RONG-LIN ZHANG, CHUNG-YUAN MOU, Yu-Tse LEE
  • Patent number: 11973133
    Abstract: A method for fabricating a semiconductor device includes the steps of providing a substrate having a high electron mobility transistor (HEMT) region and a capacitor region, forming a first mesa isolation on the HEMT region and a second mesa isolation on the capacitor region, forming a HEMT on the first mesa isolation, and then forming a capacitor on the second mesa isolation.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: April 30, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Chien-Liang Wu, Kuo-Yu Liao
  • Patent number: 11972055
    Abstract: The disclosure provides an electronic device with a vibration function and a vibration driving method. The electronic device includes a processor and an audio player. The processor outputs an audio signal according to an application program, and executes an audio analysis module to analyze the audio signal. The audio player is coupled to the processor, and receives the audio signal. When the audio analysis module determines that the audio signal has a loudness with an audio frequency lower than a default frequency threshold according to an audio frequency distribution of the audio signal, the audio analysis module outputs a vibration drive signal according to the loudness of the audio signal.
    Type: Grant
    Filed: October 4, 2022
    Date of Patent: April 30, 2024
    Assignee: ASUSTeK COMPUTER INC.
    Inventors: Ta Chun Chou, Chih kun Chuang, Chia Yuan Wu
  • Publication number: 20240134250
    Abstract: The present disclosure provides a base assembly of voice coil motor and a voice coil motor. The base assembly includes a base body having a first elastic piece connecting area, a lower elastic piece disposed on the first elastic piece connecting area, and a first terminal disposed in the base body. The first terminal has: a first conductive part disposed in the base body; a first terminal connecting part disposed on one side of the first conductive part and extending toward a direction away from the first conductive part, wherein a part of the first terminal connecting part protrudes from the first elastic piece connecting area and is contacted and connected with the lower elastic piece; and an engaging part disposed on one side of the first terminal connecting part and extending toward a direction away from the first terminal connecting part.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 25, 2024
    Applicant: Lanto Electronic Limited
    Inventors: Wen-Yen HUANG, Fu-Yuan WU, Shang-Yu HSU, Meng-Ting LIN, BingBing MA, Jie DU
  • Publication number: 20240133890
    Abstract: The present disclosure provides the use of BAZ1B_K426hy in the preparation of a product for tumor detection and belongs to the field of biotechnology. The present disclosure further provides a group of immunogenic polypeptides, including polypeptide A and polypeptide B. An anti-BAZ1B_K426hy polyclonal antibody is prepared by conducting mixed immunization on an animal with the immunogenic polypeptide. The polyclonal antibody can specifically recognize an endogenous protein BAZ1B_K426hy by enzyme-linked immunosorbent assay (ELISA)/Dot blot/Western blot, which is used for preparation of detection products for tumors and Williams syndrome.
    Type: Application
    Filed: April 13, 2023
    Publication date: April 25, 2024
    Applicants: Tangshan People's Hospital, North China University of Science and Technology, Tangshan Maternal And Child Health Hospital
    Inventors: Jingwu LI, Yufeng Li, Shuqing Wang, Jinghua Zhang, Jinghua Wu, Fen Hu, Yuan Yu, Yan Liu, Yuhui Li, Xuan Zheng
  • Publication number: 20240132330
    Abstract: Motor control architecture including a travel, a hoist, and a controller is disclosed. The travel disposed on a main rail having an auxiliary-encoder includes a master-driver and a slave-driver for driving two motors. Each motor has a main-encoder. The hoist drives a rope and calculates a rope length continuously. The controller calculates an anti-sway position command based on the rope-length and a position command. The two drivers perform a full closed-loop computation based on a feedback of one main-encoder, a feedback of the auxiliary-encoder, and the anti-sway position command. Wherein, the master-driver controls one motor based on a speed command generated by the full closed-loop computation and the slave-driver follows the speed command and a torque command of the master-driver to drive another motor; or the two drivers compensate the torque command based on an error value between the feedback of one main-encoder and the feedback of the auxiliary-encoder.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Inventors: Huan-Chang CHEN, Po-Jen KO, Chun-Ju WU, Lon-Jay CHENG, Wan-Ping CHEN, Chih-Yuan CHANG
  • Publication number: 20240136484
    Abstract: An electronic device includes a substrate, a semiconductor unit and an insulating layer. The semiconductor unit is disposed on the substrate. The insulating layer is disposed on the semiconductor unit, and the insulating layer includes a first portion and a second portion connected to the first portion. In a top view, the first portion partially overlaps the semiconductor unit, the second portion does not overlap the semiconductor unit, and a part of an edge of the insulating layer is irregular.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: InnoLux Corporation
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Patent number: 11965698
    Abstract: A slim heat-dissipation module is provided. The slim heat-dissipation module includes a first plate, a second plate, a first porous structure, a second porous structure, a first fluid, and a second fluid. The second plate is combined with the first plate to form a first type chamber and a second type chamber, wherein the first type chamber and the second type chamber are sealed and independent, respectively. The first porous structure is disposed in the first type chamber. The second porous structure is disposed in the second type chamber. The first fluid is disposed in the first type chamber. The second fluid is disposed in the second type chamber.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shih-Lin Huang, Ting-Yuan Wu
  • Patent number: 11968817
    Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jui-Lin Chen, Chao-Yuan Chang, Ping-Wei Wang, Fu-Kai Yang, Ting Fang, I-Wen Wu, Shih-Hao Lin
  • Publication number: 20240124292
    Abstract: An auxiliary operation device for a droplet dispenser includes a droplet sensor, an imaging device and a processor. The droplet sensor has a detected area located between a droplet dispenser and a target area, wherein the droplet sensor detects a droplet output from the droplet dispenser, and outputs a corresponding droplet detection signal. The imaging device captures an image of the target area. The processor obtains a dripping time point at which the droplet passes through the detected area according to the droplet detection signal, and determines whether the target area is shielded within a first time range according to the image, so as to evaluate whether the droplet has successfully dropped into the target area. The above-mentioned auxiliary operating device of the droplet dispenser can objectively determine whether the droplets successfully drops into the target area, and improve the accuracy of judgment.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 18, 2024
    Inventors: SHAO HUNG HUANG, CHAO-TING CHEN, FONG HAO KUO, CHI-YUAN KANG, Chang Mu WU
  • Patent number: 11961732
    Abstract: A method includes depositing a first work-function layer and a second work-function layer in a first device region and a second device region, respectively, and depositing a first fluorine-blocking layer and a second fluorine-blocking layer in the first device region and the second device region, respectively. The first fluorine-blocking layer is over the first work-function layer, and the second fluorine-blocking layer is over the second work-function layer. The method further includes removing the second fluorine-blocking layer, and forming a first metal-filling layer over the first fluorine-blocking layer, and a second metal-filling layer over the second work-function layer.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Ching Lee, Chung-Chiang Wu, Shih-Hang Chiu, Hsuan-Yu Tung, Da-Yuan Lee
  • Patent number: 11961738
    Abstract: In a method of forming a pattern, a first pattern is formed over an underlying layer, the first pattern including main patterns and a lateral protrusion having a thickness of less than 25% of a thickness of the main patterns, a hard mask layer is formed over the first pattern, a planarization operation is performed to expose the first pattern without exposing the lateral protrusion, a hard mask pattern is formed by removing the first pattern while the lateral protrusion being covered by the hard mask layer, and the underlying layer is patterned using the hard mask pattern as an etching mask.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Ta Chen, Hua-Tai Lin, Han-Wei Wu, Jiann-Yuan Huang
  • Patent number: 11961761
    Abstract: One or more techniques or systems for mitigating pattern collapse are provided herein. For example, a semiconductor structure for mitigating pattern collapse is formed. In some embodiments, the semiconductor structure includes an extreme low-k (ELK) dielectric region associated with a via or a metal line. For example, a first metal line portion and a second metal line portion are associated with a first lateral location and a second lateral location, respectively. In some embodiments, the first portion is formed based on a first stage of patterning and the second portion is formed based on a second stage of patterning. In this manner, pattern collapse associated with the semiconductor structure is mitigated, for example.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Chih-Yuan Ting, Ya-Lien Lee, Chung-Wen Wu, Jeng-Shiou Chen
  • Publication number: 20240117831
    Abstract: A post coupler having a top end portion and bottom end portion, a first body portion and a second body portion. Each body portion having an inner edge, an outer edge, a reverse flange, and a post stop. Each reverse flange forms a post receiving slot, and each post stop extends towards its respective body portion. The first and second body portions are coupled to each other at approximately 90 degrees. A method of using the post coupler comprises the steps of a) providing a first post section and a second post section, b) inserting the first post section along the post receiving slots until the first post section abuts one side of the post stops, and c) inserting the second post section along the post receiving slots until the second post section abuts an other side of the post stops.
    Type: Application
    Filed: October 6, 2022
    Publication date: April 11, 2024
    Inventors: Christopher H. Berry, Dan Ta-Yuan Wu
  • Publication number: 20240121840
    Abstract: This application discloses a network connection method, a related apparatus, and a system. In the method, an electronic device may continuously borrow a network connection capability of another device to continuously access the internet, may temporarily borrow a web capability of another device to access a captive portal wireless network, or may temporarily borrow a network connection capability of another device to activate an eSIM or a blank SIM. According to the method, the electronic device may smoothly connect to the internet by using the network connection capability or the web capability of the another device, and communicate with the internet, to provide various services for a user.
    Type: Application
    Filed: November 13, 2023
    Publication date: April 11, 2024
    Inventors: Xingchen Wu, Wenchao Zhu, Yuan Wang, Yufeng Mao
  • Publication number: 20240120203
    Abstract: A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.
    Type: Application
    Filed: March 8, 2023
    Publication date: April 11, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chih HSIUNG, Yun-Hua CHEN, Bing-Sian WU, Yi-Hsuan CHIU, Yu-Wei CHANG, Wen-Kuo HSIEH, Chih-Yuan TING, Huan-Just LIN
  • Publication number: 20240120451
    Abstract: An electronic assembly is provided. The electronic assembly includes a first circuit structure including a conductive structure, a second circuit structure disposed on the first circuit structure, a plurality of electronic elements disposed on the first circuit structure, and a connecting element disposed on the first circuit layer. The connecting element is disposed between two adjacent ones of the plurality electronic elements and electrically connected to the second circuit layer and one of the two adjacent ones of the plurality of electronic elements.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Jia-Yuan CHEN, Tsung-Han TSAI, Kuan-Feng LEE, Yuan-Lin WU