Patents by Inventor Yuan Yu

Yuan Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11585841
    Abstract: In a method of atomic electrometry, EIT spectroscopy is performed on host atoms of an alkali metal in a vapor cell. The EIT spectroscopy indicates a resonant energy of a probed Rydberg state of the host atoms. The vapor cell is exposed to an ambient electric field. A shift in the resonant energy as indicated by the EIT spectroscopy is observed and interpreted as a measurement of the ambient field. During the measurement of the ambient field, a bias electric field is generated inside the vapor cell by shining light into the vapor cell from a light source situated outside of the cell. The bias field is useful for increasing the sensitivity of the measurement.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: February 21, 2023
    Assignee: National Technology & Engineering Solutions of Sandia, LLC
    Inventor: Yuan-Yu Jau
  • Patent number: 11569679
    Abstract: An intelligent energy harvesting device, a voltage signal application system, and an energy management module thereof are disclosed. The intelligent energy harvesting device is used to transfer a signal to an application device. The intelligent energy harvesting device includes a power generation module, a battery and an energy management module. The power generation module generates a first voltage signal. The battery generates a second voltage signal. The energy management module is electrically connected to the power generation module and the battery for enabling the first voltage signal output from the power generation module to be used as a power signal to provide the application device, or enabling the first voltage signal output from the power generation module and the second voltage signal output from the battery collectively serves as the power signal to provide the application device.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: January 31, 2023
    Assignee: CHUNG-YUAN CHRISTIAN UNIVERSITY
    Inventors: Yung Ting, Sheuan-Perng Lin, Chih-Hsuan Yu, Yuan-Yu Chou
  • Publication number: 20230018511
    Abstract: A semiconductor package includes a redistribution structure, a supporting layer, a semiconductor device, and a transition waveguide structure. The redistribution structure includes a plurality of connectors. The supporting layer is formed over the redistribution structure and disposed beside and between the plurality of connectors. The semiconductor device is disposed on the supporting layer and bonded to the plurality of connectors, wherein the semiconductor device includes a device waveguide. The transition waveguide structure is disposed on the supporting layer adjacent to the semiconductor device, wherein the transition waveguide structure is optically coupled to the device waveguide.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Hsiu-Jen Lin, Ming-Che Ho, Yu-Hsiang Hu, Chewn-Pu Jou, Cheng-Tse Tang
  • Publication number: 20230002875
    Abstract: The present disclosure discloses a preparation method of a multi-functional marine engineering alloy. Through the coupling of a multi-principal alloy structure, structural entropy, and temperature and powder metallurgy and heat treatment, mutual solubility between elements and free energy of an alloy system are regulated, Cu grain boundary segregation is eliminated, and uniform and dispersed nano-precipitation of the anti-fouling element Cu in corrosion-resistant and high-plasticity multi-principal alloys is realized. The preparation method is simple and controllable to operate, and the prepared material has plasticity higher than 75%, high yield strength, excellent corrosion resistance and anti-fouling property, and has important application prospects in the field of marine engineering.
    Type: Application
    Filed: July 5, 2022
    Publication date: January 5, 2023
    Applicants: Shandong Laboratory of Yantai Advanced Materials and Green Manufacturing, Yantai Zhongke Research Institute of Advanced Materials and Green Chemical Engineering, Lanzhou Institute of Chemical Physics, Chinese Academy of Sciences
    Inventors: Zhuhui Qiao, Yuan Yu, Weimin Liu, Huaguo Tang, Lujie Wang, Tongyang Li, Lin Song, Youjian Zhang
  • Patent number: 11543474
    Abstract: A method is provided for sensing a magnetic field in a magnetic gradiometer of the kind in which pump light and light constituting an optical carrier traverse first and second atomic vapor cells that contain host atoms and that are separated from each other by a known distance. According to such method, the host atoms are prepared in a coherent superposition of two quantum states that differ in energy by an amount that is sensitive to an ambient magnetic field. Modulation of the optical carrier in the respective cells gives rise to sidebands that interfere to generate a beat frequency indicative of the magnetic field gradient. The host atoms are prepared at least in a mode that allows measurement of ambient magnetic field components perpendicular to the axis of the pump light. In such mode, the host atoms are spin-polarized by pump light while subjected to a controlled magnetic field directed parallel to the pump beam, and then the controlled magnetic field is adiabatically extinguished.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: January 3, 2023
    Assignees: National Technology & Engineering Solutions of Sandia, LLC, Quspin, Inc.
    Inventors: Peter Schwindt, Yuan-Yu Jau, Kaleb Lee Campbell, Vishal Shah
  • Publication number: 20220416573
    Abstract: A wireless charging device includes a plug module, a rack and a wireless charger. The plug module has a top wall, and two opposite side walls connected with two opposite sides of the top wall. A front end of a top surface of the top wall of the plug module is defined as an inclined plane. The rack is mounted on the inclined plane of the plug module. A front end of a bottom surface of the rack is recessed inward to form a lower accommodating groove. The inclined plane is mounted in the lower accommodating groove. A top surface of the rack is recessed downward to form an upper accommodating groove. The wireless charger is mounted in the upper accommodating groove.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 29, 2022
    Inventors: YUAN-YU HWANG, XIAO-KANG YANG, QIN-XIANG LIU
  • Publication number: 20220407353
    Abstract: A wireless charger includes a housing which is a circular plate shape, a wireless charging module and a holder. An inside of the housing has an internal space. A front of a lower portion of a peripheral surface of the housing is recessed inward to form a holding slot. Two sides of the housing define two blind holes. The holding slot is connected with the two blind holes. The wireless charging module is assembled in the internal space. The holder is placed in the holding slot. The holder is pivotally located in the housing. The holder is rotatable around a bottom surface of the housing. The holder has a frame, and two pivot pins protruded towards each other from two ends of the frame. The two pivot pins are assembled to the two blind holes.
    Type: Application
    Filed: April 29, 2022
    Publication date: December 22, 2022
    Inventors: YUAN-YU HWANG, XIAO-KANG YANG, QIN-XIANG LIU
  • Patent number: 11532596
    Abstract: A package structure and method of forming the same are provided. The package structure includes a semiconductor unit, a package component and an underfill layer. The semiconductor structure unit includes a first semiconductor structure and a second semiconductor structure disposed as side by side, and an isolation region laterally between the first semiconductor structure and the second semiconductor structure. The isolation region vertically extends from a top surface to a bottom surface of the semiconductor structure unit. The semiconductor structure unit is disposed on and electrically connected to the package component. The underfill layer is disposed to fill a space between the semiconductor structure unit and the package component.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: December 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Yuan Yu, Hung-Yi Kuo, Cheng-Chieh Hsieh, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11528211
    Abstract: A data inspection system includes: a communication circuit arranged to operably communicate data with a plurality of attributes filtering devices to receive multiple activity records which are generated by the plurality of attributes filtering devices and corresponding to multiple IoT devices in a plurality of target IoT systems; a storage circuit arranged to operably store the multiple activity records received by the communication circuit; and a data classification circuit coupled with the storage circuit and arranged to operably classify each of the multiple activity records received by the communication circuit based on N attributes to form M data groups; wherein N is 2 or an integer greater than 2, while M is at least two times of N.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: December 13, 2022
    Assignee: ACOM NETWORKS Technology Co., Ltd.
    Inventors: Tze Yi Cheng, Yu Sheng Ho, Yuan Yu Chen
  • Patent number: 11527490
    Abstract: Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a method of manufacturing a packaging device includes forming an interconnect wiring over a substrate, and forming conductive balls over portions of the interconnect wiring. A molding material is deposited over the conductive balls and the substrate, and a portion of the molding material is removed from over scribe line regions of the substrate.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: December 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hsien-Wei Chen, Tsung-Yuan Yu, Ming-Da Cheng, Wen-Hsiung Lu
  • Patent number: 11521959
    Abstract: A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: December 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Hua Yu, Hung-Yi Kuo, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Yuan Yu, Ming Hung Tseng
  • Publication number: 20220382004
    Abstract: An optical interconnect structure including a base substrate, an optical waveguide, a first reflector, a second reflector, a dielectric layer, a first lens, and a second lens is provided. The optical waveguide is embedded in the base substrate. The optical waveguide includes a first end portion and a second end portion opposite to the first end portion. The first reflector is disposed between the base substrate and the first end portion of the optical waveguide. The second reflector is disposed between the base substrate and the second end portion of the optical waveguide. The dielectric layer covers the base substrate and the optical waveguide. The first lens is disposed on the dielectric layer and located above the first end portion of the optical waveguide. The second lens is disposed on the dielectric layer and located above the second end portion of the optical waveguide.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 1, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Yu-Hsiang Hu, Chewn-Pu Jou, Feng-Wei Kuo
  • Publication number: 20220381999
    Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a waveguide on a first side of the substrate. The semiconductor device further includes a photodetector (PD) on a second side of the substrate, opposite the first side of the substrate. The semiconductor device further includes an optical through via (OTV) optically connecting the PD with the waveguide, wherein the OTV extends through the substrate from the first side of the substrate to the second side of the substrate.
    Type: Application
    Filed: July 16, 2021
    Publication date: December 1, 2022
    Inventors: Yu-Hao CHEN, Chung-Ming WENG, Tsung-Yuan YU, Hui Yu LEE, Hung-Yi KUO, Jui-Feng KUAN, Chien-Te WU
  • Publication number: 20220371524
    Abstract: A vehicle-used bracket includes a base body, a clamping assembly and a buffering element. The base body has a main portion, a peripheral wall extended upward from a periphery of a top surface of the main portion, and a connecting portion fastened to a bottom surface of the base body. A periphery of a bottom surface of the connecting portion extends downward to form a limiting structure. The clamping assembly is mounted to the bottom surface of the connecting portion. The clamping assembly includes a screw, a fastening element and a claw. The claw has a fastening piece. A top surface of the fastening piece is arched towards the connecting portion to form at least one protruding block. The at least one protruding block is limited in the limiting structure. The buffering element is mounted between the connecting portion and the clamping assembly.
    Type: Application
    Filed: February 18, 2022
    Publication date: November 24, 2022
    Inventors: YUAN-YU HWANG, XIAO-KANG YANG, QIN-XIANG LIU
  • Publication number: 20220365297
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20220365273
    Abstract: Disclosed are semiconductor packages and manufacturing method of the semiconductor packages. In one embodiment, a semiconductor package includes a substrate, a first waveguide, a semiconductor die, and an adhesive layer. The first waveguide is disposed on the substrate. The semiconductor die is disposed on the substrate and includes a second waveguide aligned with the first waveguide. The adhesive layer is disposed between the first waveguide and the second waveguide.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Hua-Kuei Lin, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Che-Hsiang Hsu, Chewn-Pu Jou, Cheng-Tse Tang
  • Publication number: 20220359488
    Abstract: A method includes bonding a first device die to a second device die, encapsulating the first device die in a first encapsulant, performing a backside grinding process on the second device die to reveal through-vias in the second device die, and forming first electrical connectors on the second device die to form a package. The package includes the first device die and the second device die. The method further includes encapsulating the first package in a second encapsulant, and forming an interconnect structure overlapping the first package and the second encapsulant. The interconnect structure comprises second electrical connectors.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: Chen-Hua Yu, Hung-Yi Kuo, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Yuan Yu, Ming Hung Tseng
  • Patent number: 11487505
    Abstract: A Physical Unclonable Function (PUF) based true random number generator (TRNG), a method for generating true random numbers, and an associated electronic device are provided. The PUF based TRNG may include a first obfuscation circuit, a cryptography circuit coupled to the first obfuscation circuit, and a second obfuscation circuit coupled to the cryptography circuit. The first obfuscation circuit obtains a first PUF value from a PUF pool of the electronic device, and performs a first obfuscation function on a preliminary seed based on the first PUF value to generate a final seed. The cryptography circuit utilizes the final seed as a key of a cryptography function to generate preliminary random numbers. The second obfuscation circuit obtains a second PUF value from the PUF pool, and performs a second obfuscation function on the preliminary random numbers based on the second PUF value to generate final random numbers.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: November 1, 2022
    Assignee: PUFsecurity Corporation
    Inventors: Chun-Yuan Yu, Yung-Hsiang Liu, Kai-Hsin Chuang
  • Publication number: 20220339626
    Abstract: The present disclosure provides a microfluidic device, including a bottom substrate, an electrowetting-on-dielectric (EWOD) chip, a circuit board, a dielectric film, and a motor. The EWOD chip is disposed on the bottom substrate, and the circuit board is arranged on the EWOD chip. The circuit board includes a circuit area that is electrically connected to the EWOD chip, and the empty area is adjacent to the circuit area and the EWOD chip is exposed. The dielectric film is disposed on the empty area of the circuit board and covers the exposed EWOD chip. The motor is disposed under the bottom substrate, and one end of the motor has a magnetic structure, so that the magnetic structure can move closer to or away from the bottom substrate.
    Type: Application
    Filed: June 25, 2021
    Publication date: October 27, 2022
    Inventors: Shau-Chun WANG, Lai-Kwan CHAU, Yuan-Yu CHEN
  • Publication number: 20220318600
    Abstract: Embodiments relate to systems and methods for probabilistically filtering candidate intervention representations. Systems and methods are described that receive a candidate intervention representation; specify a plurality of parameters as a function of the candidate intervention representation; identify a plurality of analytical constraints, where each analytical constraint corresponds to an analytical parameter of the plurality of parameters; generate a probabilistic output as a function of the candidate intervention representation, the plurality of analytic constraints, and training data correlating past intervention representations to a deterministic outcome; and, filter the at least a candidate intervention representation using the probabilistic output.
    Type: Application
    Filed: April 1, 2021
    Publication date: October 6, 2022
    Applicant: Banjo Health Inc.
    Inventors: Saaransh Mahna, James Rollins, Farzana Rahman, Yuan Yu