Patents by Inventor Yu-Chen Yang
Yu-Chen Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240152193Abstract: The invention provides a power supply including at least one power output port, at least one status alert component, and at least one output port status monitoring module. The status alert component generates at least one visual prompt based on an alert signal. The output port status monitoring module includes at least one temperature sensor adjacent to the power output port, a microcontroller connected to the temperature sensor and sensing an output current from the power output port, and a reset signal generator connected to the microcontroller. The microcontroller comprises at least one port status alert condition that takes a temperature and the output current of the power output port as decision factors. The microcontroller outputs the alert signal to the status alert component when the port status alert condition is met and maintains the status until a reset signal provided by the reset signal generator is received.Type: ApplicationFiled: November 4, 2022Publication date: May 9, 2024Inventors: Wei-Chen WU, Wen-Hau HU, Hung-Wei YANG, Cheng-Yung LO, Yu-Hao SU, Jian-Zhi HUANG
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Publication number: 20240145381Abstract: In some embodiments, the present disclosure relates an integrated chip including a substrate. A conductive interconnect feature is arranged over the substrate. The conductive interconnect feature has a base feature portion with a base feature width and an upper feature portion with an upper feature width. The upper feature width is narrower than the base feature width such that the conductive interconnect feature has tapered outer feature sidewalls. An interconnect via is arranged over the conductive interconnect feature. The interconnect via has a base via portion with a base via width and an upper via portion with an upper via width. The upper via width is wider than the base via width such that the interconnect via has tapered outer via sidewalls.Type: ApplicationFiled: January 9, 2024Publication date: May 2, 2024Inventors: Shin-Yi Yang, Hsin-Yen Huang, Ming-Han Lee, Shau-Lin Shue, Yu-Chen Chan, Meng-Pei Lu
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Publication number: 20240120313Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU
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Patent number: 11948837Abstract: A method for making a semiconductor structure includes: providing a substrate with a contact feature thereon; forming a dielectric layer on the substrate; etching the dielectric layer to form an interconnect opening exposing the contact feature; forming a metal layer on the dielectric layer and outside of the contact feature; and forming a graphene conductive structure on the metal layer, the graphene conductive structure filling the interconnect opening, being electrically connected to the contact feature, and having at least one graphene layer that extends in a direction substantially perpendicular to the substrate.Type: GrantFiled: August 30, 2021Date of Patent: April 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ching-Fu Yeh, Chin-Lung Chung, Shu-Wei Li, Yu-Chen Chan, Shin-Yi Yang, Ming-Han Lee
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Patent number: 11950431Abstract: A magnetic tunnel junction (MTJ) device includes two magnetic tunnel junction elements and a magnetic shielding layer. The two magnetic tunnel junction elements are arranged side by side. The magnetic shielding layer is disposed between the magnetic tunnel junction elements. A method of forming said magnetic tunnel junction (MTJ) device includes the following steps. An interlayer including a magnetic shielding layer is formed. The interlayer is etched to form recesses in the interlayer. The magnetic tunnel junction elements fill in the recesses. Or, a method of forming said magnetic tunnel junction (MTJ) device includes the following steps. A magnetic tunnel junction layer is formed. The magnetic tunnel junction layer is patterned to form magnetic tunnel junction elements. An interlayer including a magnetic shielding layer is formed between the magnetic tunnel junction elements.Type: GrantFiled: December 2, 2022Date of Patent: April 2, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Wei Chen, Hui-Lin Wang, Yu-Ru Yang, Chin-Fu Lin, Yi-Syun Chou, Chun-Yao Yang
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Publication number: 20240088042Abstract: A semiconductor structure includes a dielectric layer over a substrate, a via conductor over the substrate and in the dielectric layer, and a first graphene layer disposed over the via conductor. In some embodiments, a top surface of the via conductor and a top surface of the dielectric layer are level. In some embodiments, the first graphene layer overlaps the via conductor from a top view. In some embodiments, the semiconductor structure further includes a second graphene layer under the via conductor and a third graphene layer between the dielectric layer and the via conductor. In some embodiments, the second graphene layer is between the substrate and the via conductor.Type: ApplicationFiled: January 11, 2023Publication date: March 14, 2024Inventors: SHU-WEI LI, HAN-TANG HUNG, YU-CHEN CHAN, CHIEN-HSIN HO, SHIN-YI YANG, MING-HAN LEE, SHAU-LIN SHUE
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Publication number: 20240078951Abstract: A manufacturing method of a multi-screen display is provided. The manufacturing method includes the following steps. A first panel is provided. A second panel is provided. The first panel and the second panel are spliced. The first color coordinate of the first panel includes a first horizontal coordinate and a first vertical coordinate, and the second color coordinate of the second panel includes a second horizontal coordinate and a second vertical coordinate. The difference between the horizontal coordinate and the second horizontal coordinate is ?x, the difference between the first vertical coordinate and the second vertical coordinate is ?y, and ?x and ?y satisfy the following relationship: ?=arctan(?x/?y), 46 degrees???126 degrees.Type: ApplicationFiled: August 8, 2023Publication date: March 7, 2024Inventors: Shun-Chen YANG, Yu-Lun HSU
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Publication number: 20240071822Abstract: A method for manufacturing a semiconductor structure includes forming a first interconnect feature in a first dielectric feature, the first interconnect feature including a first conductive element exposed from the first dielectric feature; forming a first cap feature over the first conductive element, the first cap feature including a first cap element which includes a two-dimensional material; forming a second dielectric feature with a first opening that exposes the first cap element; forming a barrier layer over the second dielectric feature while exposing the first cap element from the barrier layer; removing a portion of the first cap element exposed from the barrier layer; and forming a second conductive element in the first opening.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chin-Lung CHUNG, Shin-Yi YANG, Yu-Chen CHAN, Han-Tang HUNG, Shu-Wei LI, Ming-Han LEE
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Patent number: 10752688Abstract: An anti-human T-cell immunoglobulin domain and mucin domain 3 (TIM-3) antibody, can bind the peptides, comprising the amino-acid sequence RKGDVSL (SEQ ID NO: 9) and/or EKFNLKL (SEQ ID NO: 10) of human TIM-3 protein. The antibody can regulate immune cell activity. The antibody or binding fragment thereof is useful in diagnosis, prognosis, and treatment of cancers that have been reported to express cell-surface TIM-3 such as lung, liver, esophageal cancer and solid tumors.Type: GrantFiled: December 30, 2017Date of Patent: August 25, 2020Assignee: DEVELOPMENT CENTER FOR BIOTECHNOLOGYInventors: Yu-Chen Yang, Li-Yu Chen, Chia-Hua Li, Pei-Han Tai, Hong-Kai Chen, Ying-Yung Lok, Chih-Yung Hu, Chien-Tsun Kuan, Chung-Hsiun Wu
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Patent number: 10658544Abstract: A light-emitting device comprises a semiconductor layer sequence comprising a first semiconductor layer having a first electrical conductivity, a second semiconductor layer having a second electrical conductivity, and an active layer interposed between the first semiconductor layer and the second semiconductor layer; a plurality of beveled trenches formed in the semiconductor layer sequence; a plurality of protruding structures respectively formed in the plurality of beveled trenches; a dielectric layer formed on the second semiconductor layer and an inner sidewall of the plurality of beveled trenches; a reflecting layer interposed between the semiconductor layer sequence and the dielectric layer; and a metal layer formed along the inner sidewall of the plurality of beveled trenches, wherein the dielectric layer, the reflecting layer and the metal layer are overlapping, the plurality of protruding structures and the reflecting layer are not overlapping.Type: GrantFiled: April 12, 2019Date of Patent: May 19, 2020Assignee: EPISTAR CORPORATIONInventors: Chao-Hsing Chen, Yu-Chen Yang, Li-Ping Jou, Hui-Chun Yeh, Yi-Wen Ku
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Patent number: 10644202Abstract: A light-emitting device comprises a light-emitting semiconductor stack comprising a plurality of recesses and a mesa, each of the plurality of recesses comprising a bottom surface, and the mesa comprising an upper surface; a first electrode formed on the upper surface of the mesa; a plurality of second electrodes respectively formed on the bottom surface of the plurality of recesses; a first electrode pad formed on the light-emitting semiconductor stack and contacting with the first electrode; a second electrode pad formed on the light-emitting semiconductor stack and contacting with the plurality of second electrode; a first insulating layer comprising a plurality of passages to expose the plurality of second electrodes; and a second insulating layer comprising a plurality of spaces and formed on the first insulating layer, wherein the plurality of spaces is covered by the first electrode pad.Type: GrantFiled: January 4, 2018Date of Patent: May 5, 2020Assignee: EPISTAR CORPORATIONInventors: Hong-Che Chen, Chien-Fu Shen, Chao-Hsing Chen, Yu-Chen Yang, Jia-Kuen Wang, Chih-Nan Lin
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Publication number: 20190237624Abstract: A light-emitting device comprises a semiconductor layer sequence comprising a first semiconductor layer having a first electrical conductivity, a second semiconductor layer having a second electrical conductivity, and an active layer interposed between the first semiconductor layer and the second semiconductor layer; a plurality of beveled trenches formed in the semiconductor layer sequence; a plurality of protruding structures respectively formed in the plurality of beveled trenches; a dielectric layer formed on the second semiconductor layer and an inner sidewall of the plurality of beveled trenches; a reflecting layer interposed between the semiconductor layer sequence and the dielectric layer; and a metal layer formed along the inner sidewall of the plurality of beveled trenches, wherein the dielectric layer, the reflecting layer and the metal layer are overlapping, the plurality of protruding structures and the reflecting layer are not overlapping.Type: ApplicationFiled: April 12, 2019Publication date: August 1, 2019Inventors: Chao-Hsing CHEN, Yu-Chen YANG, Li-Ping JOU, Hui-Chun YEH, Yi-Wen KU
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Patent number: 10304999Abstract: A light-emitting device comprises a semiconductor layer sequence comprising a first semiconductor layer having a first electrical conductivity, a second semiconductor layer having a second electrical conductivity, and an active layer interposed between the first semiconductor layer and the second semiconductor layer; a plurality of beveled trenches formed in the semiconductor layer sequence; a plurality of protruding structures respectively formed in the plurality of beveled trenches; a dielectric layer formed on the second semiconductor layer and an inner sidewall of the plurality of beveled trenches; a reflecting layer interposed between the semiconductor layer sequence and the dielectric layer; and a metal layer formed along the inner sidewall of the plurality of beveled trenches, wherein the dielectric layer, the reflecting layer and the metal layer are overlapping, the plurality of protruding structures and the reflecting layer are not overlapping.Type: GrantFiled: December 19, 2017Date of Patent: May 28, 2019Assignee: EPISTAR CORPORATIONInventors: Chao-Hsing Chen, Yu-Chen Yang, Li-Ping Jou, Hui-Chun Yeh, Yi-Wen Ku
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Patent number: 10026778Abstract: A light-emitting structure includes an epitaxial structure including a plurality of trenches; a conductive connecting layer, disposed under the epitaxial structure; a first isolation layer; a crossover metal layer, disposed under the first isolation layer and including a plurality of protruding portions protruding into the epitaxial structure through the plurality of trenches; a second isolation layer, disposed under the crossover metal layer; a bonding layer disposed under the second isolation layer; a substrate, disposed under the bonding layer; and an electrode, electrically connected to the conductive connecting layer and disposed adjacent to the epitaxial structure in a cross-sectional view.Type: GrantFiled: October 6, 2017Date of Patent: July 17, 2018Assignee: EPISTAR CORPORATIONInventors: Li-Ping Jou, Yu-Chen Yang, Jui-Hung Yeh
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Publication number: 20180186881Abstract: An anti-human T-cell immunoglobulin domain and mucin domain 3 (TIM-3) antibody, can bind the peptides, comprising the amino-acid sequence RKGDVSL (SEQ ID NO: 9) and/or EKFNLKL (SEQ ID NO: 10) of human TIM-3 protein. The antibody can regulate immune cell activity. The antibody or binding fragment thereof is useful in diagnosis, prognosis, and treatment of cancers that have been reported to express cell-surface TIM-3 such as lung, liver, esophageal cancer and solid tumors.Type: ApplicationFiled: December 30, 2017Publication date: July 5, 2018Applicant: Development Center for BiotechnologyInventors: Yu-Chen Yang, Li-Yu CHEN, Chia-Hua LI, Pei-Han TAI, Hong-Kai CHEN, Ying-Yung LOK, Chih-Yung HU, Chien-Tsun KUAN, Chung-Hsiun WU
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Publication number: 20180145223Abstract: A light-emitting device comprises a light-emitting semiconductor stack comprising a plurality of recesses and a mesa, each of the plurality of recesses comprising a bottom surface, and the mesa comprising an upper surface; a first electrode formed on the upper surface of the mesa; a plurality of second electrodes respectively formed on the bottom surface of the plurality of recesses; a first electrode pad formed on the light-emitting semiconductor stack and contacting with the first electrode; a second electrode pad formed on the light-emitting semiconductor stack and contacting with the plurality of second electrode; a first insulating layer comprising a plurality of passages to expose the plurality of second electrodes; and a second insulating layer comprising a plurality of spaces and formed on the first insulating layer, wherein the plurality of spaces is covered by the first electrode pad.Type: ApplicationFiled: January 4, 2018Publication date: May 24, 2018Inventors: Hong-Che CHEN, Chien-Fu SHEN, Chao-Hsing CHEN, Yu-Chen YANG, Jia-Kuen WANG, Chih-Nan LIN
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Publication number: 20180108807Abstract: A light-emitting device comprises a semiconductor layer sequence comprising a first semiconductor layer having a first electrical conductivity, a second semiconductor layer having a second electrical conductivity, and an active layer interposed between the first semiconductor layer and the second semiconductor layer; a plurality of beveled trenches formed in the semiconductor layer sequence; a plurality of protruding structures respectively formed in the plurality of beveled trenches; a dielectric layer formed on the second semiconductor layer and an inner sidewall of the plurality of beveled trenches; a reflecting layer interposed between the semiconductor layer sequence and the dielectric layer; and a metal layer formed along the inner sidewall of the plurality of beveled trenches, wherein the dielectric layer, the reflecting layer and the metal layer are overlapping, the plurality of protruding structures and the reflecting layer are not overlapping.Type: ApplicationFiled: December 19, 2017Publication date: April 19, 2018Inventors: Chao-Hsing CHEN, Yu-Chen YANG, Li-Ping JOU, Hui-Chun YEH, Yi-Wen KU
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Patent number: 9905733Abstract: A light-emitting device comprises a light-emitting semiconductor stack comprising a plurality of recesses and a mesa, each of the plurality of recesses comprising a bottom surface, and the mesa comprising an upper surface; a first electrode formed on the upper surface of the mesa; a plurality of second electrodes respectively formed on the bottom surface of the plurality of recesses; a first electrode pad formed on the light-emitting semiconductor stack and contacting with the first electrode; a second electrode pad formed on the light-emitting semiconductor stack and contacting with the plurality of second electrode; a first insulating layer comprising a plurality of passages to expose the plurality of second electrodes; and a second insulating layer comprising a plurality of spaces and formed on the first insulating layer, wherein the plurality of spaces is covered by the first electrode pad.Type: GrantFiled: March 30, 2017Date of Patent: February 27, 2018Assignee: EPISTAR CORPORATIONInventors: Hong-Che Chen, Chien-Fu Shen, Chao-Hsing Chen, Yu-Chen Yang, Jia-Kuen Wang, Chih-Nan Lin
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Publication number: 20180033824Abstract: A light-emitting structure includes an epitaxial structure including a plurality of trenches; a conductive connecting layer, disposed under the epitaxial structure; a first isolation layer; a crossover metal layer, disposed under the first isolation layer and including a plurality of protruding portions protruding into the epitaxial structure through the plurality of trenches; a second isolation layer, disposed under the crossover metal layer; a bonding layer disposed under the second isolation layer; a substrate, disposed under the bonding layer; and an electrode, electrically connected to the conductive connecting layer and disposed adjacent to the epitaxial structure in a cross-sectional view.Type: ApplicationFiled: October 6, 2017Publication date: February 1, 2018Inventors: Li-Ping JOU, Yu-Chen YANG, Jui-Hung YEH
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Patent number: 9876138Abstract: A light-emitting device comprises a semiconductor layer sequence comprising a first semiconductor layer having a first electrical conductivity, a second semiconductor layer having a second electrical conductivity, and an active layer interposed between the first semiconductor layer and the second semiconductor layer; a plurality of beveled trenches formed in the semiconductor layer sequence; a plurality of protruding structures respectively formed in the plurality of beveled trenches; a dielectric layer formed on the second semiconductor layer and an inner sidewall of the plurality of beveled trenches; a reflecting layer interposed between the semiconductor layer sequence and the dielectric layer; and a metal layer formed along the inner sidewall of the plurality of beveled trenches, wherein the dielectric layer, the reflecting layer and the metal layer are overlapping, the plurality of protruding structures and the reflecting layer are not overlapping.Type: GrantFiled: September 22, 2016Date of Patent: January 23, 2018Assignee: EPISTAR CORPORATIONInventors: Chao-Hsing Chen, Yu-Chen Yang, Li-Ping Jou, Hui-Chun Yeh, Yi-Wen Ku