Patents by Inventor Yuchen Zhou

Yuchen Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MR Enhancing Layer (MREL) For Spintronic Devices
    Publication number: 20140220385
    Abstract: The performance of an MR device has been improved by inserting one or more Magneto-Resistance Enhancing Layers (MRELs) into approximately the center of one or more of the magnetic layers such as an inner pinned (AP1) layer, spin injection layer (SIL), field generation layer (FGL), and a free layer. An MREL is a layer of a low band gap, high electron mobility semiconductor such as ZnO or a semimetal such as Bi. The MREL may further comprise a first conductive layer that contacts a bottom surface of the semiconductor or semimetal layer, and a second conductive layer that contacts a top surface of the semiconductor or semimetal layer.
    Type: Application
    Filed: April 4, 2014
    Publication date: August 7, 2014
    Applicant: Headway Technologies, Inc.
    Inventors: Kunliang Zhang, Min Li, Yuchen Zhou
  • Perpendicular magnetic medium with shields between tracks
    Patent number: 8795763
    Abstract: A track shield structure is disclosed that enables higher track density to be achieved in a patterned track medium without increasing adjacent track erasure and side reading. This is accomplished by placing a soft magnetic shielding structure in the space that is present between the tracks in the patterned medium. A process for manufacturing the added shielding structure is also described.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: August 5, 2014
    Assignee: Headway Technologies, Inc.
    Inventors: Yuchen Zhou, Lijie Guan, Kunliang Zhang
  • APPARATUS FOR INITIALIZING PERPENDICULAR MRAM DEVICE
    Publication number: 20140204662
    Abstract: The present invention is directed to an apparatus for initializing perpendicular magnetic tunnel junction. The apparatus comprises a permanent magnet for generating a magnetic flux; a flux concentrator made of a soft ferromagnetic material and having a base area in contact with the permanent magnet and an tip area that is smaller than the base area, thereby funneling and concentrating the magnetic flux to the tip area for emitting a magnetic field therefrom; and a means for supporting and conveying a substrate with an arrays of magnetic tunnel junctions formed therein to traverse the magnetic field in close proximity to the tip area. The apparatus may further include at least one of the following: a substrate heater, a flux containment structure coupled to the permanent magnet, and a magnetic imaging plate disposed in proximity to the substrate on the opposite side from the flux concentrator.
    Type: Application
    Filed: March 19, 2014
    Publication date: July 24, 2014
    Applicant: Avalanche Technology Inc.
    Inventor: Yuchen Zhou
  • SHIELDS FOR MAGNETIC MEMORY CHIP PACKAGES
    Publication number: 20140197505
    Abstract: Chip packages are described with soft-magnetic shields that are included inside or attached externally to the package containing a MRAM chip. In one group of embodiments a single shield with vias for bonding wires is affixed to the surface of the MRAM chip having the contact pads. The limitation of shield to chip distance due to bonding wire is eliminated by VIA holes according to the invention which achieves minimal spacing between the shield and chip. A second shield without vias can be positioned on the opposite side of the chip from the first shield. In one group of embodiments a hardened ferro-fluid shield can be the only shield or the structure can include a shield with or without vias. One group of embodiments includes an external shield with vias for solder access to the package contact pads affixed to the outer surface of the package.
    Type: Application
    Filed: January 12, 2013
    Publication date: July 17, 2014
    Applicant: AVALANCHE TECHNOLOGY INC.
    Inventors: Yuchen Zhou, Bernardo Sardinha, Rajiv Yadav Ranjan, Ebrahim Abedifard, Roger Klas Malmhall, Zihui Wang, Yiming Huai, Jing Zhang
  • Spin transfer torque magnetic random access memory (STTMRAM) having graded synthetic free layer
    Patent number: 8779537
    Abstract: A spin transfer torque memory random access memory (STTMRAM) element is capable of switching states when electrical current is applied thereto for storing data and includes the following layers. An anti-ferromagnetic layer, a fixed layer formed on top of the anti-ferromagnetic layer, a barrier layer formed on top of the second magnetic layer of the fixed layer, and a free layer including a first magnetic layer formed on top of the barrier layer, a second magnetic layer formed on top of the first magnetic layer, a nonmagnetic insulating layer formed on top of the second magnetic layer and a third magnetic layer formed on top of the non-magnetic insulating layer. A capping layer is formed on top of the non-magnetic insulating layer.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: July 15, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Yiming Huai, Rajiv Yadav Ranjan, Roger Klas Malmhall, Yuchen Zhou
  • MTJ MRAM with stud patterning
    Patent number: 8772888
    Abstract: Use of a multilayer etching mask that includes a stud mask and a removable spacer sleeve for MTJ etching to form a bottom electrode that is wider than the rest of the MTJ pillar is described. The first embodiment of the invention described includes a top electrode and a stud mask. In the second and third embodiments the stud mask is a conductive material and also serves as the top electrode. In embodiments after the stud mask is formed a spacer sleeve is formed around it to initially increase the masking width for a phase of etching. The spacer is removed for further etching, to create step structures that are progressively transferred down into the layers forming the MTJ pillar. In one embodiment the spacer sleeve is formed by net polymer deposition during an etching phase.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: July 8, 2014
    Assignee: Avalanche Technology Inc.
    Inventors: Dong Ha Jung, Kimihiro Satoh, Jing Zhang, Yuchen Zhou, Yiming Huai
  • Spin transfer torque magnetic random access memory (STTMRAM) having graded synthetic free layer
    Patent number: 8772886
    Abstract: A spin transfer torque memory random access memory (STTMRAM) element is capable of switching states when electrical current is applied thereto for storing data and includes the following layers. An anti-ferromagnetic layer, a fixed layer formed on top of the anti-ferromagnetic layer, a barrier layer formed on top of the second magnetic layer of the fixed layer, and a free layer including a first magnetic layer formed on top of the barrier layer, a second magnetic layer formed on top of the first magnetic layer, a non-magnetic insulating layer formed on top of the second magnetic layer and a third magnetic layer formed on top of the non-magnetic insulating layer. A capping layer is formed on top of the non-magnetic insulating layer.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: July 8, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Yiming Huai, Rajiv Yadav Ranjan, Ioan Tudosa, Roger Klas Malmhall, Yuchen Zhou
  • MAGNETIC RANDOM ACCESS MEMORY HAVING PERPENDICULAR ENHANCEMENT LAYER AND INTERFACIAL ANISOTROPIC FREE LAYER
    Publication number: 20140183608
    Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.
    Type: Application
    Filed: March 5, 2014
    Publication date: July 3, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Huadong Gan, Yiming Huai, Xiaobin Wang, Yuchen Zhou, Zihui Wang
  • STT-MRAM MTJ manufacturing method with in-situ annealing
    Patent number: 8758850
    Abstract: A spin transfer torque magnetic random access memory (STTMRAM) element and a method of manufacturing the same is disclosed having a free sub-layer structure with enhanced internal stiffness. A first free sub-layer is deposited, the first free sub-layer being made partially of boron (B), annealing is performed of the STTMRAM element at a first temperature after depositing the first free sub-layer to reduce the B content at an interface between the first free sub-layer and the barrier layer, the annealing causing a second free sub-layer to be formed on top of the first free sub-layer and being made partially of B, the amount of B of the second free sub-layer being greater than the amount of B in the first free sub-layer.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: June 24, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Yiming Huai
  • MTJ STACK AND BOTTOM ELECTRODE PATTERNING PROCESS WITH ION BEAM ETCHING USING A SINGLE MASK
    Publication number: 20140170776
    Abstract: Fabrication methods using Ion Beam Etching (IBE) for MRAM cell memory elements are described. In embodiments of the invention the top electrode and MTJ main body are etched with one mask using reactive etching such as RIE or magnetized inductively coupled plasma (MICP) for improved selectivity, then the bottom electrode is etched using IBE as specified in various alternative embodiments which include selection of incident angles, wafer rotational rate profiles and optional passivation layer deposited prior to the IBE. The IBE according to the invention etches the bottom electrode without the need for an additional mask by using the layer stack created by the first etching phase as the mask. This makes the bottom electrode self-aligned to MTJ. The IBE also achieves MTJ sidewall cleaning without the need for an additional step.
    Type: Application
    Filed: December 4, 2013
    Publication date: June 19, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Kimihiro Satoh, Dong Ha Jung, Jing Zhang, Benjamin Chen, Yiming Huai, Rajiv Yadav Ranjan, Yuchen Zhou
  • MAGNETORESISTIVE LAYER STRUCTURE WITH VOLTAGE-INDUCED SWITCHING AND LOGIC CELL APPLICATION
    Publication number: 20140169083
    Abstract: Embodiments of the invention include a voltage-switching MTJ cell structure that includes two sub-MTJs in series. Each free layer can be switched independently from the other. Each sub-MTJ has a high and a low resistance state and the MTJ cell structure can have three or four discrete resistance states. By taking advantage of the electrical field induced anisotropy combining with the spin torque effect, free layer-1 and free layer-2 can be controlled individually by voltage pulses having selected sign (polarity) and amplitude characteristics. The MTJ cell structure can be used as a fully functional logic cell with two input bit values corresponding to the high or low resistance of the two sub-MTJ structures and the output of a logical operation, e.g. an XOR function, determined by the resistance state of each MTJ cell.
    Type: Application
    Filed: August 27, 2013
    Publication date: June 19, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Zihui Wang, Yuchen Zhou, Yiming Huai
  • MAGNETIC RANDOM ACCESS MEMORY HAVING PERPENDICULAR ENHANCEMENT LAYER
    Publication number: 20140151827
    Abstract: The present invention is directed to an STT-MRAM device including a plurality of magnetic tunnel junction (MTJ) memory elements. Each of the memory elements comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween; and a magnetic fixed layer separated from the magnetic reference layer structure by an anti-ferromagnetic coupling layer.
    Type: Application
    Filed: February 5, 2014
    Publication date: June 5, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Yuchen Zhou, Zihui Wang, Huadong Gan, Yiming Huai
  • Method for reading and writing multi-level cells
    Patent number: 8724380
    Abstract: The present invention is directed to a method for reading and writing an STT-MRAM multi-level cell (MLC), which includes a plurality of MTJ memory elements coupled in series. The method detects the resistance states of individual MTJ memory elements in an MLC by sequentially writing each memory element to the low resistance state in order of ascending parallelizing write current threshold. If a written element switches the resistance state thereof after the write step, then the written element was in the high resistance state prior to the write step. Otherwise, the written element was in the low resistance state prior to the write step. The switching of the resistance state can be ascertained by comparing the resistance or voltage values of the plurality of memory elements before and after writing each of the plurality of memory elements in accordance with the embodiments of the present invention.
    Type: Grant
    Filed: November 13, 2013
    Date of Patent: May 13, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Ebrahim Abedifard, Parviz Keshtbod, Mahmood Mozaffari, Kimihiro Satoh, Bing K Yen, Yiming Huai
  • TRILL optimal forwarding and traffic engineered multipathing in cloud switching
    Patent number: 8717944
    Abstract: In one embodiment, a plurality of leaf switches that include host facing ports are configured as a cloud switch. An indication of connectivity between the leaf switches of the cloud switch and routing bridges (RBridges) external to the cloud switch may be added to link state packets (LSPs) sent over the at least one logical shared media link. A lookup table may be generated that specifies next hop leaf switches. The generated lookup table may be used to forward frames to one or more particular nexthop leaf switches. Further, traffic engineering parameters may be collected. Equal cost multipath (ECMP) nexthop leaf switches and distribution trees to reach one or more destinations may be examined. Traffic may be distributed across ones of them based on the traffic engineering parameters.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: May 6, 2014
    Assignee: Cisco Technology, Inc.
    Inventors: Chia Alex Tsai, Yibin Yang, Minjie Lin, Yuchen Zhou, Weng Hong Chan
  • Patterned MR device with controlled shape anisotropy
    Patent number: 8711524
    Abstract: A magnetic sensor with increased sensitivity, lower noise, and improved frequency response is described. The sensor's free layer is ribbon shaped and is closely flanked at each long edge by a ribbon of magnetically soft, high permeability material. This side pattern absorbs external field flux, concentrating it to flow into the sensor's edges to promote larger MR sensor magnetization rotation.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: April 29, 2014
    Assignee: Headway Technologies, Inc.
    Inventors: Yuchen Zhou, Yimin Guo
  • MR enhancing layer (MREL) for spintronic devices
    Patent number: 8692343
    Abstract: The performance of an MR device has been improved by inserting one or more Magneto-Resistance Enhancing Layers (MRELs) into approximately the center of one or more of the active layers (such as AP1, SIL, FGL, and Free layers). An MREL is a layer of a low band gap, high electron mobility semiconductor such as ZnO or a semimetal such as Bi.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: April 8, 2014
    Assignee: Headway Technologies, Inc.
    Inventors: Kunliang Zhang, Min Li, Yuchen Zhou
  • METHODS AND APPARATUSES FOR RAPID TRILL CONVERGENCE THROUGH INTEGRATION WITH LAYER TWO GATEWAY PORT
    Publication number: 20140092780
    Abstract: Methods and apparatuses for rapid TRILL convergence are disclosed herein. The methods can be implemented in a network including a plurality of RBridges or in a cloud network environment including a plurality of cloud switch domains. An example method for rapid TRILL convergence can include: Executing a spanning tree protocol (STP) for network topology in a network; and executing a Hello protocol for control and forwarding at the RBridge. The Hello protocol can be configured to elect a designated RBridge and assign an appointed forwarder. The method can also include assigning a transient appointed forwarder during a period of time between convergence of the STP and convergence of the Hello protocol. The transient appointed forwarder can be configured to forward frames in the network during the period of time between convergence of the STP and convergence of the Hello protocol.
    Type: Application
    Filed: October 3, 2012
    Publication date: April 3, 2014
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Yibin Yang, Chiajen Tsai, Patnala Debashis Rao, Yuchen Zhou
  • Ultrasonic device with integrated specimen dispenser
    Patent number: 8679039
    Abstract: This application teaches a novel ultrasonic skin care device with a built-in specimen containment and a dispensing mechanism to enable easy application of the specimen for hygiene operation of the device for skin beautification purpose. The device provides portability for usage anywhere and anytime and provides a flexibility of multi-purpose skin care treatment with a unique design of multiple specimen containment structures.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: March 25, 2014
    Assignee: La Pierres, Inc.
    Inventors: Hieu Tieu, Yuchen Zhou, Chao Uei Wahng
  • TRILL OPTIMAL FORWARDING AND TRAFFIC ENGINEERED MULTIPATHING IN CLOUD SWITCHING
    Publication number: 20140056178
    Abstract: In one embodiment, a plurality of leaf switches that include host facing ports are configured as a cloud switch. An indication of connectivity between the leaf switches of the cloud switch and routing bridges (RBridges) external to the cloud switch may be added to link state packets (LSPs) sent over the at least one logical shared media link. A lookup table may be generated that specifies next hop leaf switches. The generated lookup table may be used to forward frames to one or more particular nexthop leaf switches. Further, traffic engineering parameters may be collected. Equal cost multipath (ECMP) nexthop leaf switches and distribution trees to reach one or more destinations may be examined. Traffic may be distributed across ones of them based on the traffic engineering parameters.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 27, 2014
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Chia Alex Tsai, Yibin Yang, Minjie Lin, Yuchen Zhou, Weng Hong Chan
  • MR sensor with flux guide enhanced hard bias structure
    Patent number: 8659292
    Abstract: A CPP MR sensor interposes a tapered soft magnetic flux guide (FG) layer between a hard magnetic biasing layer (HB) and the free layer of the sensor stack. The flux guide channels the flux of the hard magnetic biasing layer to effectively bias the free layer, while eliminating instability problems associated with magnetostatic coupling between the hard bias layers and the upper and lower shields surrounding the sensor when the reader-shield-spacing (RSS) is small.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: February 25, 2014
    Assignee: Headway Technologies, Inc.
    Inventors: Yuchen Zhou, Tong Zhao, Kunliang Zhang