Patents by Inventor Yuchen Zhou

Yuchen Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140042567
    Abstract: Use of a multilayer etching mask that includes a stud mask and a removable spacer sleeve for MTJ etching to form a bottom electrode that is wider than the rest of the MTJ pillar is described. The first embodiment of the invention described includes a top electrode and a stud mask. In the second and third embodiments the stud mask is a conductive material and also serves as the top electrode. In embodiments after the stud mask is formed a spacer sleeve is formed around it to initially increase the masking width for a phase of etching. The spacer is removed for further etching, to create step structures that are progressively transferred down into the layers forming the MTJ pillar. In one embodiment the spacer sleeve is formed by net polymer deposition during an etching phase.
    Type: Application
    Filed: August 10, 2012
    Publication date: February 13, 2014
    Inventors: Dong Ha Jung, Kimihiro Satoh, Jing Zhang, Yuchen Zhou, Yiming Huai
  • Publication number: 20140042571
    Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.
    Type: Application
    Filed: October 14, 2013
    Publication date: February 13, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Huadong Gan, Yiming Huai, Yuchen Zhou, Xiaobin Wang, Zihui Wang, Bing K Yen
  • Publication number: 20140038314
    Abstract: A spin toque transfer magnetic random access memory (STTMRAM) element and a method of manufacturing the same is disclosed having a free sub-layer structure with enhanced internal stiffness. A first free sub-layer is deposited, the first free sub-layer being made partially of boron (B), annealing is performed of the STTMRAM element at a first temperature after depositing the first free sub-layer to reduce the B content at an interface between the first free sub-layer and the barrier layer, the annealing causing a second free sub-layer to be formed on top of the first free sub-layer and being made partially of B, the amount of B of the second free sub-layer being greater than the amount of B in the first free sub-layer.
    Type: Application
    Filed: October 11, 2013
    Publication date: February 6, 2014
    Applicant: Avalanche Technology, Inc.
    Inventor: Yuchen Zhou
  • Publication number: 20140027697
    Abstract: A STTMRAM element includes a magnetization layer made of a first free layer and a second free layer, separated by a non-magnetic separation layer (NMSL), with the first and second free layers each having in-plane magnetizations that act on each other through anti-parallel coupling. The direction of the magnetization of the first and second free layers each is in-plane prior to the application of electrical current to the STTMRAM element and thereafter, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued to the STTMRAM element, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.
    Type: Application
    Filed: June 19, 2013
    Publication date: January 30, 2014
    Inventors: Yuchen Zhou, Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Roger Klas Malmhall
  • Patent number: 8633720
    Abstract: High-frequency resonance method is used to measure magnetic parameters of magnetic thin film stacks that show magnetoresistance including MTJs and giant magnetoresistance spin valves. The thin film sample can be unpatterned. Probe tips are electrically connected to the surface of the film (or alternatively one probe tip can be punched into the thin film stack) and voltage measurements are taken while injecting high frequency oscillating current between them to cause a change in electrical resistance when one of the layers in the magnetic film stack changes direction. A measured resonance curve can be determined from voltages at different current frequencies. The damping, related to the width of the resonance curve peak, is determined through curve fitting. In embodiments of the invention a variable magnetic field is also applied to vary the resonance frequency and extract the magnetic anisotropy and/or magnetic saturation of the magnetic layers.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: January 21, 2014
    Assignee: Avalanche Technology Inc.
    Inventors: Ioan Tudosa, Yuchen Zhou, Jing Zhang, Rajiv Yadav Ranjan, Yiming Huai
  • Publication number: 20140015078
    Abstract: A spin transfer torque memory random access memory (STTMRAM) element is capable of switching states when electrical current is applied thereto for storing data and includes the following layers. An anti-ferromagnetic layer, a fixed layer formed on top of the anti-ferromagnetic layer, a barrier layer formed on top of the second magnetic layer of the fixed layer, and a free layer including a first magnetic layer formed on top of the barrier layer, a second magnetic layer formed on top of the first magnetic layer, a nonmagnetic insulating layer formed on top of the second magnetic layer and a third magnetic layer formed on top of the non-magnetic insulating layer. A capping layer is formed on top of the non-magnetic insulating layer.
    Type: Application
    Filed: September 16, 2013
    Publication date: January 16, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Yiming Huai, Rajiv Yadav Ranjan, Roger Klas Malmhall, Yuchen Zhou
  • Publication number: 20140015076
    Abstract: A spin toque transfer magnetic random access memory (STTMRAM) element comprises a reference layer, which can be a single layer structure or a synthetic multi-layer structure, formed on a substrate, with a fixed perpendicular magnetic component. A junction layer is formed on top of the reference layer and a free layer is formed on top of the junction layer with a perpendicular magnetic orientation, at substantially its center of the free layer and switchable. A tuning layer is formed on top of the free layer and a fixed layer is formed on top of the tuning layer, the fixed layer has a fixed perpendicular magnetic component opposite to that of the reference layer. The magnetic orientation of the free layer switches relative to that of the fixed layer. The perpendicular magnetic components of the fixed layer and the reference layer substantially cancel each other and the free layer has an in-plane edge magnetization field.
    Type: Application
    Filed: September 13, 2013
    Publication date: January 16, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Huadong Gan, Yuchen Zhou, Yiming Huai
  • Publication number: 20140008744
    Abstract: A spin-torque transfer magnetic random access memory (STTMRAM) element employed to store a state based on the magnetic orientation of a free layer, the STTMRAM element is made of a first perpendicular free layer (PFL) including a first perpendicular enhancement layer (PEL). The first PFL is formed on top of a seed layer. The STTMRAM element further includes a barrier layer formed on top of the first PFL and a second perpendicular reference layer (PRL) that has a second PEL, the second PRL is formed on top of the barrier layer. The STTMRAM element further includes a capping layer that is formed on top of the second PRL.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Yiming Huai, Yuchen Zhou, Huadong Gan, Zihui Wang
  • Publication number: 20140010003
    Abstract: A testing method is described that applies a sequence external magnetic fields of varying strength to MRAM cells (such as those with MTJ memory elements) in chips or wafers to selectively screen out cells with low or high thermal stability factor. The coercivity (Hc) is used as a proxy for thermal stability factor (delta). In the various embodiments the sequence, direction and strength of the external magnetic fields is used to determine the high coercivity cells that are not switched by a normal field and the low coercivity cells that are switched by a selected low field. In some embodiment the MRAM's standard internal electric current can be used to switch the cells. Standard circuit-based resistance read operations can be used to determine the response of each cell to these magnetic fields and identify the abnormal high and low coercivity cells.
    Type: Application
    Filed: August 16, 2013
    Publication date: January 9, 2014
    Applicant: Avalanche Technology Inc.
    Inventors: Yuchen Zhou, Ebrahim Abedifard, Yiming Huai
  • Patent number: 8625235
    Abstract: A main pole layer having at least a leading taper and trimmed pole tip portion is described. The leading taper increases head field up to ?15000 Oe even for narrow track widths approaching 50 nm. For MAMR applications, a STO and trailing shield are sequentially formed on a trailing pole tip side. Furthermore, full side shields may be added to reduce fringing field. A preferred embodiment includes both of a leading taper and trailing taper at the pole tip where leading taper angle is between 20° and 60° and trailing taper angle is from 10° to 45°. A method is provided for forming various embodiments of the present invention. A key feature is that milling depth at an effective neck height distance is greater than or equal to the pole tip thickness. A self aligned STO may be formed by the same ion milling step that defines track width.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: January 7, 2014
    Assignee: Headway Technologies, Inc.
    Inventors: Kenichi Takano, Yuchen Zhou, Min Li, Joe Smyth
  • Patent number: 8623452
    Abstract: A spin toque transfer magnetic random access memory (STTMRAM) element and a method of manufacturing the same is disclosed having a free sub-layer structure with enhanced internal stiffness. A first free sub-layer is deposited, the first free sub-layer being made partially of boron (B), annealing is performed of the STTMRAM element at a first temperature after depositing the first free sub-layer to reduce the B content at an interface between the first free sub-layer and the barrier layer, the annealing causing a second free sub-layer to be formed on top of the first free sub-layer and being made partially of B, the amount of B of the second free sub-layer being greater than the amount of B in the first free sub-layer.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: January 7, 2014
    Assignee: Avalanche Technology, Inc.
    Inventor: Yuchen Zhou
  • Publication number: 20130334633
    Abstract: A spin transfer torque magnetic random access memory (STTMRAM) magnetic tunnel junction (MTJ) stack includes layers to which when electric current is applied cause switching of the direction of magnetization of at least one of the layer. The STTMRAM MTJ stack includes a reference layer (RL) with a direction of magnetization that is fixed upon manufacturing of the STTMRAM MTJ stack, a junction layer (JL) formed on top of the RL, a free layer (FL) formed on top of the JL. The FL has a direction of magnetization that is switchable relative to that of the RL upon the flow of electric current through the spin transfer torque magnetic random access memory (STTMRAM) magnetic tunnel junction (MTJ) stack. The STTMRAM MTJ stack further includes a spin confinement layer (SCL) formed on top of the FL, the SCL made of ruthenium.
    Type: Application
    Filed: June 6, 2013
    Publication date: December 19, 2013
    Inventors: Yuchen Zhou, Yiming Huai, Zihui Wang, Dong Ha Jung
  • Patent number: 8611145
    Abstract: A spin-torque transfer memory random access memory (STTMRAM) cell is disclosed comprising a selected magnetic tunnel junction (MTJ) identified to be programmed; a first transistor having a first port, a second port and a gate, the first port of the first transistor coupled to the selected MTJ; a first neighboring MTJ coupled to the selected MTJ through the second port of the first transistor; a second transistor having a first port, a second port, and a gate, the first port of the second transistor coupled to the selected MTJ; a second neighboring MTJ coupled to the selected MTJ through the second port of the second transistor; a first bit/source line coupled to the second end of the selected MTJ; and a second bit/source line coupled to the second end of the first neighboring MTJ and the second end of the second neighboring MTJ.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: December 17, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Ebrahim Abedifard, Zihui Wang
  • Patent number: 8598576
    Abstract: A spin toque transfer magnetic random access memory (STTMRAM) element comprises a reference layer, formed on a substrate, with a fixed perpendicular magnetic component. A junction layer is formed on top of the reference layer and a free layer is formed on top of the junction layer with a perpendicular magnetic orientation, at substantially its center of the free layer and switchable. A spacer layer is formed on top of the free layer and a fixed layer is formed on top of the spacer layer, the fixed layer has a fixed perpendicular magnetic component opposite to that of the reference layer. The magnetic orientation of the free layer switches relative to that of the fixed layer. The perpendicular magnetic components of the fixed layer and the reference layer substantially cancel each other and the free layer has an in-plane edge magnetization field.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: December 3, 2013
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Yiming Huai, Rajiv Yadav Ranjan
  • Publication number: 20130314982
    Abstract: A testing method is described that applies a sequence external magnetic fields of varying strength to MRAM cells (such as those with MTJ memory elements) in chips or wafers to selectively screen out cells with low or high thermal stability factor. The coercivity (Hc) is used as a proxy for thermal stability factor (delta). In the various embodiments the sequence, direction and strength of the external magnetic fields is used to determine the high coercivity cells that are not switched by a normal field and the low coercivity cells that are switched by a selected low field. In some embodiments the MRAM's standard internal electric current can be used to switch the cells. Standard circuit-based resistance read operations can be used to determine the response of each cell to these magnetic fields and identify the abnormal high and low coercivity cells.
    Type: Application
    Filed: August 5, 2013
    Publication date: November 28, 2013
    Applicant: Avalanche Technology Inc.
    Inventors: Yuchen Zhou, Ebrahim Abedifard, Yiming Huai
  • Publication number: 20130316367
    Abstract: The invention describes a family of sensors for assaying macro-molecules and/or biological cells in solution. The invention also describes methods of making and using the sensors. Each sensor has the form of a well (a hollow cylinder having a floor but no lid) or a trench whose walls comprise a plurality of GMR or TMR devices. Suitably shaped magnets located below each well's floor pull labeled particles into the well/trench and up against the inner wall where a field gradient orients them for optimum detection. Any unattached labels that happen to also be in the well/trench are removed through suitably sized holes in the floor.
    Type: Application
    Filed: July 31, 2013
    Publication date: November 28, 2013
    Applicant: Headway Technologies, Inc.
    Inventor: Yuchen Zhou
  • Publication number: 20130301407
    Abstract: In one embodiment, a period between periodic transmissions of protocol data units (PDUs) used to form or maintain a link aggregation group is initially set to a fixed value. When a stress condition is detected, the period between periodic transmissions of PDUs is increased from the initial value. When the stress condition is determined to have eased, the period between periodic transmissions of PDUs is reduced back toward the fixed value.
    Type: Application
    Filed: May 8, 2012
    Publication date: November 14, 2013
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Yuchen Zhou, Chia Alex Tsai, Yibin Yang, Rajagopalan Janakiraman
  • Publication number: 20130301427
    Abstract: In one embodiment, one or more indicia of stress are monitored. Based on the one or more indicia of stress, it is determined a stress condition exists. In response to the stress condition, one or more link aggregation actors and partners are caused to enter a grace state for a grace period. While the one or more link aggregation actors and partners are in the grace state, link aggregation formation is paced on a plurality of links by delaying formation of one or more new link aggregation groups on the plurality of links until a hold is released. Upon expiration of the grace period, the grace state is exited.
    Type: Application
    Filed: May 8, 2012
    Publication date: November 14, 2013
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Chia Alex Tsai, Yuchen Zhou, Rajagopalan Janakiraman, Yibin Yang
  • Publication number: 20130292785
    Abstract: A magnetic random access memory (MRAM) element is configured to store a state when electric current flows therethrough. The MRAM element includes a first magnetic tunnel junction (MTJ) for storing a data bit and a reference bit MTJ for storing a reference bit. The data bit MTJ and reference bit MTJ are preferred to be of identical structure that includes a magnetic free layer (FL) having a switchable magnetization with a direction that is perpendicular to a film plane. The direction of magnetization of the FL is determinative of the data bit stored in the at least one MTJ. The identical structure further includes a magnetic reference layer (RL) having a magnetization with a direction that is perpendicular to the film plane, and a magnetic pinned layer (PL) having a magnetization with a direction that is perpendicular to the film plane.
    Type: Application
    Filed: July 10, 2013
    Publication date: November 7, 2013
    Inventors: Yuchen Zhou, Yiming Huai
  • Publication number: 20130294144
    Abstract: A testing method is described for performing a fast bit-error rate (BER) measurement on resistance-based RAM cells, such MTJ cells, at the wafer or chip level. Embodiments use one or more specially designed test memory cells fabricated with direct electrical connections between the two electrodes of the cell and external contact pads (or points) on the surface of the wafer (or chip). In the test setup the memory cell is connected an impedance mismatched transmission line through a probe for un-buffered, fast switching of the cell between the high and low resistance states without the need for CMOS logic to select and drive the cell. The unbalanced transmission line is used generate signal reflections from the cell that are a function of the resistance state. The reflected signal is used to detect whether the test cell has switched as expected.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 7, 2013
    Inventors: Zihui Wang, Yuchen Zhou, Jing Zhang, Yiming Huai