Abstract: A method includes: obtaining impact values for characteristic conditions; selecting training data subsets respectively from training data sets according to the impact values; obtaining a candidate model and an evaluation value based on the training data subsets; supplementing the training data subsets according to the impact values; obtaining another candidate model and another evaluation value based on training data subsets thus supplemented; repeating the step of supplementing the training data subset, and the step of obtaining another candidate model and another evaluation value based on the training data subsets thus supplemented; and selecting one of the candidate models as a prediction model based on the evaluation values.

Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.

Abstract: A terminal, comprising one or a plurality of processors, wherein the one or plurality of processors execute a machine-readable instruction to perform: receiving an object in a live streaming; displaying the object on the terminal; detecting a keyword in the object corresponding to a function in the live streaming; and triggering the function in response to an operation on the object. The present disclosure may allow the streamers to generate or amend an object such as stickers on the live streaming room in a more flexible manner. At the same time, the viewer may perform an operation on the object to realize a corresponding function in a more convenient manner. Therefore, the interaction among streamers and viewers may be increased, and the user experience may also be enhanced.

Abstract: A resistive memory apparatus including a memory cell array, at least one dummy transistor and a control circuit is provided. The memory cell array includes a plurality of memory cells. Each of the memory cells includes a resistive switching element. The dummy transistor is electrically isolated from the resistive switching element. The control circuit is coupled to the memory cell array and the dummy transistor. The control circuit is configured to provide a first bit line voltage, a source line voltage and a word line voltage to the dummy transistor to drive the dummy transistor to output a saturation current. The control circuit is further configured to determine a value of a second bit line voltage for driving the memory cells according to the saturation current. In addition, an operating method and a memory cell array of the resistive memory apparatus are also provided.

Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.

Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.

Abstract: A method for determining a road type includes measuring, for a preset period, a magnetic field of an environment in which an electronic device is located to obtain a plurality of magnetic field values, calculating an absolute value of a difference between every two adjacent magnetic field values among the magnetic field values sorted in chronological order, calculating an average of the absolute values related to the magnetic field values to serve as a variation value for the environment, determining whether the variation value is smaller than a predetermined threshold value, determining that the environment is a surface road when the determination result is affirmative, and determining that the environment is a non-surface road when the determination result is negative.

Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: A metal adhesion layer may be formed on a bottom and a sidewall of a trench prior to formation of a metal plug in the trench. A plasma may be used to modify the phase composition of the metal adhesion layer to increase adhesion between the metal adhesion layer and the metal plug. In particular, the plasma may cause a shift or transformation of the phase composition of the metal adhesion layer to cause the metal adhesion layer to be composed of a (111) dominant phase. The (111) dominant phase of the metal adhesion layer increases adhesion between the metal adhesion layer.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.

Abstract: A module device on a first substrate includes a power module, a housing, a pair of locking structures. The housing covers the power module. The locking structures are installed on a pair of opposite sides of the housing, and the locking structure includes a main body, a locking ring, a pair of ribs and anchoring portions. The locking ring extends from a side toward an inner side of the main body, and is a double-ring structure, which includes an inner and an outer ring. A first side of the outer ring is connected to the main body, a second side of the outer ring is connected to the inner ring. The ribs extend along a normal direction of the top surface of the main body. The anchoring portions are disposed at the end of the ribs, and an extending direction is perpendicular to an extending direction of the rib.

Abstract: A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.

Abstract: A method of a circuit signal enhancement of a circuit board comprises the following steps: forming a first substrate body with a first signal transmission circuit layer and a second substrate body with a second signal transmission circuit layer; forming a first signal enhancement circuit layer and a second signal enhancement circuit layer on the first substrate body and the second substrate body; forming a third substrate body with a third signal transmission circuit layer and a fourth substrate body with a fourth signal transmission circuit layer on the carrier; separating the third substrate body and the fourth substrate body from the carrier; combining the first signal transmission circuit layer and the third signal transmission circuit layer through the first signal enhancement circuit layer; and combining the second signal transmission circuit layer and the fourth signal transmission circuit layer through the second signal enhancement circuit layer.

Abstract: A semiconductor device according to embodiments of the present disclosure includes a first die including a first bonding layer and a second die including a second hybrid bonding layer. The first bonding layer includes a first dielectric layer and a first metal coil embedded in the first dielectric layer. The second bonding layer includes a second dielectric layer and a second metal coil embedded in the second dielectric layer. The second hybrid bonding layer is bonded to the first hybrid bonding layer such that the first dielectric layer is bonded to the second dielectric layer and the first metal coil is bonded to the second metal coil.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first diffusion barrier layer made of a dielectric material including a metal element, nitrogen, and oxygen and a first protection layer made of a dielectric material including silicon and oxygen and in direct contact with the top surface of the first diffusion barrier layer. The semiconductor device structure also includes a first thickening layer made of a dielectric material including the metal element and oxygen and in direct contact with the top surface of the first protection layer. A maximum metal content in the first thickening layer is greater than that in the first diffusion barrier layer. The semiconductor device structure further includes a conductive feature surrounded by and in direct contact with the first diffusion barrier layer, the first protection layer, and the first thickening layer.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.

Abstract: A semiconductor device includes a first die having a first bonding layer; a second die having a second bonding layer disposed over and bonded to the first bonding layer; a plurality of bonding members, wherein each of the plurality of bonding members extends within the first bonding layer and the second bonding layer, wherein the plurality of bonding members includes a connecting member electrically connected to a first conductive pattern in the first die and a second conductive pattern in the second die, and a dummy member electrically isolated from the first conductive pattern and the second conductive pattern; and an inductor disposed within the first bonding layer and the second bonding layer. A method of manufacturing a semiconductor device includes bonding a first inductive coil of a first die to a second inductive coil of a second die to form an inductor.