Patents by Inventor Yueh-Chin Lin

Yueh-Chin Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120313107
    Abstract: A semiconductor device includes a main body made of a GaN-based semiconductor material, and at least one electrode structure. The electrode structure includes an ohmic contact layer that is formed on the main body, a buffer layer that is formed on the ohmic contact layer opposite to the main body, and a circuit layer that is made of a copper-based material and that is formed on the buffer layer opposite to the ohmic contact layer. The ohmic contact layer is made of a material selected from titanium, aluminum, nickel, and alloys thereof. The buffer layer is made of a material different from the material of the ohmic contact layer and selected from titanium, tungsten, titanium nitride, tungsten nitride, and combinations thereof.
    Type: Application
    Filed: February 8, 2012
    Publication date: December 13, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Yi CHANG, Chia-Hua CHANG, Yueh-Chin LIN, Yu-Kong CHEN, Ting-En SHIE
  • Publication number: 20120238064
    Abstract: This invention discloses an enhancement-mode high-electron-mobility transistor and the manufacturing method thereof. The transistor comprises an epitaxial buffer layer on a substrate, a source and drain formed in the buffer layer, a PN-junction stack formed on the buffer layer and located between the source and drain, and a gate formed on the PN-junction stack, wherein the PN-junction stack is composed of alternating layers of a P-type semiconductor and an N-type semiconductor.
    Type: Application
    Filed: June 4, 2012
    Publication date: September 20, 2012
    Applicant: National Chiao Tung University
    Inventors: EDWARD YI CHANG, Chia-Hua Chang, Yueh-Chin Lin
  • Publication number: 20120122281
    Abstract: A method for fabricating a GaN-based thin film transistor includes: forming a semiconductor epitaxial layer on a substrate, the semiconductor epitaxial layer having a n-type GaN-based semiconductor material; forming an insulating layer on the semiconductor epitaxial layer; forming an ion implanting mask on the insulating layer, the ion implanting mask having an opening to partially expose the insulating layer; ion-implanting a p-type impurity through the opening and the insulating layer to form a p-doped region in the n-type GaN-based semiconductor material, followed by removing the insulating layer and the ion implanting mask; forming a dielectric layer on the semiconductor epitaxial layer; partially removing the dielectric layer; forming source and drain electrodes; and forming a gate electrode.
    Type: Application
    Filed: May 27, 2011
    Publication date: May 17, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Yi Chang, Chia-Hua Chang, Yueh-Chin Lin
  • Publication number: 20120080760
    Abstract: The present invention discloses a dielectric structure, a transistor and a manufacturing method thereof with praseodymium oxide. The transistor with praseodymium oxide comprises at least a III-V substrate, a gate dielectric layer and a gate. The gate dielectric layer is disposed on the III-V substrate, and the gate is disposed on the gate dielectric layer, and the gate dielectric layer is praseodymium oxide (PrxOy), which has a high dielectric constant and a high band gap. By using the praseodymium oxide (Pr6O11) as the material of the gate dielectric layer in the present invention, the leakage current could be inhibited, and the equivalent oxide thickness (EOT) of the device with the III-V substrate could be further lowered.
    Type: Application
    Filed: December 13, 2010
    Publication date: April 5, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Edward-Yi Chang, Yueh-Chin Lin
  • Publication number: 20120032279
    Abstract: A barrier layer, hafnium oxide layer, between a III-V semiconductor layer and an lanthanum oxide layer is used to prevent interaction between the III-V semiconductor layer and the lanthanum oxide layer. Meanwhile, the high dielectric constant of the lanthanum oxide can be used to increase the capacitance of the semiconductor device.
    Type: Application
    Filed: August 3, 2010
    Publication date: February 9, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Edward Yi CHANG, Yueh-Chin LIN
  • Publication number: 20120025270
    Abstract: This invention discloses an enhancement-mode high-electron-mobility transistor and the manufacturing method thereof. The transistor comprises an epitaxial buffer layer on a substrate, a source and drain formed in the buffer layer, a PN-junction stack formed on the buffer layer and located between the source and drain, and a gate formed on the PN-junction stack, wherein the PN-junction stack is composed of alternating layers of a P-type semiconductor and an N-type semiconductor.
    Type: Application
    Filed: September 30, 2010
    Publication date: February 2, 2012
    Applicant: National Chiao Tung University
    Inventors: EDWARD YI CHANG, CHIA-HUA CHANG, YUEH-CHIN LIN
  • Patent number: 7829448
    Abstract: Disclosed herein are a structure of a metal oxide semiconductor pseudomorphic high electron mobility transistor (MOS-PHEMT) suitable for use in a semiconductor device, such as a single-pole-double-throw (SPDT) switch of a monolithic microwave integrated circuit (MMIC); and a method of producing the same. The MOS-PHEMT structure is characterized in having a gate dielectric layer formed by atomic deposition from a gate dielectric selected from the group consisting of Al2O3, HfO2, La2O3, and ZrO2, and thereby rendering the semiconductor structure comprising the same, such as a high frequency switch device, to have less DC power loss, less insertion loss and better isolation.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: November 9, 2010
    Assignee: National Chiao Tung University
    Inventors: Edward Yi. Chang, Yun-Chi Wu, Yueh-Chin Lin