Patents by Inventor Yueh-Ting Chung

Yueh-Ting Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230418017
    Abstract: A head-mounted display device includes a display, a lens group and an actuator. The display is used for generating an image light beam. The lens group is disposed between the display and a target area and is adapted to focus the image light beam to form a display image in the target area. The actuator is coupled to the display or the lens group to periodically move the display or the lens group on a plane.
    Type: Application
    Filed: November 25, 2022
    Publication date: December 28, 2023
    Applicant: HTC Corporation
    Inventors: Jeo-Yi Lee, Yueh-Ting Chung
  • Patent number: 10203578
    Abstract: A display panel includes a TFT substrate, which includes a substrate, a plurality of scan lines, a plurality of data lines, and a first intermediate layer. The scan lines are disposed on the substrate along a first direction, and the scan lines are intersected with the data lines to define a plurality of sub-pixel units. The sub-pixel units include a first sub-pixel unit and a second sub-pixel unit. The first sub-pixel unit has a first light transmission area and a first component installation area, and the second sub-pixel unit has a second light transmission area and a second component installation area. The first intermediate layer is disposed on the substrate and has an opening. The opening is at least partially overlapped with the first light transmission area, and is at least partially overlapped with the second light transmission area.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: February 12, 2019
    Assignee: INNOLUX CORPORATION
    Inventors: Yueh-Ting Chung, Yung-Hsin Lu, Jyun-Yu Chen, Jian-Min Leu
  • Publication number: 20170307920
    Abstract: A display panel includes a TFT substrate, which includes a substrate, a plurality of scan lines, a plurality of data lines, and a first intermediate layer. The scan lines are disposed on the substrate along a first direction, and the scan lines are intersected with the data lines to define a plurality of sub-pixel units. The sub-pixel units include a first sub-pixel unit and a second sub-pixel unit. The first sub-pixel unit has a first light transmission area and a first component installation area, and the second sub-pixel unit has a second light transmission area and a second component installation area. The first intermediate layer is disposed on the substrate and has an opening. The opening is at least partially overlapped with the first light transmission area, and is at least partially overlapped with the second light transmission area.
    Type: Application
    Filed: April 25, 2017
    Publication date: October 26, 2017
    Inventors: Yueh-Ting CHUNG, Yung-Hsin LU, Jyun-Yu CHEN, Jian-Min LEU
  • Patent number: 9754976
    Abstract: An element substrate is provided, including a substrate, a metal layer, a planarization layer and a first conductive layer. The metal layer is disposed on the substrate. The planarization layer is located on the metal layer, wherein the planarization layer includes a contact hole, the contact hole has a continuous wall and a bottom, the bottom exposes the metal layer, and the bottom of the contact hole has a first width. The first conductive layer is located on the planarization layer, wherein the first conductive layer includes an opening, the opening exposes the contact hole, and the opening has a second width above the contact hole, wherein the relationship of the first width and the second width is modified to decrease illumination loss and to prevent problems of shot-circuiting and insufficient capacitance.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: September 5, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Yueh-Ting Chung, Shao-Wu Hsu, Yung-Hsin Lu, Jyun-Yu Chen, Kuan-Yu Chiu, Chao-Hsiang Wang
  • Patent number: 9543335
    Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is between 0.087 to 0.364.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: January 10, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Yueh-Ting Chung, Jyun-Yu Chen, Wei-Chen Hsu, Yung-Hsin Lu, Chao-Hsiang Wang, Kuan-Yu Chiu
  • Patent number: 9360725
    Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is smaller than 0.176.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: June 7, 2016
    Assignee: INNOLUX CORPORATION
    Inventors: Yueh-Ting Chung, Jyun-Yu Chen, Wei-Chen Hsu, Yung-Hsin Lu, Chao Hsiang Wang, Kuan Yu Chiu
  • Publication number: 20160139452
    Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is between 0.087 to 0.364.
    Type: Application
    Filed: January 21, 2016
    Publication date: May 19, 2016
    Inventors: Yueh-Ting CHUNG, Jyun-Yu CHEN, Wei-Chen HSU, Yung-Hsin LU, Chao-Hsiang WANG, Kuan-Yu CHIU
  • Publication number: 20160077392
    Abstract: A display panel including a first substrate and a second substrate disposed is provided. The first substrate includes a first data line, a second data line, and a third data line parallel with one another, and a first scan line and a second scan line parallel with each other. The first scan line, the second scan line, the first data line and the second data line define a first sub-pixel. The first scan line, the second scan line, the second data line and the third data line define a second sub-pixel. The first sub-pixel includes a first pixel electrode. The second sub-pixel includes a second pixel electrode. A first interval between the first pixel electrode and the second data line is larger than a second interval between the second pixel electrode and the second data line.
    Type: Application
    Filed: August 20, 2015
    Publication date: March 17, 2016
    Applicant: Innolux Corporation
    Inventors: Jian-Min LEU, Yueh-Ting CHUNG, Ming-Yo CHIANG
  • Publication number: 20160079279
    Abstract: An element substrate is provided, including a substrate, a metal layer, a planarization layer and a first conductive layer. The metal layer is disposed on the substrate. The planarization layer is located on the metal layer, wherein the planarization layer includes a contact hole, the contact hole has a continuous wall and a bottom, the bottom exposes the metal layer, and the bottom of the contact hole has a first width. The first conductive layer is located on the planarization layer, wherein the first conductive layer includes an opening, the opening exposes the contact hole, and the opening has a second width above the contact hole, wherein the relationship of the first width and the second width is modified to decrease illumination loss and to prevent problems of shot-circuiting and insufficient capacitance.
    Type: Application
    Filed: November 4, 2014
    Publication date: March 17, 2016
    Inventors: Yueh-Ting CHUNG, Shao-Wu HSU, Yung-Hsin LU, Jyun-Yu CHEN, Kuan-Yu CHIU, Chao-Hsiang WANG
  • Publication number: 20160018687
    Abstract: An element substrate is provided, including a substrate, a metal layer and a planarization layer. The metal layer is located on the substrate. The metal layer has a first edge in a first direction. The planarization layer is located on the metal layer. The planarization layer includes a contact hole. The contact hole has a contiguous wall and a bottom side. The metal layer is exposed in the bottom side. A contour line of the contiguous wall on a vertical plane is a curved line. The first edge corresponds vertically with a critical point on the contour line. The slope of a tangent line on the critical point of the contour line is smaller than 0.176.
    Type: Application
    Filed: September 22, 2014
    Publication date: January 21, 2016
    Inventors: Yueh-Ting CHUNG, Jyun-Yu CHEN, Shao Wu HSU, Yung-Hsin LU, Chao Hsiang WANG, Kuan Yu CHIU
  • Patent number: D571815
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: June 24, 2008
    Assignee: Cooler Master Co., Ltd.
    Inventor: Yueh-Ting Chung
  • Patent number: D574005
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: July 29, 2008
    Assignee: Cooler Master Co. Ltd.
    Inventor: Yueh-Ting Chung