Patents by Inventor Yuhao Zhang

Yuhao Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10382368
    Abstract: This application discloses a method implemented on a client system for creating an automatic reply message. The client system obtains content information of a webpage including information concerning a plurality of content items. A graphical user interface is created using one or more of the plurality of content items. Then, the auto-reply message is composed in accordance with the plurality of content items and additional user instructions. The auto-reply message is further associated with one or more predefined keywords according to one or more auto-reply rules, and sent along with these predefined keywords to a server system. The server system is configured to return the auto-reply message automatically to a subscriber device of a public account of a social network application in response to a user inquiry including one or more predefined keywords.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: August 13, 2019
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Xun Niu, Yanan Zhao, Jihua Huang, Haiyang Wang, Yuhao Chen, Yan Qi, Jiyan Huang, Zhaohong Ma, Guodong Zhang, Jing Xu
  • Publication number: 20190241572
    Abstract: The present disclosure relates to a novel crystalline form of Galunisertib, processes for preparation and use thereof. The present disclosure also relates to a pharmaceutical composition comprises the novel crystalline form of Galunisertib and use of the novel crystalline form of Galunisertib and pharmaceutical composition for preparing drugs treating disease. The crystalline form of the present disclosure has good stability, solubility and hygroscopicity, which has significant value for future drug optimization and development.
    Type: Application
    Filed: July 21, 2017
    Publication date: August 8, 2019
    Applicants: Crystal Pharmaceutical (Suzhou) Co., Ltd., Crystal Pharmaceutical (Suzhou) Co., Ltd.
    Inventors: Minhua Chen, Yanfeng Zhang, Yuhao Chen, Hui Gao, Fei Lu, Xiaoyu Zhang
  • Patent number: 9876102
    Abstract: A semiconductor device includes a layered structure forming multiple carrier channels including at least one n-type channel formed in a first layer made of a first material and at least one p-type channel formed in a second layer made of a second material and a set of electrodes for providing and controlling carrier charge in the carrier channels. The first material is different than the second material, and the first and the second materials are selected such that the n-type channel and the p-type channel have comparable switching frequency and current capability.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: January 23, 2018
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Yuhao Zhang
  • Patent number: 9704959
    Abstract: A field effect transistor that has a source, a drain, a gate, a semiconductor region, and a dielectric region. The dielectric region is located between the semiconductor region and the gate. Negatively charged ions are located within the dielectric layer underneath the gate.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: July 11, 2017
    Assignee: Massachusetts Institute of Technology
    Inventors: Yuhao Zhang, Tomas Apostol Palacios
  • Patent number: 9583607
    Abstract: A semiconductor device includes a semiconductor structure forming a carrier channel, a barrier layer arranged in proximity with the semiconductor structure, and a set of electrodes for providing and controlling carrier charge in the carrier channel. The barrier layer is at least partially doped by impurities having a conductivity type opposite to a conductivity type of the carrier channel. The material of the barrier layer has a bandgap and thermal conductivity larger than a bandgap and thermal conductivity of material in the semiconductor structure.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: February 28, 2017
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Yuhao Zhang
  • Publication number: 20170018638
    Abstract: A semiconductor device includes a semiconductor structure forming a carrier channel, a barrier layer arranged in proximity with the semiconductor structure, and a set of electrodes for providing and controlling carrier charge in the carrier channel. The barrier layer is at least partially doped by impurities having a conductivity type opposite to a conductivity type of the carrier channel. The material of the barrier layer has a bandgap and thermal conductivity larger than a bandgap and thermal conductivity of material in the semiconductor structure.
    Type: Application
    Filed: September 1, 2015
    Publication date: January 19, 2017
    Inventors: Koon Hoo Teo, Yuhao Zhang
  • Publication number: 20170018639
    Abstract: A semiconductor device includes a layered structure forming multiple carrier channels including at least one n-type channel formed in a first layer made of a first material and at least one p-type channel formed in a second layer made of a second material and a set of electrodes for providing and controlling carrier charge in the carrier channels. The first material is different than the second material, and the first and the second materials are selected such that the n-type channel and the p-type channel have comparable switching frequency and current capability.
    Type: Application
    Filed: September 2, 2015
    Publication date: January 19, 2017
    Inventors: Koon Hoo Teo, Yuhao Zhang
  • Patent number: 9419121
    Abstract: A semiconductor device includes a layered structure forming multiple carrier channels extending in parallel at different depths of the semiconductor device and a gate electrode having multiple gate fingers of different lengths penetrating the layered structure to reach and control corresponding carrier channels at the different depths. The semiconductor device also includes a carrier electrode having multiple carrier fingers of different lengths penetrating the layered structure to access the corresponding carrier channels. The carrier fingers are interdigitated with the gate fingers.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: August 16, 2016
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Koon Hoo Teo, Yuhao Zhang
  • Publication number: 20150270356
    Abstract: A vertical semiconductor device and a method of forming the same. A vertical semiconductor device has a substrate that includes a first material, a first electrode below the substrate, and at least one semiconductor region. The at least one semiconductor region includes a second material different from the first material. The second material is a III-nitride semiconductor material. The at least one semiconductor region is formed over the substrate. The vertical semiconductor device also has a second electrode over the at least one semiconductor region.
    Type: Application
    Filed: March 19, 2015
    Publication date: September 24, 2015
    Applicant: Massachusetts Institute of Technology
    Inventors: Tomas Apostol Palacios, Yuhao Zhang
  • Publication number: 20140346615
    Abstract: A field effect transistor that has a source, a drain, a gate, a semiconductor region, and a dielectric region. The dielectric region is located between the semiconductor region and the gate. Negatively charged ions are located within the dielectric layer underneath the gate.
    Type: Application
    Filed: May 21, 2014
    Publication date: November 27, 2014
    Applicant: Massachusetts Institute of Technology
    Inventors: Yuhao Zhang, Tomas Apostol Palacios