Abstract: A plurality of source signal lines extend parallel to each other. Gate signal lines extend parallel to each other while crossing the plurality of source signal lines. A pixel switching element is provided at an intersection of each of the source signal lines and each of the gate signal lines. Driving terminals receive signals to be input to the plurality of source signal lines. Leading lines connect the plurality of driving terminals and the plurality of source signal lines in one to one relationship. A repairing line has a conductive part extending parallel to the plurality of leading lines. An end part of one leading line or each of more leading lines near the source signal line and the driving terminal corresponding to this one or each of these leading lines can become connected through this conductive part.

Abstract: An array substrate has regions in which an intermediate resist film thickness is formed and processed by an intermediate exposure amount which does not completely expose a resist, respectively on a drain electrode, source terminal, and a common connection wiring which are made of a second conductive film. Thin film patterns or a common wiring made of a first conductive film is formed in substantially entire regions on the bottom layers of the regions so that the heights from a substrate are substantially the same.

Abstract: An array substrate has a plurality of gate signal lines, a plurality of source signal lines orthogonal to the plurality of gate signal lines, a plurality of gate-driver mounting terminals, a plurality of source-driver mounting terminals, a plurality of gate-side array inspection terminals connected to the gate signal lines, a plurality of source-side array inspection terminals connected to the source signal lines, a plurality of gate lead wire disconnection inspection circuits connected between the plurality of gate-driver mounting terminals and a common terminal for a gate lead wire disconnection inspection, and a plurality of source lead wire disconnection inspection circuits connected between the plurality of source-driver mounting terminals and a common terminal for a source lead wire disconnection inspection.

Abstract: A plurality of source signal lines extend parallel to each other. Gate signal lines extend parallel to each other while crossing the plurality of source signal lines. A pixel switching element is provided at an intersection of each of the source signal lines and each of the gate signal lines. Driving terminals receive signals to be input to the plurality of source signal lines. Leading lines connect the plurality of driving terminals and the plurality of source signal lines in one to one relationship. A repairing line has a conductive part extending parallel to the plurality of leading lines. An end part of one leading line or each of more leading lines near the source signal line and the driving terminal corresponding to this one or each of these leading lines can become connected through this conductive part.

Abstract: An array substrate has a plurality of gate signal lines, a plurality of source signal lines orthogonal to the plurality of gate signal lines, a plurality of gate-driver mounting terminals, a plurality of source-driver mounting terminals, a plurality of gate-side array inspection terminals connected to the gate signal lines, a plurality of source-side array inspection terminals connected to the source signal lines, a plurality of gate lead wire disconnection inspection circuits connected between the plurality of gate-driver mounting terminals and a common terminal for a gate lead wire disconnection inspection, and a plurality of source lead wire disconnection inspection circuits connected between the plurality of source-driver mounting terminals and a common terminal for a source lead wire disconnection inspection.

Abstract: A liquid crystal display apparatus according to the invention is an in-plane switching liquid crystal display apparatus having gate wirings and source wirings, which intersect one another, and also having pixel electrodes each connected to an associated one of the source wirings, and common electrodes disposed opposite to the pixel electrodes. A scanning signal is inputted to the gate wiring so that one horizontal period has a writing period, in which a pixel potential is written to the pixel electrode, and a nonwriting period, in which no pixel potential is written to the pixel electrode. The pixel potential is outputted to the source wiring in the writing period, while a common potential is inputted to the source wiring in the nonwriting period.

Abstract: A liquid crystal display apparatus according to the invention is an in-plane switching liquid crystal display apparatus having gate wirings and source wirings, which intersect one another, and also having pixel electrodes each connected to an associated one of the source wirings, and common electrodes disposed opposite to the pixel electrodes. A scanning signal is inputted to the gate wiring so that one horizontal period has a writing period, in which a pixel potential is written to the pixel electrode, and a nonwriting period, in which no pixel potential is written to the pixel electrode. The pixel potential is outputted to the source wiring in the writing period, while a common potential is inputted to the source wiring in the nonwriting period.

Abstract: A thin-film transistor array substrate includes a source line that is formed above a gate insulating layer covering a gate line, a semiconductor layer that is formed on the gate insulating layer and placed in a substantially whole area below a drain electrode, in a substantially whole area below a source electrode, in a substantially whole area below the source line and in a position opposite to the gate electrode, a pixel electrode that is formed directly on the drain electrode, a transparent conductive pattern that is formed directly on the source electrode and the source line in the same layer as the pixel electrode, and a counter electrode that is formed on an interlayer insulating layer covering the pixel electrode and the transparent conductive pattern and generates a fringe electric field with the pixel electrode.

Abstract: The liquid crystal display device, in which liquid crystal is filled between a TFT array substrate having a TFT and a counter substrate placed opposite to the TFT array substrate, includes a pixel electrode placed at least partly directly over or under a drain electrode of the thin film transistor so as to directly overlap the drain electrode, an interlayer insulating layer placed to cover the pixel electrode, and a counter electrode placed on the interlayer insulating layer and having a slit to generate a fringe electric field with the pixel electrode, wherein the counter electrode is placed to overlap a gate line connected to a gate electrode of the TFT in at least part of area and connected to the counter electrode in an adjacent pixel across the gate line.

Abstract: Source lines cross, over an intervening first insulation film, gate lines on an insulation substrate. Switching elements are on crossings between the gate lines and the source lines. Pixel electrodes are connected to the switching elements. Common electrodes facing the pixel electrodes generate between the pixel electrodes and the common electrodes an electric field directed approximately parallel to the insulation substrate. First shielding electrode patterns along the source lines in a layer, with the first insulation film intervening, underneath the source lines, at least partially overlap the source lines widthwise. Plural second shielding electrode patterns are formed along the source lines, overlapping the first shielding electrode patterns and without substantially overlapping the source lines in a layer, with a second insulation film intervening, above the source lines. The first shielding electrode patterns having a same electric potential as the plural second shielding electrode patterns.

Abstract: In a method of manufacturing a TFT substrate in accordance with an exemplary aspect of the present invention, an intrinsic semiconductor film, an impurity semiconductor film, and a conductive film for source lines are formed in succession, and a resist having a thin-film portion and a thick-film portions is formed on the conductive film for source lines. Then, etching is performed by using the resist as a mask, and after that, a part of the conductive film for source lines is exposed by removing the thin-film portion of the resist. Next, the exposed conductive film for source lines is etched by using the thick-film portions of the resist a mask, so that the impurity semiconductor film is exposed. Then, by etching the exposed impurity semiconductor film, a back channel region of a TFT 108 is formed. Further, a dummy back channel region 18a, which is irrelevant to the operation of the finished product, is also formed in a portion other than the TFT 108 region.

Abstract: An array substrate is provided with thereon a display area in which plural pixels are arranged in a matrix shape. Output-side mounting terminals for a source driving circuit chip, which is COG-mounted on a frame area on the outside of the display area, have a plural-row zigzag arrangement. Inspection terminals individually provided in correspondence to the output-side mounting terminals have a zigzag arrangement opposite to the zigzag arrangement of the output-side mounting terminals in a terminal-row direction. Additionally, the output-side mounting terminals and the inspection terminals are disposed below the source driving circuit chip.

Abstract: In forming a thin film transistor using multi-tone exposure, a wiring width of a foundational wiring is 40 ?m or less, and a ratio of a wiring width of a foundational wiring in a dense case to a space between adjacent wirings is 1.7, preferably 1.0 or less.

Abstract: A semi-transparent TFT array substrate has a TFT including a source electrode, a gate electrode, and a drain electrode. The substrate also has an auxiliary capacitive wiring and a reflective pixel electrode. Further, the substrate has a transparent pixel electrode including an electrode extending from a corner of the rest of the transparent pixel electrode to an edge of the auxiliary capacitive wiring closest to a gate wiring connected to the gate electrode. In addition, the substrate has a source wiring connected to the source electrode. The auxiliary capacitive wiring overlaps a space existing between the reflective pixel electrode and the source wiring. The electrode is disposed between the reflective pixel electrode and the source wiring. A connection which connects the electrode and the rest of the transparent pixel electrode does not overlap the auxiliary capacitive wiring in a plan view. The connection does not overlap the gate wiring.

Abstract: A thin-film transistor array substrate includes a source line that is formed above a gate insulating layer covering a gate line, a semiconductor layer that is formed on the gate insulating layer and placed in a substantially whole area below a drain electrode, in a substantially whole area below a source electrode, in a substantially whole area below the source line and in a position opposite to the gate electrode, a pixel electrode that is formed directly on the drain electrode, a transparent conductive pattern that is formed directly on the source electrode and the source line in the same layer as the pixel electrode, and a counter electrode that is formed on an interlayer insulating layer covering the pixel electrode and the transparent conductive pattern and generates a fringe electric field with the pixel electrode.

Abstract: The present invention intends to provide a manufacturing method of a semi-transmissive liquid crystal display device in which method a structure and manufacturing process thereof are simplified to enable to reduce the manufacturing cost. In order to achieve the above object, a semi-transmissive liquid crystal display device in the invention has a layer constitution in which a reflective pixel electrode is formed with a second conductive film that constitutes a source electrode, a drain electrode, a source wiring and so on and on an upper layer of the second metal film a transmissive pixel electrode made of a transparent conductive film is formed through the insulating film. A TFT array substrate can be formed through 5 times of photoengraving process.

Abstract: In a method of manufacturing a TFT substrate in accordance with an exemplary aspect of the present invention, an intrinsic semiconductor film, an impurity semiconductor film, and a conductive film for source lines are formed in succession, and a resist having a thin-film portion and a thick-film portions is formed on the conductive film for source lines. Then, etching is performed by using the resist as a mask, and after that, a part of the conductive film for source lines is exposed by removing the thin-film portion of the resist. Next, the exposed conductive film for source lines is etched by using the thick-film portions of the resist a mask, so that the impurity semiconductor film is exposed. Then, by etching the exposed impurity semiconductor film, a back channel region of a TFT 108 is formed. Further, a dummy back channel region 18a, which is irrelevant to the operation of the finished product, is also formed in a portion other than the TFT 108 region.

Abstract: A transflective liquid crystal display device in which a transmissive area to transmit light to a pixel area and a reflective area as well as a thin film transistor are arranged on an insulating substrate, includes an TFT array substrate having plural gate wirings each provided with a gate electrode and a storage capacitive wiring provided with a storage capacitive electrode made of a first conductive film, plural source wirings each provided with a source electrode and a drain electrode made of a second conductive film, a reflecting pixel electrode extending from the drain electrode, and a transmissive pixel electrode formed through a second insulating film, and an opposite substrate arranged oppositely to the TFT array substrate. The source wirings and the reflecting pixel electrode are arranged apart from each other by a predetermined interval, and a contrast preventing electrode is formed over the interval on the second insulating film.

Abstract: In forming a thin film transistor using multi-tone exposure, a wiring width of a foundational wiring is 40 ?m or less, and a ratio of a wiring width of a foundational wiring in a dense case to a space between adjacent wirings is 1.7, preferably 1.0 or less.

Abstract: An array substrate is provided with thereon a display area in which plural pixels are arranged in a matrix shape. Output-side mounting terminals for a source driving circuit chip, which is COG-mounted on a frame area on the outside of the display area, have a plural-row zigzag arrangement. Inspection terminals individually provided in correspondence to the output-side mounting terminals have a zigzag arrangement opposite to the zigzag arrangement of the output-side mounting terminals in a terminal-row direction. Additionally, the output-side mounting terminals and the inspection terminals are disposed below the source driving circuit chip.