Patents by Inventor Yuichi Matsui
Yuichi Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7259058Abstract: A ruthenium electrode with a low amount of oxygen contamination and high thermal stability is formed by a chemical vapor deposition method. In the chemical vapor deposition method using an organoruthenium compound as a precursor, the introduction of an oxidation gas is limited to when the precursor is supplying, and the reaction is allowed to occur at a low oxygen partial pressure. Consequently, it is possible to form a ruthenium film with a low amount of oxygen contamination. Further, after formation of the ruthenium film, annealing at not less than the formation temperature is performed, thereby forming a ruthenium film with high thermal stability.Type: GrantFiled: December 18, 2001Date of Patent: August 21, 2007Assignee: Renesas Techonology Corp.Inventors: Yasuhiro Shimamoto, Masahiko Hiratani, Yuichi Matsui, Satoshi Yamamoto, Toshihide Nabatame, Toshio Ando, Hiroshi Sakuma, Shinpei Iijima
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Publication number: 20070170413Abstract: Manufacturing processes for phase change memory have suffered from the problem of chalcogenide material being susceptible to delamination, since this material exhibits low adhesion to high melting point metals and silicon oxide films. Furthermore, chalcogenide material has low thermal stability and hence tends to sublime during the manufacturing process of phase change memory. According to the present invention, conductive or insulative adhesive layers are formed over and under the chalcogenide material layer to enhance its delamination strength. Further, a protective film made up of a nitride film is formed on the sidewalls of the chalcogenide material layer to prevent sublimation of the chalcogenide material layer.Type: ApplicationFiled: May 9, 2005Publication date: July 26, 2007Inventors: Yuichi Matsui, Nozomu Matsuzaki, Norikatsu Takaura, Naoki Yamamoto, Hideyuki Matsuoka, Tomio Iwasaki
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Publication number: 20060266992Abstract: Since a chalcogenide material has low adhesion to a silicon oxide film, there is a problem in that it tends to separate from the film during the manufacturing step of a phase change memory. In addition, since the chalcogenide material has to be heated to its melting point or higher during resetting (amorphization) of the phase change memory, there is a problem of requiring extremely large rewriting current. An interfacial layer comprising an extremely thin insulator or semiconductor having the function as both an adhesive layer and a high resistance layer (thermal resistance layer) is inserted between chalcogenide material layer/interlayer insulative film and between chalcogenide material layer/plug.Type: ApplicationFiled: May 18, 2006Publication date: November 30, 2006Inventors: Yuichi Matsui, Tomio Iwasaki, Norikatsu Takaura, Kenzo Kurotsuchi
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Patent number: 7112819Abstract: A capacitor uses niobium pentoxide in the manufacture of a semiconductor device. The niobium pentoxide has a low crystallization temperature of 600° C. that provides control over the oxidation of the bottom electrode during heat-treatment. A dielectric constituent present as an amorphous oxide along the grain boundaries of polycrystalline niobium pentoxide is used for a capacitor insulator, thereby providing a method to decrease the leakage current along the grain boundary of niobium pentoxide and to realize a high dielectric constant and low-temperature crystallization.Type: GrantFiled: April 22, 2004Date of Patent: September 26, 2006Assignee: Hitachi, Ltd.Inventor: Yuichi Matsui
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Publication number: 20060113520Abstract: Disclosed herein is a phase change memory semiconductor integrated circuit device using a chalcogenide film that solves a problem that the operation temperature capable of ensuring long time memory retention is low due to low phase change temperature is and, at the same time, a problem that power consumption of the device is high since a large current requires to rewrite memory information due to low resistance. A portion of constituent elements for a chalcogenide comprises nitride, oxide or carbide which are formed to the boundary between the chalcogenide film and a metal plug as an underlying electrode and to the grain boundary of chalcogenide crystals thereby increasing the phase change temperature and high Joule heat can be generated even by a small current by increasing the resistance of the film.Type: ApplicationFiled: November 30, 2005Publication date: June 1, 2006Inventors: Naoki Yamamoto, Norikatsu Takaura, Yuichi Matsui, Nozomu Matsuzaki, Kenzo Kurotsuchi, Motoyasu Terao
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Publication number: 20060105556Abstract: The annealing process at 400° C. or more required for the wiring process for a phase change memory has posed the problem in that the crystal grains in a chalcogenide material grow in an oblique direction to cause voids in a storage layer. The voids, in turn, cause peeling due to a decrease in adhesion, variations in resistance due to improper contact with a plug, and other undesirable events. After the chalcogenide material has been formed in an amorphous phase, post-annealing is conducted to form a (111)-oriented and columnarly structured face-centered cubic. This is further followed by high-temperature annealing to form a columnar, hexagonal closest-packed crystal. Use of this procedure makes it possible to suppress the growth of inclined crystal grains that causes voids, since crystal grains are formed in a direction perpendicular to the surface of an associated substrate.Type: ApplicationFiled: November 15, 2005Publication date: May 18, 2006Inventors: Yuichi Matsui, Motoyasu Terao, Norikatsu Takaura, Takahiro Morikawa, Naoki Yamamoto
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Publication number: 20060027851Abstract: The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of a niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.Type: ApplicationFiled: October 5, 2005Publication date: February 9, 2006Inventors: Yuichi Matsui, Masahiko Hiratani
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Patent number: 6992022Abstract: A process for forming the lower and upper electrodes of a high dielectric constant capacitor in a semiconductor device from an organoruthenium compound by chemical vapor deposition. This chemical vapor deposition technique employs an organoruthenium compound, an oxidizing gas, and a gas (such as argon) which is hardly adsorbed to the ruthenium surface or a gas (such as ethylene) which is readily adsorbed to the ruthenium surface. This process efficiently forms a ruthenium film with good conformality in a semiconductor device.Type: GrantFiled: March 9, 2004Date of Patent: January 31, 2006Assignee: Renesas Technology Corp.Inventors: Yasuhiro Shimamoto, Masahiko Hiratani, Yuichi Matsui, Toshihide Nabatame
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Patent number: 6989304Abstract: In the method of manufacturing a semiconductor device according to this invention, when an interlayer insulating film is fabricated such that an opening is cylindrical and low-pressure and long-throw sputtering is used for forming a lower ruthenium electrode, a ruthenium film can be deposited on the side wall of a deep hole. Further, after removing the ruthenium film deposited on the upper surface of the interlayer insulating film, a dielectric material comprising, for example, a tantalum pentoxide film is deposited. Successively, an upper ruthenium electrode is deposited using, for example, Ru(EtCp)2 as a starting material and by chemical vapor deposition of conveying the starting material by bubbling. The upper ruthenium electrode can be formed with good coverage by using conditions that the deposition rate of the ruthenium film depends on the formation temperature (reaction controlling condition). This invention can provide a fine concave type capacitor having a ruthenium electrode.Type: GrantFiled: August 11, 2000Date of Patent: January 24, 2006Assignee: Renesas Technology Corp.Inventors: Yuichi Matsui, Masahiko Hiratani, Yasuhiro Shimamoto, Toshihide Nabatame
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Patent number: 6955959Abstract: The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of a niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.Type: GrantFiled: May 26, 2004Date of Patent: October 18, 2005Assignee: Renesas Technology Corp.Inventors: Yuichi Matsui, Masahiko Hiratani
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Publication number: 20050142742Abstract: A semiconductor device having a DRAM has a capacitor in which a dielectric film and an upper electrode are laminated on a lower electrode comprising a polysilicone, in which a natural oxide film oxidized by oxygen in the atmosphere grows to at least 1.5 nm on the surface of a lower electrode of the capacitor. Further, in forming the dielectric film, the dioxide film further grows in the case of using an oxidative raw material. This brings forth a reduction in capacitance, and an increase of a leakage current is caused. Therefore, after a dielectric film having a reduction property has been formed, the reduction property is promoted by a heat treatment to thereby reduce a dioxide film and realize making the dioxide film on the lower electrode surface thinner.Type: ApplicationFiled: November 12, 2004Publication date: June 30, 2005Inventors: Osamu Tonomura, Hiroshi Miki, Yuichi Matsui, Tomoko Sekiguchi, Kikuo Watanabe
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Publication number: 20050001212Abstract: A capacitor uses niobium pentoxide in the manufacture of a semiconductor device. The niobium pentoxide has a low crystallization temperature of 600° C. that provides control over the oxidation of the bottom electrode during heat-treatment. A dielectric constituent present as an amorphous oxide along the grain boundaries of polycrystalline niobium pentoxide is used for a capacitor insulator., thereby providing a method to decrease the leakage current along the grain boundary of niobium pentoxide and to realize a high dielectric constant and low-temperature crystallization.Type: ApplicationFiled: April 22, 2004Publication date: January 6, 2005Inventor: Yuichi Matsui
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Patent number: 6833577Abstract: The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of a niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.Type: GrantFiled: November 21, 2002Date of Patent: December 21, 2004Assignee: Renesas Technology CorporationInventors: Yuichi Matsui, Masahiko Hiratani
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Publication number: 20040232497Abstract: A memory cell capacitor (C3) of a DRAM is formed by use of a MIM capacitor which uses as its electrode a metal wiring line of the same layer (M3) as metal wiring lines within a logic circuit (LOGIC), thereby enabling reduction of process costs. Higher integration is achievable by forming the capacitor using a high dielectric constant material and disposing it above a wiring layer in which bit lines (BL) are formed. In addition, using 2T cells makes it possible to provide a sufficient signal amount even when letting them operate with a low voltage. By commonizing the processes for fabricating capacitors in analog (ANALOG) and memory (MEM), it is possible to realize a semiconductor integrated circuit with the logic, analog and memory mounted together on one chip at low costs.Type: ApplicationFiled: June 24, 2004Publication date: November 25, 2004Inventors: Satoru Akiyama, Takao Watanabe, Yuichi Matsui, Masahiko Hiratani
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Publication number: 20040212000Abstract: The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of a niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.Type: ApplicationFiled: May 26, 2004Publication date: October 28, 2004Applicant: Hitachi, Ltd.Inventors: Yuichi Matsui, Masahiko Hiratani
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Publication number: 20040171210Abstract: A process for forming the lower and upper electrodes of a high dielectric constant capacitor in a semiconductor device from an organoruthenium compound by chemical vapor deposition. This chemical vapor deposition technique employs an organoruthenium compound, an oxidizing gas, and a gas (such as argon) which is hardly adsorbed to the ruthenium surface or a gas (such as ethylene) which is readily adsorbed to the ruthenium surface. This process efficiently forms a ruthenium film with good conformality in a semiconductor device.Type: ApplicationFiled: March 9, 2004Publication date: September 2, 2004Applicant: Renesas Technology CorporationInventors: Yasuhiro Shimamoto, Masahiko Hiratani, Yuichi Matsui, Toshihide Nabatame
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Patent number: 6743739Abstract: A process for forming the lower and upper electrodes of a high dielectric constant capacitor in a semiconductor device from an organoruthenium compound by chemical vapor deposition. This chemical vapor deposition technique employs an organoruthenium compound, an oxidizing gas, and a gas (such as argon) which is hardly adsorbed to the ruthenium surface or a gas (such as ethylene) which is readily adsorbed to the ruthenium surface. This process efficiently forms a ruthenium film with good conformality in a semiconductor device.Type: GrantFiled: March 21, 2002Date of Patent: June 1, 2004Assignee: Renesas Technology CorporationInventors: Yasuhiro Shimamoto, Masahiko Hiratani, Yuichi Matsui, Toshihide Nabatame
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Patent number: 6720603Abstract: A disadvantage upon heat treatment in an oxygen atmosphere of a dielectric film formed on a lower electrode of capacitance device of DRAM that oxygen permeating the lower electrode oxidizes a barrier layer to form an oxide layer of high resistance and low dielectric constant is prevented. An Ru silicide layer is formed on the surface of a plug in a through hole formed below a lower electrode for an information storage capacitance device C and an Ru silicon nitride layer is formed further on the surface of the Ru silicide layer. Upon high temperature heat treatment in an oxygen atmosphere conducted in the step of forming a dielectric film on the lower electrode, the Ru silicon nitride layer is oxidized sacrificially into an Ru silicon oxynitride to prevent progress of oxidation in the Ru silicide layer.Type: GrantFiled: December 18, 2002Date of Patent: April 13, 2004Assignee: Hitachi, Ltd.Inventors: Shinpei Iijima, Yuzuru Ohji, Masato Kunitomo, Masahiko Hiratani, Yuichi Matsui, Hiroyuki Ohta, Yukihiro Kumagai
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Patent number: 6664157Abstract: Plug electrodes of silicon are formed so as to be buried in through holes in a first insulating film, the plug electrodes being electrically connected to the source and drain regions of a MISFET on the main surface of a semiconductor substrate. Then, a second insulating film is deposited thereon and holes are formed therein such that the plug electrodes of silicon are exposed. A barrier film is formed on the surfaces of the silicon plugs, and in the holes a dielectric is formed to form lower electrodes of the capacitor elements and an upper electrode therefor.Type: GrantFiled: February 5, 2001Date of Patent: December 16, 2003Assignee: Hitachi, Ltd.Inventors: Shinpei Iijima, Yoshitaka Nakamura, Masahiko Hiratani, Yuichi Matsui, Naruhiko Nakanishi
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Publication number: 20030151083Abstract: The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of a niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.Type: ApplicationFiled: November 21, 2002Publication date: August 14, 2003Inventors: Yuichi Matsui, Masahiko Hiratani