Patents by Inventor Yuichi NAGAHISA

Yuichi NAGAHISA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190181259
    Abstract: A technique is provided for effectively suppressing a forward voltage shift due to occurrence of a stacking fault. A semiconductor device relating to the present technique includes a first well region of a second conductivity type, a second well region of the second conductivity type which is so provided as to sandwich the whole of a plurality of first well regions in a plan view and has an area larger than that of each of the first well regions, a third well region of the second conductivity type which is so provided as to sandwich the second well region in a plan view and has an area larger than that of the second well region, and a dividing region of a first conductivity type provided between the second well region and the third well region, having an upper surface which is in contact with an insulator.
    Type: Application
    Filed: April 11, 2016
    Publication date: June 13, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shiro HINO, Koji SADAMATSU, Hideyuki HATTA, Yuichi NAGAHISA, Kohei EBIHARA