Patents by Inventor Yuichi Onozawa

Yuichi Onozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220140091
    Abstract: Provided is a semiconductor device including a semiconductor substrate; a hydrogen donor that is provide inside the semiconductor substrate in a depth direction, has a doping concentration that is higher than a doping concentration of a dopant of the semiconductor substrate, has a doping concentration distribution peak at a first position that is a predetermined distance in the depth direction of the semiconductor substrate away from one main surface of the semiconductor substrate, and has a tail of the doping concentration distribution where the doping concentration is lower than at the peak, farther on the one main surface side than where the first position is located; and a crystalline defect region having a crystalline defect density center peak at a position shallower than the first position, in the depth direction of the semiconductor substrate.
    Type: Application
    Filed: January 17, 2022
    Publication date: May 5, 2022
    Inventors: Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Misaki MEGURO, Motoyoshi KUBOUCHI, Naoko KODAMA
  • Publication number: 20220076956
    Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.
    Type: Application
    Filed: November 18, 2021
    Publication date: March 10, 2022
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA, Misaki TAKAHASHI
  • Patent number: 11239324
    Abstract: Provided is a semiconductor device including a semiconductor substrate; a hydrogen donor that is provide inside the semiconductor substrate in a depth direction, has a doping concentration that is higher than a doping concentration of a dopant of the semiconductor substrate, has a doping concentration distribution peak at a first position that is a predetermined distance in the depth direction of the semiconductor substrate away from one main surface of the semiconductor substrate, and has a tail of the doping concentration distribution where the doping concentration is lower than at the peak, farther on the one main surface side than where the first position is located; and a crystalline defect region having a crystalline defect density center peak at a position shallower than the first position, in the depth direction of the semiconductor substrate.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: February 1, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takashi Yoshimura, Yuichi Onozawa, Hiroshi Takishita, Misaki Meguro, Motoyoshi Kubouchi, Naoko Kodama
  • Publication number: 20220013635
    Abstract: Provided is a semiconductor device including: a semiconductor substrate including a bulk donor; and a first buffer region of a first conductivity type, the first buffer region being provided on a lower surface side of the semiconductor substrate and having one or more doping concentration peaks and one or more hydrogen concentration peaks in a depth direction of the semiconductor substrate, in which a doping concentration at a shallowest concentration peak, out of the doping concentration peaks of the first buffer region, closest to the lower surface of the semiconductor substrate is 50 times as high as a concentration of the bulk donor of the semiconductor substrate or lower. The doping concentration at the shallowest concentration peak may be lower than a reference carrier concentration obtained when current that is 1/10 of rated current flows between an upper surface and the lower surface of the semiconductor substrate.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 13, 2022
    Inventors: Takahiro TAMURA, Yuichi ONOZAWA
  • Publication number: 20220013368
    Abstract: Provided is a semiconductor device, including a semiconductor substrate having an upper surface and a lower surface and including a bulk donor, wherein a hydrogen chemical concentration distribution of the semiconductor substrate in a depth direction is flat, monotonically increasing, or monotonically decreasing from the lower surface to the upper surface except for a portion where a local hydrogen concentration peak is provided; and a donor concentration of the semiconductor substrate is higher than a bulk donor concentration over an entire region from the upper surface to the lower surface. Hydrogen ions may be irradiated from the upper surface or the lower surface of the semiconductor substrate so as to penetrate the semiconductor substrate in the depth direction.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 13, 2022
    Inventors: Yasunori AGATA, Takashi YOSHIMURA, Hiroshi TAKISHITA, Misaki UCHIDA, Michio NEMOTO, Toru AJIKI, Yuichi ONOZAWA
  • Publication number: 20210384332
    Abstract: Provided is a semiconductor device that includes a drift region that is of a first conductivity type and is provided in a semiconductor substrate; a base region that is of a second conductivity type and is provided above the drift region; an accumulation region that is of the first conductivity type provided between the base region and the drift region; and an electric field relaxation region that is provided between the base region and the accumulation region, wherein the boundary between the electric field relaxation region and the accumulation region is a location for a half-value for the peak of the doping concentration of the accumulation region, and an integrated concentration of the electric field relaxation region is greater than or equal to 5E14 cm?2 and less than or equal to 5E15 cm?2.
    Type: Application
    Filed: August 24, 2021
    Publication date: December 9, 2021
    Inventors: Yosuke SAKURAI, Yuichi ONOZAWA
  • Patent number: 11183388
    Abstract: A semiconductor device is provided. The semiconductor device includes: a first region formed on a front surface side of a semiconductor substrate; a drift region formed closer to a rear surface of the semiconductor substrate than the first region is; a buffer region that: is formed closer to the rear surface of the semiconductor substrate than the drift region is; and has one or more peaks of an impurity concentration that are higher than an impurity concentration of the drift region; and a lifetime killer that: is arranged on a rear surface side of the semiconductor substrate; and shortens a carrier lifetime, wherein a peak of a concentration of the lifetime killer is arranged between: a peak that is closest to a front surface of the semiconductor substrate among the peaks of the impurity concentration in the buffer region; and the rear surface of the semiconductor substrate.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: November 23, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Tamura, Yuichi Onozawa, Misaki Takahashi
  • Publication number: 20210359088
    Abstract: Provided is a semiconductor device, including: a drift region of a first conductivity type which is provided in a semiconductor substrate, and a buffer region of the first conductivity type which is provided between the drift region and a lower surface of the semiconductor substrate, and has three or more concentration peaks higher than a doping concentration of the drift region of the semiconductor substrate in a depth direction. Three or more of the concentration peaks includes a shallowest peak closest to the lower surface of the semiconductor substrate, a high concentration peak arranged at an upper side than the lower surface of the semiconductor substrate than the shallowest peak, and one or more low concentration peaks arranged at an upper side than the lower surface of the semiconductor substrate than the high concentration peak and of which the doping concentration is ? or less of the high concentration peak.
    Type: Application
    Filed: July 27, 2021
    Publication date: November 18, 2021
    Inventors: Kota OHI, Yoshihiro IKURA, Yosuke SAKURAI, Mutsumi KITAMURA, Yuichi ONOZAWA, Yoshiharu KATO, Toru AJIKI
  • Patent number: 11139291
    Abstract: A semiconductor device is provided, including a semiconductor substrate, wherein the semiconductor substrate has: a diode region; a transistor region; and a boundary region that is positioned between the diode region and the transistor region, the boundary region includes a defect region that is provided: at a predetermined depth position on a front surface-side of the semiconductor substrate; and to extend from an end portion of the boundary region adjacent to the diode region toward the transistor region, at least part of the boundary region does not include a first conductivity-type emitter region exposed on a front surface of the semiconductor substrate, and the transistor region does not have the defect region below a mesa portion that is sandwiched by two adjacent trench portions, and closest to the boundary region among the mesa portions having the emitter region.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: October 5, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Tamura, Yuichi Onozawa, Misaki Takahashi, Kaname Mitsuzuka, Daisuke Ozaki, Akinori Kanetake
  • Patent number: 11127822
    Abstract: At edge termination region, a trench is disposed near an interface of an active region. Inside the trench, an embedded insulating film is embedded, and inside the embedded insulating film, a FP long in a direction of depth is disposed. The FP curves outwardly away from an inner sidewall of the trench as a depth from a base front surface increases. At least near a bottom end of the FP, a distance between the FP and the inner sidewall of trench is greater than a width of the groove. The FP is connected to a front surface electrode that extends on the embedded insulating film. As a result, breakdown voltage can be enhanced, adverse effects of the surface charge can be reduced, and chip size can be further reduced.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: September 21, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Wentao Yang, Johnny Kin On Sin, Yuichi Onozawa, Kaname Mitsuzuka
  • Publication number: 20210265340
    Abstract: Provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to an emitter potential of the transistor portion; a sense electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sense electrode. Provided is a semiconductor device fabricating method including providing a transistor portion in a semiconductor substrate; providing a current sensing portion for detecting current flowing through the transistor portion; providing an emitter electrode set to an emitter potential of the transistor portion; providing a sense electrode electrically connected to the current sensing portion; and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.
    Type: Application
    Filed: December 24, 2020
    Publication date: August 26, 2021
    Inventors: Kaname MITSUZUKA, Yuichi ONOZAWA
  • Patent number: 11088290
    Abstract: Provided is a semiconductor apparatus in which the buried region includes an end portion buried region continuously disposed from a region below the contact opening up to a region below the interlayer dielectric film while passing below an end portion of the contact opening in a cross section perpendicular to the upper surface of the semiconductor substrate, and the end portion buried region disposed below the interlayer dielectric film is shorter than the end portion buried region disposed below the contact opening in a first direction in parallel with the upper surface of the semiconductor substrate.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: August 10, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Tamura, Yuichi Onozawa
  • Patent number: 11049941
    Abstract: A semiconductor device is provided comprising: a semiconductor substrate; a drift region having a first conductivity type formed in the semiconductor substrate; a collector region having a second conductivity type, in the semiconductor substrate, formed between the lower surface of the semiconductor substrate and the drift region; and a high concentration region having a first conductivity type, in the semiconductor substrate, formed between the drift region and the collector region and having higher doping concentration than that in the drift region, wherein a doping concentration distribution of the high concentration region in the depth direction of the semiconductor substrate comprises one or more peaks, wherein a distance between a first peak closest to the lower surface side of the semiconductor substrate among the peaks of the doping concentration distribution of the high concentration region and the lower surface of the semiconductor substrate is 3 ?m or less.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: June 29, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kota Ohi, Yuichi Onozawa, Yoshihiro Ikura
  • Publication number: 20210159317
    Abstract: A p-type semiconductor region is formed in a front surface side of an n-type semiconductor substrate. An n-type field stop (FS) region including protons as a donor is formed in a rear surface side of the semiconductor substrate. A concentration distribution of the donors in the FS region include first, second, third and fourth peaks in order from a front surface to the rear surface. Each of the peaks has a peak maximum point, and peak end points formed at both sides of the peak maximum point. The peak maximum points of the first and second peaks are higher than the peak maximum point of the third peak. The peak maximum point of the third peak is lower than the peak maximum point of the fourth peak.
    Type: Application
    Filed: February 4, 2021
    Publication date: May 27, 2021
    Inventors: Hiroki WAKIMOTO, Hiroshi TAKISHITA, Takashi YOSHIMURA, Takahiro TAMURA, Yuichi ONOZAWA
  • Publication number: 20210098252
    Abstract: A semiconductor device is disclosed in which proton implantation is performed a plurality of times to form a plurality of n-type buffer layers in an n-type drift layer at different depths from a rear surface of a substrate. The depth of the n-type buffer layer, which is provided at the deepest position from the rear surface of the substrate, from the rear surface of the substrate is more than 15 ?m. The temperature of a heat treatment which is performed in order to change a proton into a donor and to recover a crystal defect after the proton implantation is equal to or higher than 400° C. In a carrier concentration distribution of the n-type buffer layer, a width from the peak position of carrier concentration to an anode is more than a width from the peak position to a cathode.
    Type: Application
    Filed: December 11, 2020
    Publication date: April 1, 2021
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Yuichi ONOZAWA
  • Patent number: 10950446
    Abstract: Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: March 16, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroshi Takishita, Takashi Yoshimura, Takahiro Tamura, Yuichi Onozawa, Akio Yamano
  • Patent number: 10923570
    Abstract: A semiconductor device comprises: an n-type semiconductor substrate; a p-type anode region formed in the semiconductor substrate on its front surface side; an n-type field stop region formed in the semiconductor substrate on its rear surface side with protons as a donor; and an n-type cathode region formed in the semiconductor substrate to be closer to its rear surface than the field stop region is, wherein a concentration distribution of the donor in the field stop region in its depth direction has a first peak, and a second peak that is closer to the rear surface of the semiconductor substrate than the first peak is, and has a concentration lower than that of the first peak, and a carrier lifetime in at least a partial region between the anode region and the cathode region is longer than carrier lifetimes in the anode region.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: February 16, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroki Wakimoto, Hiroshi Takishita, Takashi Yoshimura, Takahiro Tamura, Yuichi Onozawa
  • Publication number: 20210043739
    Abstract: Provided is a semiconductor device comprising a semiconductor substrate, wherein the semiconductor substrate includes a hydrogen containing region including hydrogen, and the hydrogen containing region includes a high concentration region with a higher carrier concentration than a virtual carrier concentration determined based on a concentration of hydrogen included and an activation ratio of hydrogen. The semiconductor substrate includes an N type drift region, an N type emitter region that has a higher carrier concentration than that in the drift region, a P type base region, a P type collector region provided to be in contact with a lower surface of the semiconductor substrate, and an N type buffer region that is provided between the collector region and the drift region, and has a higher carrier concentration than that in the drift region, and the hydrogen containing region is included in the buffer region.
    Type: Application
    Filed: October 22, 2020
    Publication date: February 11, 2021
    Inventors: Yoshiharu KATO, Toru AJIKI, Tohru SHIRAKAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Soichi YOSHIDA
  • Patent number: 10916628
    Abstract: Provided is a semiconductor device including a drift region having a first conductivity type provided on a semiconductor substrate; a plurality of trench portions provided above the drift region, on a top surface side of the semiconductor substrate; a base region having a second conductivity type provided in a mesa portion sandwiched between the plurality of trench portions, in the semiconductor substrate; an emitter region having the first conductivity type provided above the base region, on a top surface of the mesa portion; and a contact region having the second conductivity type and a higher doping concentration than the base region, provided adjacent to the emitter region on the top surface of the mesa portion, wherein a mesa width of the mesa portion is less than or equal to 100 nm, and a bottom end of the contact region is shallower than a bottom end of the emitter region.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: February 9, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yosuke Sakurai, Yuichi Onozawa, Akio Nakagawa
  • Patent number: 10867790
    Abstract: A semiconductor device is disclosed in which proton implantation is performed a plurality of times to form a plurality of n-type buffer layers in an n-type drift layer at different depths from a rear surface of a substrate. The depth of the n-type buffer layer, which is provided at the deepest position from the rear surface of the substrate, from the rear surface of the substrate is more than 15 ?m.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: December 15, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Yuichi Onozawa