Patents by Inventor Yuichi Ozawa

Yuichi Ozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8988656
    Abstract: The present invention provides an exposure apparatus which exposes a substrate to light, the apparatus comprising a substrate stage, a position measurement unit configured to measure a position of the substrate stage, a structure configured to support the position measurement unit, a force measurement unit configured to measure a force that acts on the structure, a correction unit configured to correct a command for controlling the position of the substrate stage, based on the measurement value obtained by the force measurement unit, and a correction coefficient, and a calculation unit configured to calculate the correction coefficient based on position deviation information between adjacent shot regions in an evaluation substrate including a plurality of shot regions exposed without correction by the correction unit, and the measurement value obtained by the force measurement unit in exposing each shot region.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: March 24, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomohiro Harayama, Dai Nagatani, Kouji Yoshida, Yuichi Ozawa
  • Publication number: 20140016111
    Abstract: The present invention provides an exposure apparatus which exposes a substrate to light, the apparatus comprising a substrate stage, a position measurement unit configured to measure a position of the substrate stage, a structure configured to support the position measurement unit, a force measurement unit configured to measure a force that acts on the structure, a correction unit configured to correct a command for controlling the position of the substrate stage, based on the measurement value obtained by the force measurement unit, and a correction coefficient, and a calculation unit configured to calculate the correction coefficient based on position deviation information between adjacent shot regions in an evaluation substrate including a plurality of shot regions exposed without correction by the correction unit, and the measurement value obtained by the force measurement unit in exposing each shot region.
    Type: Application
    Filed: July 12, 2013
    Publication date: January 16, 2014
    Inventors: Tomohiro Harayama, Dai Nagatani, Kouji Yoshida, Yuichi Ozawa
  • Patent number: 8250545
    Abstract: An associated development-support apparatus for a semiconductor device enables highly accurate debugging and verification of operations. An emulator stub acquires event information by using a communication control unit, where the event is generated in a debugger, the event information is generated by a debugger stub according to an event, and transmitted by the debugger stub through a communication network. An emulator control unit analyzes the acquired event information, and controls an emulator according to the analyzed event so as to perform emulation processing which virtually emulates operations of the semiconductor device corresponding to the event based on hardware design information. The emulator stub acquires results of the event which is generated in association with the operations of the semiconductor device virtually emulated by the emulator, and notifies the debugger of the results of the event through the communication network and the debugger stub.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: August 21, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tetsuya Satoh, Masami Iwamoto, Seiya Itoh, Yuichi Ozawa
  • Patent number: 7561999
    Abstract: A verification apparatus that efficiently performs hardware verification and software verification in the development of a system LSI with great accuracy. At the hardware verification, an equivalence verification section compares the result of the simulation of an HDL model by a logic simulator and an expected value generated from an expected value calculation model and verifies whether there is equivalence between them. At the software verification, the expected value calculation model is used via an interface section and a firmware is verified by a software debugger. The expected value calculation model is used as an expected value generation model at hardware verification time and is used as a C model of hardware at software verification time. By using the expected value calculation model both for the hardware verification and for the software verification in this way, verification can efficiently be performed with great accuracy.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: July 14, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Masami Iwamoto, Yuichi Ozawa
  • Publication number: 20050102640
    Abstract: A verification apparatus that efficiently performs hardware verification and software verification in the development of a system LSI with great accuracy. At the hardware verification, an equivalence verification section compares the result of the simulation of an HDL model by a logic simulator and an expected value generated from an expected value calculation model and verifies whether there is equivalence between them. At the software verification, the expected value calculation model is used via an interface section and a firmware is verified by a software debugger. The expected value calculation model is used as an expected value generation model at hardware verification time and is used as a C model of hardware at software verification time. By using the expected value calculation model both for the hardware verification and for the software verification in this way, verification can efficiently be performed with great accuracy.
    Type: Application
    Filed: May 25, 2004
    Publication date: May 12, 2005
    Applicant: Fujitsu Limited
    Inventors: Masami Iwamoto, Yuichi Ozawa
  • Publication number: 20030237023
    Abstract: An associated development-support apparatus for a semiconductor device enables highly accurate debugging and verification of operations. An emulator stub acquires event information by using a communication control unit, where the event is generated in a debugger, the event information is generated by a debugger stub according to an event, and transmitted by the debugger stub through a communication network. An emulator control unit analyzes the acquired event information, and controls an emulator according to the analyzed event so as to perform emulation processing which virtually emulates operations of the semiconductor device corresponding to the event based on hardware design information. The emulator stub acquires results of the event which is generated in association with the operations of the semiconductor device virtually emulated by the emulator, and notifies the debugger of the results of the event through the communication network and the debugger stub.
    Type: Application
    Filed: June 20, 2003
    Publication date: December 25, 2003
    Applicant: Fujitsu Limited
    Inventors: Tetsuya Satoh, Masami Iwamoto, Seiya Itoh, Yuichi Ozawa
  • Patent number: 4688624
    Abstract: In the horizontal continuous casting of metal, an upper contact part and a lower contact part of the metal body are horizontally displaced with the inner wall of the tubular chilled mold relative to one another, so that the lower contact part is psoitioned downstream relative to the upper contact part.
    Type: Grant
    Filed: September 16, 1986
    Date of Patent: August 25, 1987
    Assignee: Showa Aluminum Industries K.K.
    Inventors: Kengi Suzuki, Tadanao Itoh, Hiroshi Mitsuhashi, Yuichi Ozawa, Sadao Hasegawa, Takeshi Yamauchi
  • Patent number: 4653571
    Abstract: In the horizontal continuous casting of metal, an upper contact part and a lower contact part of the metal body are horizontally displaced with the inner wall of the tubular chilled mold relative to one another, so that the lower contact part is positioned downstream relative to the upper contact part. Gas pressure is used to displace the contact point.
    Type: Grant
    Filed: July 19, 1985
    Date of Patent: March 31, 1987
    Assignee: Showa Aluminum Industries K.K.
    Inventors: Kengi Suzuki, Tadanao Itoh, Hiroshi Mitsuhashi, Yuichi Ozawa, Sadao Hasegawa, Takeshi Yamauchi